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<P><CENTER><H2>9s complement circuits</H2></CENTER>
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<P>Now a small collection of schematics from<BR>
<I>Fairchild Fast Applications Handbook,<BR>
1987, Page 5-45:</I>

<P><B>Warning</B>:<BR>
For an input range of 0..9, all of the 9s complementer<BR>
schematics are supposed to return 9..0.<BR>
But when sending 10..15 into those 9s complementers,<BR>
the output is <B>undefined</B>.<BR>
Clear text: In that case, don't expect two schematics<BR>
to give you identical results...<BR>
<I>or correct results, that is.</I>

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<P><IMG SRC="bcd2_9c_f1.png">

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<P><IMG SRC="bcd2_9c_f2.png">

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<P><IMG SRC="bcd2_9c_f3.png">

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<P><IMG SRC="bcd2_9c_f4.png">

<P><B>COM=0</B>: B' = B.<BR>
<B>COM=1</B>: B' = 9s complement of B.

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<P>The 9s complementer which is used inside the<BR>
74582 adder/subtractor.
<P><IMG SRC="bcd2_9c_582.png">

<P>Ok, my notation is a bit different from the original.<BR>
Warning: for COM=0:<BR>
B' is supossed to be B... for input values from 0..9.<BR>
<B>Input values of 10..15 at B may be turned into garbage at B'</B>.

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<P>Just toying with the equations, ignore this picture.<BR>
Don't know, if this here really works...

<P><IMG SRC="bcd2_9c_own.png">

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<P>(c) Dieter Mueller 2012
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