Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Support ARM SVE instructions #117

Open
Dawoodoz opened this issue Dec 31, 2024 · 0 comments
Open

Support ARM SVE instructions #117

Dawoodoz opened this issue Dec 31, 2024 · 0 comments
Labels
Future proofing Aiming to work around year 2200 A.C. Performance portability Related to working on a certain operating system

Comments

@Dawoodoz
Copy link
Owner

Dawoodoz commented Dec 31, 2024

The SVE SIMD extensions are pretty much the ARM equivalent of Intel's AVX2 by adding vectors wider than 128 bits, together with gather and scatter instructions. To fully support this, simd.h may need to change some compile time constants into functions and use macros for backward compatibility. Then memory allocation needs to calculate the maximum memory alignment based on the vector length at runtime. Both the X vector and the F vector should be tied directly to the dynamic vector size of SVE registers.

To reduce the risk of damaging an implementation for one hardware target while working with another, simd.h needs to be divided into reference, Intel/AMD, and ARM implementations of SIMD in different headers placed in a separate folder. The reference implementation will work as timeless documentation of what should be done, preferrably refactored using templates for simplicity.

@Dawoodoz Dawoodoz added portability Related to working on a certain operating system Performance Future proofing Aiming to work around year 2200 A.C. labels Dec 31, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Future proofing Aiming to work around year 2200 A.C. Performance portability Related to working on a certain operating system
Projects
None yet
Development

No branches or pull requests

1 participant