diff --git a/README.md b/README.md index 90820f7..d4609b5 100644 --- a/README.md +++ b/README.md @@ -1,14 +1,134 @@ +## Brought to you by: +[![Quantum Leaps](https://www.state-machine.com/attachments/logo_ql_400.png)](https://www.state-machine.com) +
+ +[![GitHub release (latest by date)](https://img.shields.io/github/v/release/QuantumLeaps/qpc-examples)](https://github.com/QuantumLeaps/qpc-examples/releases/latest) + + # About qpc-examples -This `qpc-examples` repository contains the examples for the QP/C Real-Time Embedded Framework. -The following examples are enhanced with `cmake` support: -- [Posix/Win32 dpp example](https://github.com/stefanschober/qpc-examples/tree/cmakeSupport/posix-win32/dpp) -- [QWin GUI dpp example](https://github.com/stefanschober/qpc-examples/tree/cmakeSupport/qwin-gui/dpp-gui) -This [Posix/Win32 cmake example](https://github.com/stefanschober/qpc-examples/tree/cmakeSupport/posix-win32-cmake/dpp) is a full featured example, which shows how to use `cmake`with qpc to automatically generate build systems for different platforms and configurations. +This repository contains examples for the QP/C Real-Time Embedded Framework +(see https://github.com/QuantumLeaps/qpc ) + +This repository can be used in two ways: + +## Standalone (examples in the `cmsis-packs` folder) -Another [example](https://github.com/stefanschober/TrafficLight), a simple trafficlight simulation, shows how to set up a system with various BSPs for different target systems and use `cmake` to build them with the matching cross compilers from one combined source code repository. +``` ++---cmsis-packs <=== standalone examples +| +---dpp_nucleo-c031c6-qk-gcc +| +---dpp_nucleo-c031c6-qk-keil +| \---dpp_nucleo-c031c6-qk-stm32cube +| +``` -The setting of the variable `QPC_SDK_PATH`, which points to the `qpc` directory inside the example's `CMakeLists.txt` file assumes, that the `examples` directory is part of the `qpc` tree and resides in `<...>/qpc/examples`. +## As a sub-module to the [qpc](https://github.com/QuantumLeaps/qpc) repository -> **NOTE** -This repository is **NOT** designed to be used standalone, but rather only as submodule of the repository [qpc](https://github.com/QuantumLeaps/qpc) \ No newline at end of file +``` ++---arm-cm +| +---blinky_ek-tm4c123gxl +| +---blinky_nucleo-c031c6 +| +---dpp_efm32-slstk3401a +| | +---qk +| | | +---armclang +| | | +---gnu +| | | \---iar +| | +---qv +| | | +---armclang +| | | +---gnu +| | | \---iar +| | +---qview +| | | \---img +| | \---qxk +| | +---armclang +| | +---gnu +| | \---iar +| +---dpp_ek-tm4c123gxl +| +---dpp_ek-tm4c123gxl_mpu +| +---dpp_mbed-lpc1768 +| +---dpp_nucleo-c031c6 +| +---dpp_nucleo-c031c6_mpu +| +---dpp_nucleo-h743zi +| +---dpp_nucleo-l053r8 +| +---dpp_nucleo-l152re +| +---dpp_nucleo-l552ze +| +---dpp_stm32f4-discovery +| +---game_efm32-slstk3401a +| +---low-power_ek-tm4c123gxl +| \---real-time_nucleo-l053r8 +| ++---arm-cr +| +---blinky_launchxl2-tms57012 +| \---dpp_launchxl2-tms57012 +| ++---embos +| \---arm-cm +| \---dpp_nucleo-h743zi ++---emwin +| +---demo_no_wm +| \---demo_with_wm ++---freertos +| \---arm-cm +| +---dpp_ek-tm4c123gxl +| \---dpp_nucleo-h743zi ++---lwip +| \---arm-cm +| \---lwip_ek-lm3s6965 ++---msp430 +| +---blinky_msp-exp430f5529lp +| +---blinky_msp-exp430g2 +| \---dpp_msp-exp430f5529lp +| ++---pic32 +| \---dpp_microstick2-pic32 +| ++---posix-win32 +| +---blinky +| +---calc +| +---calc2 +| +---calc_sub +| +---comp +| +---defer +| +---dpp +| +---dpp-posix +| +---dpp_comp +| +---history_qhsm +| +---history_qmsm +| +---qhsmtst +| +---qmsmtst +| +---reminder +| \---reminder2 +| ++---qutest +| +---blinky +| +---dpp +| +---dpp-comp +| +---evt_par +| +---qhsmtst +| +---qmsmtst +| +---self_test +| +---start_seq +| +---unity_basic +| +---unity_ledbar +| +---unity_ledbar2 +| +---unity_mock +| \---unity_strlen +| +---qutest +| +---src +| \---test +| ++---qwin-gui +| +---dpp-gui +| \---game-gui +| ++---threadx +| \---arm-cm +| +---dpp_ek-tm4c123gxl +| \---dpp_stm32f429-discovery ++---uc-os2 +| \---arm-cm +| \---dpp_ek-tm4c123gxl +\---zephyr + +---blinky + \---dpp +``` diff --git a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/Makefile b/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/Makefile deleted file mode 100644 index dee6200..0000000 --- a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/Makefile +++ /dev/null @@ -1,315 +0,0 @@ -############################################################################## -# Product: Makefile for QP/C on NUCLEO-C031C6, QV kernel, GNU-ARM -# Last Updated for Version: 7.3.0 -# Date of the Last Update: 2023-05-26 -# -# Q u a n t u m L e a P s -# ------------------------ -# Modern Embedded Software -# -# Copyright (C) 2005 Quantum Leaps, LLC. -# -# This program is open source software: you can redistribute it and/or -# modify it under the terms of the GNU General Public License as published -# by the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Alternatively, this program may be distributed and modified under the -# terms of Quantum Leaps commercial licenses, which expressly supersede -# the GNU General Public License and are specifically designed for -# licensees interested in retaining the proprietary status of their code. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# Contact information: -# -# -############################################################################## -# examples of invoking this Makefile: -# building configurations: Debug (default), Release, and Spy -# make -# make CONF=rel -# make CONF=spy -# -# cleaning configurations: Debug (default), Release, and Spy -# make clean -# make CONF=rel clean -# make CONF=spy clean -# -# NOTE: -# To use this Makefile on Windows, you will need the GNU make utility, which -# is included in the Qtools collection for Windows, see: -# https://github.com/QuantumLeaps/qtools - -#----------------------------------------------------------------------------- -# project name -# -PROJECT := dpp-qv - -#----------------------------------------------------------------------------- -# project directories -# - -# location of the QP/C framework (if not provided in an environment var.) -ifeq ($(QPC),) -QPC := ../../../../.. -endif - -# QP port used in this project -QP_PORT_DIR := $(QPC)/ports/arm-cm/qv/gnu - -# list of all source directories used by this project -VPATH = \ - .. \ - ../.. \ - $(QPC)/src/qf \ - $(QPC)/src/qv \ - $(QPC)/src/qs \ - $(QP_PORT_DIR) \ - $(QPC)/3rd_party/nucleo-c031c6 \ - $(QPC)/3rd_party/nucleo-c031c6/gnu - -# list of all include directories needed by this project -INCLUDES = \ - -I../.. \ - -I$(QPC)/include \ - -I$(QP_PORT_DIR) \ - -I$(QPC)/3rd_party/CMSIS/Include \ - -I$(QPC)/3rd_party/nucleo-c031c6 - -#----------------------------------------------------------------------------- -# files -# - -# assembler source files -ASM_SRCS := - -# C source files -C_SRCS := \ - bsp.c \ - main.c \ - philo.c \ - table.c \ - system_stm32c0xx.c \ - startup_stm32c031xx.c - -# C++ source files -CPP_SRCS := - -OUTPUT := $(PROJECT) -LD_SCRIPT := $(PROJECT).ld - -QP_SRCS := \ - qep_hsm.c \ - qep_msm.c \ - qf_act.c \ - qf_actq.c \ - qf_defer.c \ - qf_dyn.c \ - qf_mem.c \ - qf_ps.c \ - qf_qact.c \ - qf_qeq.c \ - qf_qmact.c \ - qf_time.c \ - qv.c \ - qv_port.c - -QP_ASMS := - -QS_SRCS := \ - qs.c \ - qs_rx.c \ - qs_fp.c - -LIB_DIRS := -LIBS := - -# defines -DEFINES := -DSTM32C031xx \ - -DQF_ON_CONTEXT_SW - -# ARM CPU, ARCH, FPU, and Float-ABI types... -# ARM_CPU: [cortex-m0 | cortex-m0plus | cortex-m1 | cortex-m3 | cortex-m4] -# ARM_FPU: [ | vfp] -# FLOAT_ABI: [ | soft | softfp | hard] -# -ARM_CPU := -mcpu=cortex-m0plus -ARM_FPU := -FLOAT_ABI := - -#----------------------------------------------------------------------------- -# GNU-ARM toolset (NOTE: You need to adjust to your machine) -# see https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads -# -ifeq ($(GNU_ARM),) -GNU_ARM := $(QTOOLS)/gnu_arm-none-eabi -endif - -# make sure that the GNU-ARM toolset exists... -ifeq ("$(wildcard $(GNU_ARM))","") -$(error GNU_ARM toolset not found. Please adjust the Makefile) -endif - -CC := $(GNU_ARM)/bin/arm-none-eabi-gcc -CPP := $(GNU_ARM)/bin/arm-none-eabi-g++ -AS := $(GNU_ARM)/bin/arm-none-eabi-as -LINK := $(GNU_ARM)/bin/arm-none-eabi-gcc -BIN := $(GNU_ARM)/bin/arm-none-eabi-objcopy - -############################################################################## -# Typically you should not need to change anything below this line - -# basic utilities (included in QTools for Windows), see: -# https://www.state-machine.com/qtools - -MKDIR := mkdir -RM := rm - -#----------------------------------------------------------------------------- -# build options for various configurations for ARM Cortex-M -# - -# combine all the sources... -C_SRCS += $(QP_SRCS) -ASM_SRCS += $(QP_ASMS) - -ifeq (rel, $(CONF)) # Release configuration .................................. - -BIN_DIR := rel - -ASFLAGS = $(ARM_CPU) $(ARM_FPU) $(ASM_CPU) $(ASM_FPU) - -CFLAGS = -c $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections \ - -O2 $(INCLUDES) $(DEFINES) -DNDEBUG - -CPPFLAGS = -c $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions \ - -O2 $(INCLUDES) $(DEFINES) -DNDEBUG - -else ifeq (spy, $(CONF)) # Spy configuration ................................ - -BIN_DIR := spy - -C_SRCS += $(QS_SRCS) - -ASFLAGS = -g $(ARM_CPU) $(ARM_FPU) $(ASM_CPU) $(ASM_FPU) - -CFLAGS = -c -g $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections \ - -O $(INCLUDES) $(DEFINES) -DQ_SPY - -CPPFLAGS = -c -g $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions \ - -O $(INCLUDES) $(DEFINES) -DQ_SPY - -else # default Debug configuration .......................................... - -BIN_DIR := dbg - -ASFLAGS = -g $(ARM_CPU) $(ARM_FPU) $(ASM_CPU) $(ASM_FPU) - -CFLAGS = -c -g $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections \ - -O $(INCLUDES) $(DEFINES) - -CPPFLAGS = -c -g $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb -Wall \ - -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions \ - -O $(INCLUDES) $(DEFINES) - -endif # ...................................................................... - - -LINKFLAGS = -T$(LD_SCRIPT) $(ARM_CPU) $(ARM_FPU) $(FLOAT_ABI) -mthumb \ - -specs=nosys.specs -specs=nano.specs \ - -Wl,-Map,$(BIN_DIR)/$(OUTPUT).map,--cref,--gc-sections $(LIB_DIRS) - -ASM_OBJS := $(patsubst %.s,%.o, $(notdir $(ASM_SRCS))) -C_OBJS := $(patsubst %.c,%.o, $(notdir $(C_SRCS))) -CPP_OBJS := $(patsubst %.cpp,%.o,$(notdir $(CPP_SRCS))) - -TARGET_BIN := $(BIN_DIR)/$(OUTPUT).bin -TARGET_ELF := $(BIN_DIR)/$(OUTPUT).elf -ASM_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(ASM_OBJS)) -C_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(C_OBJS)) -C_DEPS_EXT := $(patsubst %.o, %.d, $(C_OBJS_EXT)) -CPP_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(CPP_OBJS)) -CPP_DEPS_EXT := $(patsubst %.o, %.d, $(CPP_OBJS_EXT)) - -# create $(BIN_DIR) if it does not exist -ifeq ("$(wildcard $(BIN_DIR))","") -$(shell $(MKDIR) $(BIN_DIR)) -endif - -#----------------------------------------------------------------------------- -# rules -# - -.PHONY : run norun flash - -ifeq ($(MAKECMDGOALS),norun) -all : $(TARGET_BIN) -norun : all -else -all : $(TARGET_BIN) run -endif - -$(TARGET_BIN): $(TARGET_ELF) - $(BIN) -O binary $< $@ - -$(TARGET_ELF) : $(ASM_OBJS_EXT) $(C_OBJS_EXT) $(CPP_OBJS_EXT) - $(CC) $(CFLAGS) $(QPC)/src/qs/qstamp.c -o $(BIN_DIR)/qstamp.o - $(LINK) $(LINKFLAGS) -o $@ $^ $(BIN_DIR)/qstamp.o $(LIBS) - -$(BIN_DIR)/%.d : %.c - $(CC) -MM -MT $(@:.d=.o) $(CFLAGS) $< > $@ - -$(BIN_DIR)/%.d : %.cpp - $(CPP) -MM -MT $(@:.d=.o) $(CPPFLAGS) $< > $@ - -$(BIN_DIR)/%.o : %.s - $(AS) $(ASFLAGS) $< -o $@ - -$(BIN_DIR)/%.o : %.c - $(CC) $(CFLAGS) $< -o $@ - -$(BIN_DIR)/%.o : %.cpp - $(CPP) $(CPPFLAGS) $< -o $@ - -.PHONY : clean show - -# include dependency files only if our goal depends on their existence -ifneq ($(MAKECMDGOALS),clean) - ifneq ($(MAKECMDGOALS),show) --include $(C_DEPS_EXT) $(CPP_DEPS_EXT) - endif -endif - - -clean: - -$(RM) $(BIN_DIR)/*.o \ - $(BIN_DIR)/*.d \ - $(BIN_DIR)/*.bin \ - $(BIN_DIR)/*.elf \ - $(BIN_DIR)/*.map - -show: - @echo PROJECT = $(PROJECT) - @echo CONF = $(CONF) - @echo DEFINES = $(DEFINES) - @echo ASM_FPU = $(ASM_FPU) - @echo ASM_SRCS = $(ASM_SRCS) - @echo C_SRCS = $(C_SRCS) - @echo CPP_SRCS = $(CPP_SRCS) - @echo ASM_OBJS_EXT = $(ASM_OBJS_EXT) - @echo C_OBJS_EXT = $(C_OBJS_EXT) - @echo C_DEPS_EXT = $(C_DEPS_EXT) - @echo CPP_DEPS_EXT = $(CPP_DEPS_EXT) - @echo TARGET_ELF = $(TARGET_ELF) diff --git a/cmsis-packs/README.md b/cmsis-packs/README.md new file mode 100644 index 0000000..baaa2e3 --- /dev/null +++ b/cmsis-packs/README.md @@ -0,0 +1,11 @@ +# About cmsis-packs examples + +This directory contains examples for the QP/C Real-Time Embedded Framework +(see https://github.com/QuantumLeaps/qpc ), which can be used **standalone** +(without being a sub-module to the qpc repo). + +This use is possible because the QP/C source code is taken from the qpc +[CMSIS-pack](https://github.com/QuantumLeaps/cmsis-packs). + +The individual projects in this directory contain README.md files that +explain how to use the projects. diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/README.md b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/README.md new file mode 100644 index 0000000..7b39f58 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/README.md @@ -0,0 +1,80 @@ +# About this project + +This project is for KEIL uVision IDE with the GNU-ARM compiler, +and the NUCLEO-C031C6 board: + +![](stm32-nucleo-c031c6.jpg) + +This project demonstrates: +- Using the QP/C Framework from the CMSIS-pack + + Using the preemptive, non-blocking QK kernel +- DPP (Dining Philosopher Problem) example application + + code generated from a QM model, which can be edited manually, + or with graphical QM modeling tool. +- Debug configuration +- Spy configuration with software tracing + + +# Steps to use this project +This project requires external GNU-ARM compiler installation. +The configuration in the project assumes the GNU-ARM toolchains from +the QTools collection for Windows, which is typically located installation + +`C:\qp\qtools\gnu_arm-none-eabi\` + +However, other GNU-ARM toolchain can be used as well. The location +of the GNU-ARM toolchain can be configured in KEIL IDE by clicking on + +0. Select menu: "Project | Manage -> Project Items...". + - click on the "Folders/Extensions" tab + - tick the box "Use GCC Compiler (GNU) for ARM projects + - configure the "Prefix" + - configure the "Folder" + +After you configure the GNU-ARM toolchain, do the following: + +1. Open the `project.uvprojx` in KEIL uVision IDE +2. Build the project (default `dbg` configuration) +5. Connect the NUCLEO-C031C6 board and Run/Debug the project + + +# Using the Spy configuration + +1. Select the `spy` target from the drop-down menu in the top toolbar +2. Build the project (`spy` configuration) +4. Open a terminal window and type "qspy -c ", where is the serial + port of your NUCLEO-C031C6 board +5. Start debugging / run the program +6. The qspy window should start showing the output. + + +# Modifying the example + +The example code is located in the project folder: + +``` +dpp_nucleo-c031c6-qk-keil +| +| bsp.c +| bsp.h +| dpp.h <-- generated +| dpp.qm <-- QM model file +| main.c +| philo.c <-- generated +| project.sct +| project.uvoptx +| project.uvprojx +| README.md +| table.c <-- generated +| +\---RTE + +---Device + | \---STM32C031C6Tx + | . . . +``` + +The example code can be edited manually, as any regular C code. + +However, it is also possible (and recommended) to model the application +graphically by means of the QM modeling tool and then **generate** the +code automatically. The example model is located in the file `Core/dpp.qm`. diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s new file mode 100644 index 0000000..ca7879a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s @@ -0,0 +1,231 @@ +;****************************************************************************** +;* File Name : startup_stm32c031xx.s +;* Author : MCD Application Team +;* Description : STM32C031xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2022 STMicroelectronics. +;* All rights reserved. +;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 2048 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD 0 ; Reserved + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD 0 ; Reserved + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMAMUX1_IRQHandler ; DMAMUX + DCD ADC1_IRQHandler ; ADC1 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD 0 ; Reserved + DCD TIM3_IRQHandler ; TIM3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD 0 ; Reserved + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD 0 ; Reserved + DCD SPI1_IRQHandler ; SPI1 + DCD 0 ; Reserved + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMAMUX1_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + +WWDG_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMAMUX1_IRQHandler +ADC1_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM3_IRQHandler +TIM14_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +SPI1_IRQHandler +USART1_IRQHandler +USART2_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 new file mode 100644 index 0000000..1db9ecf --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 @@ -0,0 +1,231 @@ +;****************************************************************************** +;* File Name : startup_stm32c031xx.s +;* Author : MCD Application Team +;* Description : STM32C031xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2022 STMicroelectronics. +;* All rights reserved. +;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD 0 ; Reserved + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD 0 ; Reserved + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMAMUX1_IRQHandler ; DMAMUX + DCD ADC1_IRQHandler ; ADC1 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD 0 ; Reserved + DCD TIM3_IRQHandler ; TIM3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD 0 ; Reserved + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD 0 ; Reserved + DCD SPI1_IRQHandler ; SPI1 + DCD 0 ; Reserved + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMAMUX1_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + +WWDG_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMAMUX1_IRQHandler +ADC1_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM3_IRQHandler +TIM14_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +SPI1_IRQHandler +USART1_IRQHandler +USART2_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c new file mode 100644 index 0000000..f0e137f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 new file mode 100644 index 0000000..3556e50 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h new file mode 100644 index 0000000..4d47fcd --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h @@ -0,0 +1,271 @@ +//============================================================================ +// QP configuration file (QK on ARM Cortex-M) +// Last updated for version: 7.3.0 +// Last updated on: 2023-10-30 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef QP_CONFIG_H_ +#define QP_CONFIG_H_ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- + +// NOTE: Requires command-line macro: QP_CONFIG +// This qp_config.h header file is activated only when the macro +// QP_CONFIG is defined on the command-line to the compiler +// ------------------------------------------- + +// QP API compatibility version (QP_API_VERSION) +// <0=> 0 (Maximum compatibility) +// <580=>580 (QP 5.8.0 or newer) +// <660=>660 (QP 6.6.0 or newer) +// <691=>691 (QP 6.9.1 or newer) +// <700=>700 (QP 7.0.0 or newer) +// <9999=>9999 (Latest only) +// QP API backwards compatibility with the QP/C API version. +// Lower QP_API_VERSION values enable backwards compatibility +// with lower (older) QP API versions. +// For example, QP_API_VERSION==691 will enable the compatibility +// layer with QP version 6.9.1 and newer, but not older than 6.9.1. +// QP_API_VERSION==0 enables the maximum currently supported +// backwards compatibility. Conversely, QP_API_VERSION==9999 means +// that no backwards compatibility layer should be enabled. +// Default: 0 (All supported) +#define QP_API_VERSION 0 + +//.......................................................................... +// QP Functional Safety (FuSa) Subsystem (Q_UNSAFE) +// The QP FuSa Subsystem consists of the following facilities: +// - Software assertions as a recommended technique +// (called Failure Assertion Programming (FAP) in IEC 61508) +// - Software Self-Monitoring (SSM), which encompasses such techniques: +// * Duplicate Inverse Storage for critical variables +// * Memory Markers for critical objects (e.g., events) +// * Hard-limits for all loops +// * Memory Isolation by means of Memory Protection Unit (MPU) + +// Disable QP FuSa in development +// Disable assertions and other self monitoring features +// in development build configurations (NDEBUG undefined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifndef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// Disable QP FuSa in production release +// Disable assertions and other self monitoring features +// in the release build configurations (NDEBUG defined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifdef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// + +//.......................................................................... +// QEP Event Processor +// Events and state machines. + +// Event signal size (Q_SIGNAL_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the QEvt signal for QEP/QF [bytes] +// Default: 2 +#define Q_SIGNAL_SIZE 2U + +// + +//.......................................................................... +// QF Framework +// Active Object framework + +// Maximum # Active Objects (QF_MAX_ACTIVE) <1-64> +// Maximum # Active Objects in the system <1..64> +// Default: 32 +#define QF_MAX_ACTIVE 32U + +// Maximum # event pools (QF_MAX_EPOOL) +// <0=>0 no event pools +// <1=>1 <2=>2 <3=>3 (default) <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # Event Pools <1..15> +// Default: 3 +#define QF_MAX_EPOOL 3U + +// Maximum # clock tick rates (QF_MAX_TICK_RATE) +// <0=>0 no time events +// <1=>1 (default) <2=>2 <3=>3 <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # clock tick rates for time events <1..15> +// Default: 1 +#define QF_MAX_TICK_RATE 1U + +// Dynamic Event Constructor (QEVT_DYN_CTOR) +// Dynamic Event Constructor (RAII) +//#define QEVT_DYN_CTOR +// + +// Active Object stop API (QACTIVE_CAN_STOP) +// Enable Active Object stop API (Not recommended) +//#define QACTIVE_CAN_STOP +// + +// Event size (QF_EVENT_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the dynamic events for QF [bytes] +// Default: 2 (64K bytes maximum event size) +#define QF_EVENT_SIZ_SIZE 2U + +// Time event counter size (QF_TIMEEVT_CTR_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the QTimeEvt counter [bytes] +// Default: 4 (2^32 dynamic range) +#define QF_TIMEEVT_CTR_SIZE 4U + +// Event queue counter size (QF_EQUEUE_CTR_SIZE) +// <1U=>1 (default) +// <2U=>2 +// <4U=>4 +// Size of event queue counter [bytes] +// Default: 1 (255 events maximum in a queue) +#define QF_EQUEUE_CTR_SIZE 1U + +// Memory pool counter size (QF_MPOOL_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool counter [bytes] +// Default: 2 (64K blocks maximum in a pool) +#define QF_MPOOL_CTR_SIZE 2U + +// Memory block size (QF_MPOOL_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool block [bytes] +// Default: 2 (64K bytes maximum block size) +#define QF_MPOOL_SIZ_SIZE 2U + +// + +//.......................................................................... +// QS Software Tracing +// Target-resident component of QP/Spy software tracing system +// (tracing instrumenation and command-input). + +// NOTE: Requires command-line macro: Q_SPY +// The QS software tracing instrumenation is activated only when +// the macro Q_SPY is defined on the command-line to the compiler. +// Typically, Q_SPY is defined only in the "spy" build configuration. + +// QS timestamp size (QS_TIME_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the timestamp in QS [bytes] +// Default: 4 (2^32 dynamic range) +#define QS_TIME_SIZE 4U + +// Object pointer size (QS_OBJ_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of object pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_OBJ_PTR_SIZE 4U + +// Function pointer size (QS_FUN_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of function pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_FUN_PTR_SIZE 4U + +// QS buffer counter size (QS_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the counter in the internal QS buffer [bytes] +// Default: 2 (64K bytes in QS buffer) +#define QS_CTR_SIZE 2U + +// + +//.......................................................................... +// QK Preemptive Non-Blocking Kernel +// Preemptive non-blocking/blocking RTOS kernel. + +// Context switch callback (QF_ON_CONTEXT_SW) + +// Context switch callback WITHOUT QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is undefined. +//#ifndef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// Context switch callback WITH QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is defined. +#ifdef Q_SPY +#define QF_ON_CONTEXT_SW +#endif +// + +// + +// MPU memory isolation (QF_MEM_ISOLATE) +// Enable memory isolation (requires MPU) +// NOTE: implies QF_ON_CONTEXT_SW. +//#define QF_MEM_ISOLATE +// + +// Use IRQ handler for QK return-from-preemption +// Enable this option only if the NMI handler is used in the project. +// If enabled, provide the otherwise unused IRQ number (QK_USE_IRQ_NUM) +// and the corresponding IRQ handler name (QK_USE_IRQ_HANDLER) +// in the "Text Editor" mode. +//#define QK_USE_IRQ_NUM 31 +//#define QK_USE_IRQ_HANDLER Reserved31_IRQHandler +// + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#endif // QP_CONFIG_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h.base@7.3.4 b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h.base@7.3.4 new file mode 100644 index 0000000..afba217 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/RTEF/qp_config.h.base@7.3.4 @@ -0,0 +1,271 @@ +//============================================================================ +// QP configuration file (QK on ARM Cortex-M) +// Last updated for version: 7.3.0 +// Last updated on: 2023-10-30 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef QP_CONFIG_H_ +#define QP_CONFIG_H_ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- + +// NOTE: Requires command-line macro: QP_CONFIG +// This qp_config.h header file is activated only when the macro +// QP_CONFIG is defined on the command-line to the compiler +// ------------------------------------------- + +// QP API compatibility version (QP_API_VERSION) +// <0=> 0 (Maximum compatibility) +// <580=>580 (QP 5.8.0 or newer) +// <660=>660 (QP 6.6.0 or newer) +// <691=>691 (QP 6.9.1 or newer) +// <700=>700 (QP 7.0.0 or newer) +// <9999=>9999 (Latest only) +// QP API backwards compatibility with the QP/C API version. +// Lower QP_API_VERSION values enable backwards compatibility +// with lower (older) QP API versions. +// For example, QP_API_VERSION==691 will enable the compatibility +// layer with QP version 6.9.1 and newer, but not older than 6.9.1. +// QP_API_VERSION==0 enables the maximum currently supported +// backwards compatibility. Conversely, QP_API_VERSION==9999 means +// that no backwards compatibility layer should be enabled. +// Default: 0 (All supported) +#define QP_API_VERSION 0 + +//.......................................................................... +// QP Functional Safety (FuSa) Subsystem (Q_UNSAFE) +// The QP FuSa Subsystem consists of the following facilities: +// - Software assertions as a recommended technique +// (called Failure Assertion Programming (FAP) in IEC 61508) +// - Software Self-Monitoring (SSM), which encompasses such techniques: +// * Duplicate Inverse Storage for critical variables +// * Memory Markers for critical objects (e.g., events) +// * Hard-limits for all loops +// * Memory Isolation by means of Memory Protection Unit (MPU) + +// Disable QP FuSa in development +// Disable assertions and other self monitoring features +// in development build configurations (NDEBUG undefined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifndef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// Disable QP FuSa in production release +// Disable assertions and other self monitoring features +// in the release build configurations (NDEBUG defined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifdef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// + +//.......................................................................... +// QEP Event Processor +// Events and state machines. + +// Event signal size (Q_SIGNAL_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the QEvt signal for QEP/QF [bytes] +// Default: 2 +#define Q_SIGNAL_SIZE 2U + +// + +//.......................................................................... +// QF Framework +// Active Object framework + +// Maximum # Active Objects (QF_MAX_ACTIVE) <1-64> +// Maximum # Active Objects in the system <1..64> +// Default: 32 +#define QF_MAX_ACTIVE 32U + +// Maximum # event pools (QF_MAX_EPOOL) +// <0=>0 no event pools +// <1=>1 <2=>2 <3=>3 (default) <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # Event Pools <1..15> +// Default: 3 +#define QF_MAX_EPOOL 3U + +// Maximum # clock tick rates (QF_MAX_TICK_RATE) +// <0=>0 no time events +// <1=>1 (default) <2=>2 <3=>3 <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # clock tick rates for time events <1..15> +// Default: 1 +#define QF_MAX_TICK_RATE 1U + +// Dynamic Event Constructor (QEVT_DYN_CTOR) +// Dynamic Event Constructor (RAII) +//#define QEVT_DYN_CTOR +// + +// Active Object stop API (QACTIVE_CAN_STOP) +// Enable Active Object stop API (Not recommended) +//#define QACTIVE_CAN_STOP +// + +// Event size (QF_EVENT_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the dynamic events for QF [bytes] +// Default: 2 (64K bytes maximum event size) +#define QF_EVENT_SIZ_SIZE 2U + +// Time event counter size (QF_TIMEEVT_CTR_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the QTimeEvt counter [bytes] +// Default: 4 (2^32 dynamic range) +#define QF_TIMEEVT_CTR_SIZE 4U + +// Event queue counter size (QF_EQUEUE_CTR_SIZE) +// <1U=>1 (default) +// <2U=>2 +// <4U=>4 +// Size of event queue counter [bytes] +// Default: 1 (255 events maximum in a queue) +#define QF_EQUEUE_CTR_SIZE 1U + +// Memory pool counter size (QF_MPOOL_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool counter [bytes] +// Default: 2 (64K blocks maximum in a pool) +#define QF_MPOOL_CTR_SIZE 2U + +// Memory block size (QF_MPOOL_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool block [bytes] +// Default: 2 (64K bytes maximum block size) +#define QF_MPOOL_SIZ_SIZE 2U + +// + +//.......................................................................... +// QS Software Tracing +// Target-resident component of QP/Spy software tracing system +// (tracing instrumenation and command-input). + +// NOTE: Requires command-line macro: Q_SPY +// The QS software tracing instrumenation is activated only when +// the macro Q_SPY is defined on the command-line to the compiler. +// Typically, Q_SPY is defined only in the "spy" build configuration. + +// QS timestamp size (QS_TIME_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the timestamp in QS [bytes] +// Default: 4 (2^32 dynamic range) +#define QS_TIME_SIZE 4U + +// Object pointer size (QS_OBJ_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of object pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_OBJ_PTR_SIZE 4U + +// Function pointer size (QS_FUN_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of function pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_FUN_PTR_SIZE 4U + +// QS buffer counter size (QS_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the counter in the internal QS buffer [bytes] +// Default: 2 (64K bytes in QS buffer) +#define QS_CTR_SIZE 2U + +// + +//.......................................................................... +// QK Preemptive Non-Blocking Kernel +// Preemptive non-blocking/blocking RTOS kernel. + +// Context switch callback (QF_ON_CONTEXT_SW) + +// Context switch callback WITHOUT QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is undefined. +//#ifndef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// Context switch callback WITH QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is defined. +//#ifdef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// + +// MPU memory isolation (QF_MEM_ISOLATE) +// Enable memory isolation (requires MPU) +// NOTE: implies QF_ON_CONTEXT_SW. +//#define QF_MEM_ISOLATE +// + +// Use IRQ handler for QK return-from-preemption +// Enable this option only if the NMI handler is used in the project. +// If enabled, provide the otherwise unused IRQ number (QK_USE_IRQ_NUM) +// and the corresponding IRQ handler name (QK_USE_IRQ_HANDLER) +// in the "Text Editor" mode. +//#define QK_USE_IRQ_NUM 31 +//#define QK_USE_IRQ_HANDLER Reserved31_IRQHandler +// + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#endif // QP_CONFIG_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_dbg/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_dbg/RTE_Components.h new file mode 100644 index 0000000..f02749e --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_dbg/RTE_Components.h @@ -0,0 +1,27 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'project' + * Target: 'dbg' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32c0xx.h" + +/* QuantumLeaps::RTEF&qpc:Event Processor&qep@7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +/* QuantumLeaps::RTEF&qpc:Framework&qf@7.3.4 */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +/* QuantumLeaps::RTEF&qpc:Real-Time Kernel&qk@7.3.4 */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_rel/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_rel/RTE_Components.h new file mode 100644 index 0000000..80d942c --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_rel/RTE_Components.h @@ -0,0 +1,27 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'project' + * Target: 'rel' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32c0xx.h" + +/* QuantumLeaps::RTEF&qpc:Event Processor&qep@7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +/* QuantumLeaps::RTEF&qpc:Framework&qf@7.3.4 */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +/* QuantumLeaps::RTEF&qpc:Real-Time Kernel&qk@7.3.4 */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_spy/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_spy/RTE_Components.h new file mode 100644 index 0000000..c7c3215 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/RTE/_spy/RTE_Components.h @@ -0,0 +1,29 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'project' + * Target: 'spy' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32c0xx.h" + +/* QuantumLeaps::RTEF&qpc:Event Processor&qep@7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +/* QuantumLeaps::RTEF&qpc:Framework&qf@7.3.4 */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +/* QuantumLeaps::RTEF&qpc:Real-Time Kernel&qk@7.3.4 */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ +/* QuantumLeaps::RTEF&qpc:Software tracing&qs@7.3.4 */ +#define RTE_RTEF_QPC_QS /* QP/C QS */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.c new file mode 100644 index 0000000..586c75a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.c @@ -0,0 +1,521 @@ +//============================================================================ +// Product: DPP example, NUCLEO-C031C6 board, QK kernel +// Last updated for version 7.3.3 +// Last updated on 2023-12-13 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// +// +//============================================================================ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +#include "stm32c0xx.h" // CMSIS-compliant header file for the MCU used +// add other drivers if necessary... + +Q_DEFINE_THIS_FILE // define the name of this file for assertions + +// Local-scope defines ----------------------------------------------------- +// LED pins available on the board (just one user LED LD4--Green on PA.5) +#define LD4_PIN 5U + +// Button pins available on the board (just one user Button B1 on PC.13) +#define B1_PIN 13U + +// Local-scope objects ----------------------------------------------------- +static uint32_t l_rndSeed; + +#ifdef Q_SPY + + QSTimeCtr QS_tickTime_; + QSTimeCtr QS_tickPeriod_; + + // QSpy source IDs + static QSpyId const l_SysTick_Handler = { 0U }; + static QSpyId const l_EXTI0_1_IRQHandler = { 0U }; + + enum AppRecords { // application-specific trace records + PHILO_STAT = QS_USER, + PAUSED_STAT, + CONTEXT_SW, + }; + +#endif + +//============================================================================ +// Error handler and ISRs... + +Q_NORETURN Q_onError(char const * const module, int_t const id) { + // NOTE: this implementation of the assertion handler is intended only + // for debugging and MUST be changed for deployment of the application + // (assuming that you ship your production code with assertions enabled). + Q_UNUSED_PAR(module); + Q_UNUSED_PAR(id); + QS_ASSERTION(module, id, 10000U); + +#ifndef NDEBUG + // light up the user LED + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + // for debugging, hang on in an endless loop... + for (;;) { + } +#endif + + NVIC_SystemReset(); +} +//............................................................................ +// assertion failure handler for the STM32 library, including the startup code +void assert_failed(char const * const module, int_t const id); // prototype +void assert_failed(char const * const module, int_t const id) { + Q_onError(module, id); +} + +// ISRs used in the application ============================================ + +void SysTick_Handler(void); // prototype +void SysTick_Handler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + QTIMEEVT_TICK_X(0U, &l_SysTick_Handler); // time events at rate 0 + + // Perform the debouncing of buttons. The algorithm for debouncing + // adapted from the book "Embedded Systems Dictionary" by Jack Ganssle + // and Michael Barr, page 71. + static struct { + uint32_t depressed; + uint32_t previous; + } buttons = { 0U, 0U }; + + uint32_t current = ~GPIOC->IDR; // read Port C with state of Button B1 + uint32_t tmp = buttons.depressed; // save the depressed buttons + buttons.depressed |= (buttons.previous & current); // set depressed + buttons.depressed &= (buttons.previous | current); // clear released + buttons.previous = current; // update the history + tmp ^= buttons.depressed; // changed debounced depressed + current = buttons.depressed; + + if ((tmp & (1U << B1_PIN)) != 0U) { // debounced B1 state changed? + if ((current & (1U << B1_PIN)) != 0U) { // is B1 depressed? + static QEvt const pauseEvt = QEVT_INITIALIZER(PAUSE_SIG); + QACTIVE_PUBLISH(&pauseEvt, &l_SysTick_Handler); + } + else { // the button is released + static QEvt const serveEvt = QEVT_INITIALIZER(SERVE_SIG); + QACTIVE_PUBLISH(&serveEvt, &l_SysTick_Handler); + } + } + +#ifdef Q_SPY + tmp = SysTick->CTRL; // clear CTRL_COUNTFLAG + QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover +#endif + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} +//............................................................................ +// interrupt handler for testing preemptions in QK +void EXTI0_1_IRQHandler(void); // prototype +void EXTI0_1_IRQHandler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + static QEvt const testEvt = QEVT_INITIALIZER(TEST_SIG); + QACTIVE_POST(AO_Table, &testEvt, &l_EXTI0_1_IRQHandler); + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} + +//............................................................................ +#ifdef Q_SPY +// ISR for receiving bytes from the QSPY Back-End +// NOTE: This ISR is "QF-unaware" meaning that it does not interact with +// the QF/QK and is not disabled. Such ISRs don't need to call +// QK_ISR_ENTRY/QK_ISR_EXIT and they cannot post or publish events. + +void USART2_IRQHandler(void); // prototype +void USART2_IRQHandler(void) { // used in QS-RX (kernel UNAWARE interrutp) + // is RX register NOT empty? + if ((USART2->ISR & (1U << 5U)) != 0U) { + uint32_t b = USART2->RDR; + QS_RX_PUT(b); + } + + QK_ARM_ERRATUM_838869(); +} +#endif // Q_SPY + +//............................................................................ +#ifdef QF_ON_CONTEXT_SW +// NOTE: the context-switch callback is called with interrupts DISABLED +void QF_onContextSw(QActive *prev, QActive *next) { + QS_BEGIN_INCRIT(CONTEXT_SW, 0U) // in critical section! + QS_OBJ(prev); + QS_OBJ(next); + QS_END_INCRIT() +} +#endif // QF_ON_CONTEXT_SW + + +//============================================================================ +// BSP functions... + +void BSP_init(void) { + // Configure the MPU to prevent NULL-pointer dereferencing ... + MPU->RBAR = 0x0U // base address (NULL) + | MPU_RBAR_VALID_Msk // valid region + | (MPU_RBAR_REGION_Msk & 7U); // region #7 + MPU->RASR = (7U << MPU_RASR_SIZE_Pos) // 2^(7+1) region + | (0x0U << MPU_RASR_AP_Pos) // no-access region + | MPU_RASR_ENABLE_Msk; // region enable + MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk // enable background region + | MPU_CTRL_ENABLE_Msk; // enable the MPU + __ISB(); + __DSB(); + + // NOTE: SystemInit() has been already called from the startup code + // but SystemCoreClock needs to be updated + SystemCoreClockUpdate(); + + // enable GPIOA clock port for the LED LD4 + RCC->IOPENR |= (1U << 0U); + + // set all used GPIOA pins as push-pull output, no pull-up, pull-down + GPIOA->MODER &= ~(3U << 2U*LD4_PIN); + GPIOA->MODER |= (1U << 2U*LD4_PIN); + GPIOA->OTYPER &= ~(1U << LD4_PIN); + GPIOA->OSPEEDR &= ~(3U << 2U*LD4_PIN); + GPIOA->OSPEEDR |= (1U << 2U*LD4_PIN); + GPIOA->PUPDR &= ~(3U << 2U*LD4_PIN); + + // enable GPIOC clock port for the Button B1 + RCC->IOPENR |= (1U << 2U); + + // configure Button B1 pin on GPIOC as input, no pull-up, pull-down + GPIOC->MODER &= ~(3U << 2U*B1_PIN); + GPIOC->PUPDR &= ~(3U << 2U*B1_PIN); + + BSP_randomSeed(1234U); // seed the random number generator + + // initialize the QS software tracing... + if (!QS_INIT((void *)0)) { + Q_ERROR(); + } + + // dictionaries... + QS_OBJ_DICTIONARY(&l_SysTick_Handler); + QS_USR_DICTIONARY(PHILO_STAT); + QS_USR_DICTIONARY(PAUSED_STAT); + QS_USR_DICTIONARY(CONTEXT_SW); + + QS_ONLY(produce_sig_dict()); + + // setup the QS filters... + QS_GLB_FILTER(QS_ALL_RECORDS); // all records + QS_GLB_FILTER(-QS_QF_TICK); // exclude the clock tick +} +//............................................................................ +void BSP_start(void) { + // initialize event pools + static QF_MPOOL_EL(TableEvt) smlPoolSto[2*N_PHILO]; + QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0])); + + // initialize publish-subscribe + static QSubscrList subscrSto[MAX_PUB_SIG]; + QActive_psInit(subscrSto, Q_DIM(subscrSto)); + + // instantiate and start AOs/threads... + + static QEvt const *philoQueueSto[N_PHILO][10]; + for (uint8_t n = 0U; n < N_PHILO; ++n) { + Philo_ctor(n); + QACTIVE_START(AO_Philo[n], + + // NOTE: set the preemption-threshold of all Philos to + // the same level, so that they cannot preempt each other. + Q_PRIO(n + 3U, N_PHILO + 2U), // QF-prio/pre-thre. + + philoQueueSto[n], // event queue storage + Q_DIM(philoQueueSto[n]), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param + } + + static QEvt const *tableQueueSto[N_PHILO]; + Table_ctor(); + QACTIVE_START(AO_Table, + N_PHILO + 7U, // QP prio. of the AO + tableQueueSto, // event queue storage + Q_DIM(tableQueueSto), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param +} +//............................................................................ +void BSP_displayPhilStat(uint8_t n, char const *stat) { + Q_UNUSED_PAR(n); + + if (stat[0] == 'e') { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + } + else { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off + } + + // app-specific trace record... + QS_BEGIN_ID(PHILO_STAT, AO_Table->prio) + QS_U8(1, n); // Philosopher number + QS_STR(stat); // Philosopher status + QS_END() +} +//............................................................................ +void BSP_displayPaused(uint8_t const paused) { + // not enough LEDs to implement this feature + if (paused != 0U) { + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + } + else { + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + } + + // application-specific trace record + QS_BEGIN_ID(PAUSED_STAT, AO_Table->prio) + QS_U8(1, paused); // Paused status + QS_END() +} +//............................................................................ +void BSP_randomSeed(uint32_t seed) { + l_rndSeed = seed; +} +//............................................................................ +uint32_t BSP_random(void) { // a very cheap pseudo-random-number generator + + QSchedStatus lockStat = QK_schedLock(N_PHILO); // N_PHILO prio. ceiling + // "Super-Duper" Linear Congruential Generator (LCG) + // LCG(2^32, 3*7*11*13*23, 0, seed) + // + uint32_t rnd = l_rndSeed * (3U*7U*11U*13U*23U); + l_rndSeed = rnd; // set for the next time + QK_schedUnlock(lockStat); + + return (rnd >> 8U); +} +//............................................................................ +void BSP_ledOn(void) { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on +} +//............................................................................ +void BSP_ledOff(void) { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off +} +//............................................................................ +void BSP_terminate(int16_t result) { + Q_UNUSED_PAR(result); +} + +//============================================================================ +// QF callbacks... +void QF_onStartup(void) { + // set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate + SysTick_Config(SystemCoreClock / BSP_TICKS_PER_SEC); + + // assign all priority bits for preemption-prio. and none to sub-prio. + // NOTE: this might have been changed by STM32Cube. + NVIC_SetPriorityGrouping(0U); + + // set priorities of ALL ISRs used in the system, see NOTE1 + NVIC_SetPriority(USART2_IRQn, 0U); // kernel UNAWARE interrupt + NVIC_SetPriority(EXTI0_1_IRQn, QF_AWARE_ISR_CMSIS_PRI + 0U); + NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U); + // ... + + // enable IRQs... + NVIC_EnableIRQ(EXTI0_1_IRQn); + +#ifdef Q_SPY + NVIC_EnableIRQ(USART2_IRQn); // UART2 interrupt used for QS-RX +#endif +} +//............................................................................ +void QF_onCleanup(void) { +} + +//............................................................................ +void QK_onIdle(void) { + // toggle an LED on and then off (not enough LEDs, see NOTE2) + //QF_INT_DISABLE(); + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + //QF_INT_ENABLE(); + +#ifdef Q_SPY + QS_rxParse(); // parse all the received bytes + + if ((USART2->ISR & (1U << 7U)) != 0U) { // TXE empty? + QF_INT_DISABLE(); + uint16_t b = QS_getByte(); + QF_INT_ENABLE(); + + if (b != QS_EOD) { // not End-Of-Data? + USART2->TDR = b; // put into the DR register + } + } +#elif defined NDEBUG + // Put the CPU and peripherals to the low-power mode. + // you might need to customize the clock management for your application, + // see the datasheet for your particular Cortex-M MCU. + __WFI(); // Wait-For-Interrupt +#endif +} + +//============================================================================ +// QS callbacks... +#ifdef Q_SPY + +//............................................................................ +static uint16_t const UARTPrescTable[12] = { + 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U +}; + +#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) \ + + ((__BAUD__)/2U)) / (__BAUD__)) + +#define UART_PRESCALER_DIV1 0U + +// USART2 pins PA.2 and PA.3 +#define USART2_TX_PIN 2U +#define USART2_RX_PIN 3U + +//............................................................................ +uint8_t QS_onStartup(void const *arg) { + Q_UNUSED_PAR(arg); + + static uint8_t qsTxBuf[2*1024]; // buffer for QS-TX channel + QS_initBuf(qsTxBuf, sizeof(qsTxBuf)); + + static uint8_t qsRxBuf[100]; // buffer for QS-RX channel + QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); + + // enable peripheral clock for USART2 + RCC->IOPENR |= ( 1U << 0U); // Enable GPIOA clock for USART pins + RCC->APBENR1 |= ( 1U << 17U); // Enable USART#2 clock + + // Configure PA to USART2_RX, PA to USART2_TX + GPIOA->AFR[0] &= ~((15U << 4U*USART2_RX_PIN) | (15U << 4U*USART2_TX_PIN)); + GPIOA->AFR[0] |= (( 1U << 4U*USART2_RX_PIN) | ( 1U << 4U*USART2_TX_PIN)); + GPIOA->MODER &= ~(( 3U << 2U*USART2_RX_PIN) | ( 3U << 2U*USART2_TX_PIN)); + GPIOA->MODER |= (( 2U << 2U*USART2_RX_PIN) | ( 2U << 2U*USART2_TX_PIN)); + + // baud rate + USART2->BRR = UART_DIV_SAMPLING16( + SystemCoreClock, 115200U, UART_PRESCALER_DIV1); + USART2->CR3 = 0x0000U | // no flow control + (1U << 12U); // disable overrun detection (OVRDIS) + USART2->CR2 = 0x0000U; // 1 stop bit + USART2->CR1 = ((1U << 2U) | // enable RX + (1U << 3U) | // enable TX + (1U << 5U) | // enable RX interrupt + (0U << 12U) | // 8 data bits + (0U << 28U) | // 8 data bits + (1U << 0U)); // enable USART + + QS_tickPeriod_ = SystemCoreClock / BSP_TICKS_PER_SEC; + QS_tickTime_ = QS_tickPeriod_; // to start the timestamp at zero + + return 1U; // return success +} +//............................................................................ +void QS_onCleanup(void) { +} +//............................................................................ +QSTimeCtr QS_onGetTime(void) { // NOTE: invoked with interrupts DISABLED + if ((SysTick->CTRL & 0x00010000U) == 0U) { // not set? + return QS_tickTime_ - (QSTimeCtr)SysTick->VAL; + } + else { // the rollover occurred, but the SysTick_ISR did not run yet + return QS_tickTime_ + QS_tickPeriod_ - (QSTimeCtr)SysTick->VAL; + } +} +//............................................................................ +// NOTE: +// No critical section in QS_onFlush() to avoid nesting of critical sections +// in case QS_onFlush() is called from Q_onError(). +void QS_onFlush(void) { + for (;;) { + uint16_t b = QS_getByte(); + if (b != QS_EOD) { + while ((USART2->ISR & (1U << 7U)) == 0U) { // while TXE not empty + } + USART2->TDR = b; + } + else { + break; + } + } +} +//............................................................................ +void QS_onReset(void) { + NVIC_SystemReset(); +} +//............................................................................ +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ + Q_UNUSED_PAR(cmdId); + Q_UNUSED_PAR(param1); + Q_UNUSED_PAR(param2); + Q_UNUSED_PAR(param3); +} + +#endif // Q_SPY +//---------------------------------------------------------------------------- + +//============================================================================ +// NOTE1: +// The QF_AWARE_ISR_CMSIS_PRI constant from the QF port specifies the highest +// ISR priority that is disabled by the QF framework. The value is suitable +// for the NVIC_SetPriority() CMSIS function. +// +// Only ISRs prioritized at or below the QF_AWARE_ISR_CMSIS_PRI level (i.e., +// with the numerical values of priorities equal or higher than +// QF_AWARE_ISR_CMSIS_PRI) are allowed to call the QK_ISR_ENTRY/ +// QK_ISR_ENTRY macros or any other QF/QK services. These ISRs are +// "QF-aware". +// +// Conversely, any ISRs prioritized above the QF_AWARE_ISR_CMSIS_PRI priority +// level (i.e., with the numerical values of priorities less than +// QF_AWARE_ISR_CMSIS_PRI) are never disabled and are not aware of the kernel. +// Such "QF-unaware" ISRs cannot call ANY QF/QK services. In particular they +// can NOT call the macros QK_ISR_ENTRY/QK_ISR_ENTRY. The only mechanism +// by which a "QF-unaware" ISR can communicate with the QF framework is by +// triggering a "QF-aware" ISR, which can post/publish events. +// +// NOTE2: +// The User LED is used to visualize the idle loop activity. The brightness +// of the LED is proportional to the frequency of the idle loop. +// Please note that the LED is toggled with interrupts locked, so no interrupt +// execution time contributes to the brightness of the User LED. +// diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.h new file mode 100644 index 0000000..fe8149a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/bsp.h @@ -0,0 +1,49 @@ +//============================================================================ +// Product: DPP example +// Last Updated for Version: 7.3.0 +// Date of the Last Update: 2023-06-27 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef BSP_H_ +#define BSP_H_ + +#define BSP_TICKS_PER_SEC 100U + +void BSP_init(void); +void BSP_start(void); +void BSP_displayPaused(uint8_t paused); +void BSP_displayPhilStat(uint8_t n, char const *stat); +void BSP_terminate(int16_t result); + +void BSP_randomSeed(uint32_t seed); // random seed +uint32_t BSP_random(void); // pseudo-random generator + +void BSP_ledOn(void); +void BSP_ledOff(void); + +#endif // BSP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.h new file mode 100644 index 0000000..36b752f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.h @@ -0,0 +1,112 @@ +//$file${.::dpp.h} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::dpp.h} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::dpp.h} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#ifndef DPP_H_ +#define DPP_H_ + +//$declare${Shared} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AppSignals} ...................................................... +enum AppSignals { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + +//${Shared::produce_sig_dict} ................................................ +#ifdef Q_SPY +static inline void produce_sig_dict(void) { + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); + QS_SIG_DICTIONARY(DONE_SIG, (void *)0); + QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); + QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); + QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + + QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); + QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); +} +#endif // def Q_SPY + +//${Shared::N_PHILO} ......................................................... +#define N_PHILO ((uint8_t)5U) + +//${Shared::TableEvt} ........................................................ +typedef struct { +// protected: + QEvt super; + +// public: + uint8_t philoId; +} TableEvt; + +// public: +static inline TableEvt * TableEvt_init(TableEvt * const me, + uint8_t id) +{ + if (me != (TableEvt *)0) { + me->philoId = id; + } + return me; +} + +//${Shared::AO_Philo[N_PHILO]} ............................................... +extern QActive * const AO_Philo[N_PHILO]; + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id); + +//${Shared::AO_Table} ........................................................ +extern QActive * const AO_Table; + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void); +//$enddecl${Shared} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.qm b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.qm new file mode 100644 index 0000000..422de2f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/dpp.qm @@ -0,0 +1,523 @@ + + + Dining Philosopher Problem example + + + + + + + { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + + + + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); +QS_SIG_DICTIONARY(DONE_SIG, (void *)0); +QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); +QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); +QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + +QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); +QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); + + + + ((uint8_t)5U) + + + + + + + + + + if (me != (TableEvt *)0) { + me->philoId = id; +} +return me; + + + + + = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; + + + + + + Philo * const me = &Philo_inst[id]; +QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); +QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), +me->id = (uint8_t)id; + + + + = &Table_inst.super; + + + + Table * const me = &Table_inst; +QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; +} + + + + + + + The Philo AO and the N_PHILO instances + + + + + + + + + + + Q_UNUSED_PAR(par); + +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + +QActive_subscribe(&me->super, EAT_SIG); +QActive_subscribe(&me->super, TEST_SIG); + + + + + + + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + #ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); +pe->philoId = me->id; +#endif +QACTIVE_POST(AO_Table, &pe->super, &me->super); + + + + + Q_EVT_CAST(TableEvt)->philoId == me->id + + + + + + + + + + + // DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); +pe->philoId = me->id; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + + + + + + + + Q_UNUSED_PAR(par); + +#ifdef Q_SPY +Table *Table_inst = me; +QS_OBJ_DICTIONARY(Table_inst); +#endif + +QActive_subscribe(&me->super, DONE_SIG); +QActive_subscribe(&me->super, PAUSE_SIG); +QActive_subscribe(&me->super, SERVE_SIG); +QActive_subscribe(&me->super, TEST_SIG); + +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); +} + + + + + + + + + + + + + + + Q_ERROR(); + + + + + + + // give permissions to eat... +for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } +} + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, HUNGRY); +uint8_t m = left(n); + + + (me->fork[m] == FREE) && (me->fork[n] == FREE) + me->fork[m] = USED; +me->fork[n] = USED; +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else +TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); +pe->philoId = n; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); +BSP_displayPhilStat(n, EATING); + + + + + + + else + me->isHungry[n] = true; + + + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; +m = right(n); // check the right neighbor + +if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} +m = left(n); // check the left neighbor +n = left(m); // left fork of the left neighbor +if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} + + + + + + + Q_ERROR(); + + + + + + + + + + + + + + + + + BSP_displayPaused(1U); + BSP_displayPaused(0U); + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// philo ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +me->isHungry[n] = true; +BSP_displayPhilStat(n, HUNGRY); + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; + + + + + + + + + + + + + + + + + + + + #ifndef DPP_H_ +#define DPP_H_ + +$declare ${Shared} + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Philo} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +$define ${Shared::Philo_ctor} +$define ${Shared::AO_Philo[N_PHILO]} +$define ${AOs::Philo} + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Table} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +$define ${Shared::Table_ctor} +$define ${Shared::AO_Table} +$define ${AOs::Table} + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/main.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/main.c new file mode 100644 index 0000000..cfcfaf0 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/main.c @@ -0,0 +1,44 @@ +//============================================================================ +// APP example +// Last updated for version 7.3.0 +// Last updated on 2023-08-09 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// +// +//============================================================================ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//............................................................................ +int main() { + QF_init(); // initialize the framework and the underlying RT kernel + BSP_init(); // initialize the BSP + BSP_start(); // start the AOs/Threads + return QF_run(); // run the QF application +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/philo.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/philo.c new file mode 100644 index 0000000..45a2726 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/philo.c @@ -0,0 +1,254 @@ +//$file${.::philo.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::philo.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::philo.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +typedef struct Philo { +// protected: + QActive super; + +// private: + QTimeEvt timeEvt; + uint8_t id; + +// public: +} Philo; + +extern Philo Philo_inst[N_PHILO]; + +// protected: +static QState Philo_initial(Philo * const me, void const * const par); +static QState Philo_thinking(Philo * const me, QEvt const * const e); +static QState Philo_hungry(Philo * const me, QEvt const * const e); +static QState Philo_eating(Philo * const me, QEvt const * const e); +//$enddecl${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Philo_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id) { + Philo * const me = &Philo_inst[id]; + QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); + QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), + me->id = (uint8_t)id; +} +//$enddef${Shared::Philo_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Philo[N_PHILO]} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Philo[N_PHILO]} ............................................... +QActive * const AO_Philo[N_PHILO] = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; +//$enddef${Shared::AO_Philo[N_PHILO]} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +Philo Philo_inst[N_PHILO]; + +//${AOs::Philo::SM} .......................................................... +static QState Philo_initial(Philo * const me, void const * const par) { + //${AOs::Philo::SM::initial} + Q_UNUSED_PAR(par); + + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + + QActive_subscribe(&me->super, EAT_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + QS_FUN_DICTIONARY(&Philo_thinking); + QS_FUN_DICTIONARY(&Philo_hungry); + QS_FUN_DICTIONARY(&Philo_eating); + + return Q_TRAN(&Philo_thinking); +} + +//${AOs::Philo::SM::thinking} ................................................ +static QState Philo_thinking(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::thinking} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_hungry); + break; + } + //${AOs::Philo::SM::thinking::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::hungry} .................................................. +static QState Philo_hungry(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::hungry} + case Q_ENTRY_SIG: { + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); + pe->philoId = me->id; + #endif + QACTIVE_POST(AO_Table, &pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::hungry::EAT} + case EAT_SIG: { + //${AOs::Philo::SM::hungry::EAT::[e->philoId==me->iid]} + if (Q_EVT_CAST(TableEvt)->philoId == me->id) { + status_ = Q_TRAN(&Philo_eating); + } + else { + status_ = Q_UNHANDLED(); + } + break; + } + //${AOs::Philo::SM::hungry::DONE} + case DONE_SIG: { + // DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::eating} .................................................. +static QState Philo_eating(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::eating} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); + pe->philoId = me->id; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_thinking); + break; + } + //${AOs::Philo::SM::eating::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} +//$enddef${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.ld b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.ld similarity index 100% rename from arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.ld rename to cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.ld diff --git a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvoptx b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvoptx similarity index 77% rename from arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvoptx rename to cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvoptx index b123511..114ff68 100644 --- a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvoptx +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvoptx @@ -12,7 +12,7 @@ *.lib *.txt; *.h; *.inc; *.md *.plm - *.cpp + *.cpp; *.cc; *.cxx 0 @@ -22,7 +22,7 @@ - dpp-dbg + dbg 0x3 ARM-GNU @@ -45,7 +45,7 @@ 120 65 8 - .\dbg\ + .\Listings\ 1 @@ -117,31 +117,6 @@ STLink\ST-LINKIII-KEIL_SWO.dll - - 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - ST-LINKIII-KEIL_SWO - -U-O206 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(0BC11477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0 - - - 0 - DLGUARM - (105=-1,-1,-1,-1,0) - 0 UL2CM3 @@ -149,28 +124,12 @@ - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - 0 0 - 0 + 1 1 0 0 @@ -218,7 +177,7 @@ - dpp-rel + spy 0x3 ARM-GNU @@ -241,7 +200,7 @@ 120 65 8 - .\rel\ + .\Listings\ 1 @@ -320,28 +279,12 @@ - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - 0 0 - 0 + 1 1 0 0 @@ -380,7 +323,7 @@ 1 - 1 + 0 0 2 10000000 @@ -389,7 +332,7 @@ - dpp-spy + rel 0x3 ARM-GNU @@ -412,7 +355,7 @@ 120 65 8 - .\spy\ + .\Listings\ 1 @@ -491,28 +434,12 @@ - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - 0 0 - 0 + 1 1 0 0 @@ -549,16 +476,6 @@ - - - System Viewer\GPIOA - 35904 - - - System Viewer\USART2 - 35905 - - 1 0 @@ -570,7 +487,7 @@ - Source Code + Application 1 0 0 @@ -582,7 +499,7 @@ 0 0 0 - ..\bsp.c + .\bsp.c bsp.c 0 0 @@ -594,7 +511,7 @@ 0 0 0 - ..\..\bsp.h + .\bsp.h bsp.h 0 0 @@ -606,7 +523,7 @@ 0 0 0 - ..\..\dpp.h + .\dpp.h dpp.h 0 0 @@ -618,8 +535,8 @@ 0 0 0 - ..\..\philo.c - philo.c + .\main.c + main.c 0 0 @@ -630,8 +547,8 @@ 0 0 0 - ..\..\table.c - table.c + .\philo.c + philo.c 0 0 @@ -642,67 +559,43 @@ 0 0 0 - ..\..\main.c - main.c + .\table.c + table.c 0 0 - - - - nucleo-c031c6 - 1 - 0 - 0 - 0 - 2 + 1 7 - 5 + 1 0 0 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - stm32c0xx.h + .\startup_stm32c031xx.c + startup_stm32c031xx.c 0 0 - 2 + 1 8 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - stm32c031xx.h - 0 - 0 - - - 2 - 9 1 0 0 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c + .\system_stm32c0xx.c system_stm32c0xx.c 0 0 - - 2 - 10 - 1 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\gnu\startup_stm32c031xx.c - startup_stm32c031xx.c - 0 - 0 - + + + + ::CMSIS + 0 + 0 + 0 + 1 diff --git a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvprojx b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvprojx similarity index 81% rename from arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvprojx rename to cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvprojx index a00b082..47c0d2c 100644 --- a/arm-cm/dpp_nucleo-c031c6/qv/gnu-pack/dpp-qv.uvprojx +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/project.uvprojx @@ -7,10 +7,10 @@ - dpp-dbg + dbg 0x3 ARM-GNU - 6190000::V6.19::ARMCLANG + 6210000::V6.21::ARMCLANG 1 @@ -48,14 +48,14 @@ 0 1 - .\dbg\ - dpp-qv + .\Objects\ + project 1 0 1 1 0 - .\dbg\ + .\Listings\ 1 0 0 @@ -134,11 +134,11 @@ 0 1 1 - 4096 + -1 1 BIN\UL2CM3.DLL - "" () + @@ -245,7 +245,7 @@ -std=c11 -pedantic -Wall -Wextra -ffunction-sections -fdata-sections QP_CONFIG - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 + @@ -270,81 +270,69 @@ -specs=nosys.specs -specs=nano.specs -Wl,--cref,--gc-sections - dpp-qv.ld + project.ld - Source Code + Application bsp.c 1 - ..\bsp.c + .\bsp.c bsp.h 5 - ..\..\bsp.h + .\bsp.h dpp.h 5 - ..\..\dpp.h + .\dpp.h - philo.c + main.c 1 - ..\..\philo.c + .\main.c - table.c + philo.c 1 - ..\..\table.c + .\philo.c - main.c + table.c 1 - ..\..\main.c - - - - - nucleo-c031c6 - - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h + .\table.c - system_stm32c0xx.c + startup_stm32c031xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c + .\startup_stm32c031xx.c - startup_stm32c031xx.c + system_stm32c0xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\gnu\startup_stm32c031xx.c + .\system_stm32c0xx.c + + ::CMSIS + ::RTEF - dpp-rel + spy 0x3 ARM-GNU - 6190000::V6.19::ARMCLANG + 6210000::V6.21::ARMCLANG 1 @@ -382,14 +370,14 @@ 0 1 - .\rel\ - dpp-qv + .\Objects\ + project 1 0 - 0 + 1 1 0 - .\rel\ + .\Listings\ 1 0 0 @@ -577,9 +565,9 @@ 1 -std=c11 -pedantic -Wall -Wextra -ffunction-sections -fdata-sections - NDEBUG,QP_CONFIG + Q_SPY,QP_CONFIG - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 + @@ -596,89 +584,77 @@ 1 0 1 - 0 + 1 1 - - dpp-qv.ld + -specs=nosys.specs -specs=nano.specs -Wl,--cref,--gc-sections + project.ld - Source Code + Application bsp.c 1 - ..\bsp.c + .\bsp.c bsp.h 5 - ..\..\bsp.h + .\bsp.h dpp.h 5 - ..\..\dpp.h + .\dpp.h - philo.c + main.c 1 - ..\..\philo.c + .\main.c - table.c + philo.c 1 - ..\..\table.c + .\philo.c - main.c + table.c 1 - ..\..\main.c + .\table.c - - - - nucleo-c031c6 - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - - - system_stm32c0xx.c + startup_stm32c031xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c + .\startup_stm32c031xx.c - startup_stm32c031xx.c + system_stm32c0xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\gnu\startup_stm32c031xx.c + .\system_stm32c0xx.c + + ::CMSIS + ::RTEF - dpp-spy + rel 0x3 ARM-GNU - 6190000::V6.19::ARMCLANG + 6210000::V6.21::ARMCLANG 1 @@ -716,14 +692,14 @@ 0 1 - .\spy\ - dpp-qv + .\Objects\ + project 1 0 - 0 + 1 1 0 - .\spy\ + .\Listings\ 1 0 0 @@ -748,7 +724,7 @@ 0 - 0 + 1 0 objcopy --input-target=ihex --output-target=binary !H $H@P.bin @@ -906,14 +882,14 @@ 1 0 0 - 0 + 3 2 1 -std=c11 -pedantic -Wall -Wextra -ffunction-sections -fdata-sections - Q_SPY,QP_CONFIG + QP_CONFIG - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 + @@ -930,79 +906,67 @@ 1 0 1 - 0 + 1 1 - - dpp-qv.ld + -specs=nosys.specs -specs=nano.specs -Wl,--cref,--gc-sections + project.ld - Source Code + Application bsp.c 1 - ..\bsp.c + .\bsp.c bsp.h 5 - ..\..\bsp.h + .\bsp.h dpp.h 5 - ..\..\dpp.h + .\dpp.h - philo.c + main.c 1 - ..\..\philo.c + .\main.c - table.c + philo.c 1 - ..\..\table.c + .\philo.c - main.c + table.c 1 - ..\..\main.c - - - - - nucleo-c031c6 - - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h + .\table.c - system_stm32c0xx.c + startup_stm32c031xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c + .\startup_stm32c031xx.c - startup_stm32c031xx.c + system_stm32c0xx.c 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\gnu\startup_stm32c031xx.c + .\system_stm32c0xx.c + + ::CMSIS + ::RTEF @@ -1011,58 +975,70 @@ - - - - - - - - - - + + - - - + + + - - + + - - - + + + - - + + - - - + + + - - + + - - - + + + + + + + + + + + - + + RTE\Device\STM32C031C6Tx\startup_stm32c031xx.s + + + + + + RTE\Device\STM32C031C6Tx\system_stm32c0xx.c + + + + + RTE\RTEF\qp_config.h - - + + - - - + + + @@ -1071,12 +1047,8 @@ - dpp-qv + project 1 - QP example - example - GPL-3.0-or-later OR LicenseRef-QL-commercial - https://www.state-machine.com/qpc diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/startup_stm32c031xx.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/startup_stm32c031xx.c new file mode 100644 index 0000000..5df05ae --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/startup_stm32c031xx.c @@ -0,0 +1,213 @@ +/* File: startup_stm32c031xx.c for GNU-ARM + * Purpose: startup file for STM32C031xx Cortex-M0+ device. + * Should be used with GCC 'GNU Tools ARM Embedded' + * Version: CMSIS 5.0.1 + * Date: 2017-09-13 + * + * Modified by Quantum Leaps: + * - Added relocating of the Vector Table to free up the 256B region at 0x0 + * for NULL-pointer protection by the MPU. + * - Modified all exception handlers to branch to assert_failed() + * instead of locking up the CPU inside an endless loop. + * + * Created from the CMSIS template for the specified device + * Quantum Leaps, www.state-machine.com + * + * NOTE: + * The function assert_failed defined at the end of this file defines + * the error/assertion handling policy for the application and might + * need to be customized for each project. This function is defined in + * assembly to re-set the stack pointer, in case it is corrupted by the + * time assert_failed is called. + */ + +/* start and end of stack defined in the linker script ---------------------*/ +/*extern int __stack_start__;*/ +extern int __stack_end__; + +/* Weak prototypes for error handlers --------------------------------------*/ +/** +* \note +* The function assert_failed defined at the end of this file defines +* the error/assertion handling policy for the application and might +* need to be customized for each project. This function is defined in +* assembly to avoid accessing the stack, which might be corrupted by +* the time assert_failed is called. +*/ +__attribute__ ((naked, noreturn)) +void assert_failed(char const *module, int loc); + +/* Function prototypes -----------------------------------------------------*/ +void Default_Handler(void); /* Default empty handler */ +void Reset_Handler(void); /* Reset Handler */ +void SystemInit(void); /* CMSIS system initialization */ + +/*---------------------------------------------------------------------------- +* weak aliases for each Exception handler to the Default_Handler. +* Any function with the same name will override these definitions. +*/ +/* Cortex-M Processor fault exceptions... */ +void NMI_Handler (void) __attribute__ ((weak)); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak)); +void BusFault_Handler (void) __attribute__ ((weak)); +void UsageFault_Handler (void) __attribute__ ((weak)); + +/* Cortex-M Processor non-fault exceptions... */ +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* external interrupts... */ +void WWDG_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void RTC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void FLASH_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void RCC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void EXTI0_1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void EXTI2_3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void EXTI4_15_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved8_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_Channel1_IRQHandler(void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_Channel2_3_IRQHandler(void) __attribute__ ((weak, alias("Default_Handler"))); +void DMAMUX1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ADC1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM1_BRK_UP_TRG_COM_IRQHandler(void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM1_CC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved15_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved17_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved18_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM14_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved20_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM16_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIM17_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2C1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved24_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved26_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void USART1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void USART2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved29_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved30_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Reserved31_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/*..........................................................................*/ +__attribute__ ((section(".isr_vector"))) +int const g_pfnVectors[] = { + (int)&__stack_end__, /* Top of Stack */ + (int)&Reset_Handler, /* Reset Handler */ + (int)&NMI_Handler, /* NMI Handler */ + (int)&HardFault_Handler, /* Hard Fault Handler */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&Default_Handler, /* Reserved */ + (int)&SVC_Handler, /* SVCall handler */ + (int)&DebugMon_Handler, /* Debug monitor handler */ + (int)&Default_Handler, /* Reserved */ + (int)&PendSV_Handler, /* The PendSV handler */ + (int)&SysTick_Handler, /* The SysTick handler */ + + /*IRQ handlers... */ + (int)&WWDG_IRQHandler, /* [ 0] Window Watchdog */ + (int)&Reserved1_IRQHandler, /* [ 1] Reserved */ + (int)&RTC_IRQHandler, /* [ 2] RTC through EXTI Line */ + (int)&FLASH_IRQHandler, /* [ 3] FLASH */ + (int)&RCC_IRQHandler, /* [ 4] RCC */ + (int)&EXTI0_1_IRQHandler, /* [ 5] EXTI Line 0 and 1 */ + (int)&EXTI2_3_IRQHandler, /* [ 6] EXTI Line 2 and 3 */ + (int)&EXTI4_15_IRQHandler, /* [ 7] EXTI Line 4 to 15 */ + (int)&Reserved8_IRQHandler, /* [ 8] Reserved */ + (int)&DMA1_Channel1_IRQHandler,/* [ 9] DMA1 Channel 1 */ + (int)&DMA1_Channel2_3_IRQHandler,/* [10] DMA1 Channel 2 and Channel 3 */ + (int)&DMAMUX1_IRQHandler, /* [11] DMAMUX */ + (int)&ADC1_IRQHandler, /* [12] ADC1 */ + (int)&TIM1_BRK_UP_TRG_COM_IRQHandler,/* [13] TIM1 Break,Update,Trigger & Comm */ + (int)&TIM1_CC_IRQHandler, /* [14] TIM1 Capture Compare */ + (int)&Reserved15_IRQHandler, /* [15] Reserved */ + (int)&TIM3_IRQHandler, /* [16] TIM3 */ + (int)&Reserved17_IRQHandler, /* [17] Reserved */ + (int)&Reserved18_IRQHandler, /* [18] Reserved */ + (int)&TIM14_IRQHandler, /* [19] TIM14 */ + (int)&Reserved20_IRQHandler, /* [20] Reserved */ + (int)&TIM16_IRQHandler, /* [21] TIM16 */ + (int)&TIM17_IRQHandler, /* [22] TIM17 */ + (int)&I2C1_IRQHandler, /* [23] I2C1 */ + (int)&Reserved24_IRQHandler, /* [24] Reserved */ + (int)&SPI1_IRQHandler, /* [25] SPI1 */ + (int)&Reserved26_IRQHandler, /* [26] Reserved */ + (int)&USART1_IRQHandler, /* [27] USART1 */ + (int)&USART2_IRQHandler, /* [28] USART2 */ + (int)&Reserved29_IRQHandler, /* [29] Reserved */ + (int)&Reserved30_IRQHandler, /* [30] Reserved */ + (int)&Reserved31_IRQHandler, /* [31] Reserved */ +}; + +/* reset handler -----------------------------------------------------------*/ +__attribute__((naked)) void Reset_Handler(void); +void Reset_Handler(void) { + extern int main(void); + extern int __libc_init_array(void); + extern unsigned __data_start; /* start of .data in the linker script */ + extern unsigned __data_end__; /* end of .data in the linker script */ + extern unsigned const __data_load; /* initialization values for .data */ + extern unsigned __bss_start__; /* start of .bss in the linker script */ + extern unsigned __bss_end__; /* end of .bss in the linker script */ + extern void software_init_hook(void) __attribute__((weak)); + + SystemInit(); /* CMSIS system initialization */ + + /* copy the data segment initializers from flash to RAM... */ + unsigned const *src = &__data_load; + unsigned *dst; + for (dst = &__data_start; dst < &__data_end__; ++dst, ++src) { + *dst = *src; + } + + /* zero fill the .bss segment in RAM... */ + for (dst = &__bss_start__; dst < &__bss_end__; ++dst) { + *dst = 0; + } + + /* init hook provided? */ + if (&software_init_hook != (void (*)(void))(0)) { + /* give control to the RTOS */ + software_init_hook(); /* this will also call __libc_init_array */ + } + else { + /* call all static constructors in C++ (harmless in C programs) */ + //__libc_init_array(); + (void)main(); /* application's entry point; should never return! */ + } + + /* the previous code should not return, but assert just in case... */ + __asm volatile (" CPSID i"); + assert_failed("Reset_Handler", 1U); +} + +/* fault exception handlers ------------------------------------------------*/ +__attribute__((naked)) void NMI_Handler(void); +void NMI_Handler(void) { + /* disable interrupts and reset SP in case of stack overflow */ + __asm volatile (" CPSID i\n MOV sp,%0" : : "r" (&__stack_end__)); + assert_failed("NMI", 1U); +} +/*..........................................................................*/ +__attribute__((naked)) void HardFault_Handler(void); +void HardFault_Handler(void) { + /* disable interrupts and reset SP in case of stack overflow */ + __asm volatile (" CPSID i\n MOV sp,%0" : : "r" (&__stack_end__)); + assert_failed("HardFault", 1U); +} +/*..........................................................................*/ +__attribute__((naked)) void Default_Handler(void); +void Default_Handler(void) { + /* disable interrupts and reset SP in case of stack overflow */ + __asm volatile (" CPSID i\n MOV sp,%0" : : "r" (&__stack_end__)); + assert_failed("Default", 1U); +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/stm32-nucleo-c031c6.jpg b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/stm32-nucleo-c031c6.jpg new file mode 100644 index 0000000..6647e2d Binary files /dev/null and b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/stm32-nucleo-c031c6.jpg differ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/system_stm32c0xx.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/system_stm32c0xx.c new file mode 100644 index 0000000..3556e50 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/system_stm32c0xx.c @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/table.c b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/table.c new file mode 100644 index 0000000..c705fcc --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-gcc/table.c @@ -0,0 +1,342 @@ +//$file${.::table.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::table.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::table.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +typedef struct Table { +// protected: + QActive super; + +// private: + uint8_t fork[N_PHILO]; + bool isHungry[N_PHILO]; + +// public: +} Table; + +extern Table Table_inst; + +// protected: +static QState Table_initial(Table * const me, void const * const par); +static QState Table_active(Table * const me, QEvt const * const e); +static QState Table_serving(Table * const me, QEvt const * const e); +static QState Table_paused(Table * const me, QEvt const * const e); +//$enddecl${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Table_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void) { + Table * const me = &Table_inst; + QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + } +} +//$enddef${Shared::Table_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Table} ........................................................ +QActive * const AO_Table = &Table_inst.super; +//$enddef${Shared::AO_Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +Table Table_inst; + +//${AOs::Table::SM} .......................................................... +static QState Table_initial(Table * const me, void const * const par) { + //${AOs::Table::SM::initial} + Q_UNUSED_PAR(par); + + #ifdef Q_SPY + Table *Table_inst = me; + QS_OBJ_DICTIONARY(Table_inst); + #endif + + QActive_subscribe(&me->super, DONE_SIG); + QActive_subscribe(&me->super, PAUSE_SIG); + QActive_subscribe(&me->super, SERVE_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); + } + + QS_FUN_DICTIONARY(&Table_active); + QS_FUN_DICTIONARY(&Table_serving); + QS_FUN_DICTIONARY(&Table_paused); + + return Q_TRAN(&Table_serving); +} + +//${AOs::Table::SM::active} .................................................. +static QState Table_active(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::serving} ......................................... +static QState Table_serving(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::serving} + case Q_ENTRY_SIG: { + // give permissions to eat... + for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, HUNGRY); + uint8_t m = left(n); + //${AOs::Table::SM::active::serving::HUNGRY::[bothfree]} + if ((me->fork[m] == FREE) && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(n, EATING); + status_ = Q_HANDLED(); + } + //${AOs::Table::SM::active::serving::HUNGRY::[else]} + else { + me->isHungry[n] = true; + status_ = Q_HANDLED(); + } + break; + } + //${AOs::Table::SM::active::serving::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + m = right(n); // check the right neighbor + + if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + m = left(n); // check the left neighbor + n = left(m); // left fork of the left neighbor + if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::PAUSE} + case PAUSE_SIG: { + status_ = Q_TRAN(&Table_paused); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::paused} .......................................... +static QState Table_paused(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::paused} + case Q_ENTRY_SIG: { + BSP_displayPaused(1U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused} + case Q_EXIT_SIG: { + BSP_displayPaused(0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::SERVE} + case SERVE_SIG: { + status_ = Q_TRAN(&Table_serving); + break; + } + //${AOs::Table::SM::active::paused::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // philo ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + me->isHungry[n] = true; + BSP_displayPhilStat(n, HUNGRY); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} +//$enddef${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/README.md b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/README.md new file mode 100644 index 0000000..622c29d --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/README.md @@ -0,0 +1,64 @@ +# About this project + +This project is for KEIL uVision IDE with the ARM Compiler 6, +and the NUCLEO-C031C6 board: + +![](stm32-nucleo-c031c6.jpg) + +This project demonstrates: +- Using the QP/C Framework from the CMSIS-pack + + Using the preemptive, non-blocking QK kernel +- DPP (Dining Philosopher Problem) example application + + code generated from a QM model, which can be edited manually, + or with graphical QM modeling tool. +- Debug configuration +- Spy configuration with software tracing + + +# Steps to use this project + +1. Open the `project.uvprojx` in KEIL uVision IDE +2. Build the project (default `dbg` configuration) +5. Connect the NUCLEO-C031C6 board and Run/Debug the project + + +# Using the Spy configuration + +1. Select the `spy` target from the drop-down menu in the top toolbar +2. Build the project (`spy` configuration) +4. Open a terminal window and type "qspy -c ", where is the serial + port of your NUCLEO-C031C6 board +5. Start debugging / run the program +6. The qspy window should start showing the output. + + +# Modifying the example + +The example code is located in the project folder: + +``` +dpp_nucleo-c031c6-qk-keil +| +| bsp.c +| bsp.h +| dpp.h <-- generated +| dpp.qm <-- QM model file +| main.c +| philo.c <-- generated +| project.sct +| project.uvoptx +| project.uvprojx +| README.md +| table.c <-- generated +| +\---RTE + +---Device + | \---STM32C031C6Tx + | . . . +``` + +The example code can be edited manually, as any regular C code. + +However, it is also possible (and recommended) to model the application +graphically by means of the QM modeling tool and then **generate** the +code automatically. The example model is located in the file `Core/dpp.qm`. diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s new file mode 100644 index 0000000..ca7879a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s @@ -0,0 +1,231 @@ +;****************************************************************************** +;* File Name : startup_stm32c031xx.s +;* Author : MCD Application Team +;* Description : STM32C031xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2022 STMicroelectronics. +;* All rights reserved. +;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 2048 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD 0 ; Reserved + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD 0 ; Reserved + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMAMUX1_IRQHandler ; DMAMUX + DCD ADC1_IRQHandler ; ADC1 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD 0 ; Reserved + DCD TIM3_IRQHandler ; TIM3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD 0 ; Reserved + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD 0 ; Reserved + DCD SPI1_IRQHandler ; SPI1 + DCD 0 ; Reserved + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMAMUX1_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + +WWDG_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMAMUX1_IRQHandler +ADC1_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM3_IRQHandler +TIM14_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +SPI1_IRQHandler +USART1_IRQHandler +USART2_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 new file mode 100644 index 0000000..1db9ecf --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/startup_stm32c031xx.s.base@1.0.0 @@ -0,0 +1,231 @@ +;****************************************************************************** +;* File Name : startup_stm32c031xx.s +;* Author : MCD Application Team +;* Description : STM32C031xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2022 STMicroelectronics. +;* All rights reserved. +;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD 0 ; Reserved + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD 0 ; Reserved + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMAMUX1_IRQHandler ; DMAMUX + DCD ADC1_IRQHandler ; ADC1 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD 0 ; Reserved + DCD TIM3_IRQHandler ; TIM3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD 0 ; Reserved + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD 0 ; Reserved + DCD SPI1_IRQHandler ; SPI1 + DCD 0 ; Reserved + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMAMUX1_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + +WWDG_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMAMUX1_IRQHandler +ADC1_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM3_IRQHandler +TIM14_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +SPI1_IRQHandler +USART1_IRQHandler +USART2_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c new file mode 100644 index 0000000..f0e137f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 new file mode 100644 index 0000000..3556e50 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/Device/STM32C031C6Tx/system_stm32c0xx.c.base@1.0.0 @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h new file mode 100644 index 0000000..4d47fcd --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h @@ -0,0 +1,271 @@ +//============================================================================ +// QP configuration file (QK on ARM Cortex-M) +// Last updated for version: 7.3.0 +// Last updated on: 2023-10-30 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef QP_CONFIG_H_ +#define QP_CONFIG_H_ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- + +// NOTE: Requires command-line macro: QP_CONFIG +// This qp_config.h header file is activated only when the macro +// QP_CONFIG is defined on the command-line to the compiler +// ------------------------------------------- + +// QP API compatibility version (QP_API_VERSION) +// <0=> 0 (Maximum compatibility) +// <580=>580 (QP 5.8.0 or newer) +// <660=>660 (QP 6.6.0 or newer) +// <691=>691 (QP 6.9.1 or newer) +// <700=>700 (QP 7.0.0 or newer) +// <9999=>9999 (Latest only) +// QP API backwards compatibility with the QP/C API version. +// Lower QP_API_VERSION values enable backwards compatibility +// with lower (older) QP API versions. +// For example, QP_API_VERSION==691 will enable the compatibility +// layer with QP version 6.9.1 and newer, but not older than 6.9.1. +// QP_API_VERSION==0 enables the maximum currently supported +// backwards compatibility. Conversely, QP_API_VERSION==9999 means +// that no backwards compatibility layer should be enabled. +// Default: 0 (All supported) +#define QP_API_VERSION 0 + +//.......................................................................... +// QP Functional Safety (FuSa) Subsystem (Q_UNSAFE) +// The QP FuSa Subsystem consists of the following facilities: +// - Software assertions as a recommended technique +// (called Failure Assertion Programming (FAP) in IEC 61508) +// - Software Self-Monitoring (SSM), which encompasses such techniques: +// * Duplicate Inverse Storage for critical variables +// * Memory Markers for critical objects (e.g., events) +// * Hard-limits for all loops +// * Memory Isolation by means of Memory Protection Unit (MPU) + +// Disable QP FuSa in development +// Disable assertions and other self monitoring features +// in development build configurations (NDEBUG undefined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifndef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// Disable QP FuSa in production release +// Disable assertions and other self monitoring features +// in the release build configurations (NDEBUG defined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifdef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// + +//.......................................................................... +// QEP Event Processor +// Events and state machines. + +// Event signal size (Q_SIGNAL_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the QEvt signal for QEP/QF [bytes] +// Default: 2 +#define Q_SIGNAL_SIZE 2U + +// + +//.......................................................................... +// QF Framework +// Active Object framework + +// Maximum # Active Objects (QF_MAX_ACTIVE) <1-64> +// Maximum # Active Objects in the system <1..64> +// Default: 32 +#define QF_MAX_ACTIVE 32U + +// Maximum # event pools (QF_MAX_EPOOL) +// <0=>0 no event pools +// <1=>1 <2=>2 <3=>3 (default) <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # Event Pools <1..15> +// Default: 3 +#define QF_MAX_EPOOL 3U + +// Maximum # clock tick rates (QF_MAX_TICK_RATE) +// <0=>0 no time events +// <1=>1 (default) <2=>2 <3=>3 <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # clock tick rates for time events <1..15> +// Default: 1 +#define QF_MAX_TICK_RATE 1U + +// Dynamic Event Constructor (QEVT_DYN_CTOR) +// Dynamic Event Constructor (RAII) +//#define QEVT_DYN_CTOR +// + +// Active Object stop API (QACTIVE_CAN_STOP) +// Enable Active Object stop API (Not recommended) +//#define QACTIVE_CAN_STOP +// + +// Event size (QF_EVENT_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the dynamic events for QF [bytes] +// Default: 2 (64K bytes maximum event size) +#define QF_EVENT_SIZ_SIZE 2U + +// Time event counter size (QF_TIMEEVT_CTR_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the QTimeEvt counter [bytes] +// Default: 4 (2^32 dynamic range) +#define QF_TIMEEVT_CTR_SIZE 4U + +// Event queue counter size (QF_EQUEUE_CTR_SIZE) +// <1U=>1 (default) +// <2U=>2 +// <4U=>4 +// Size of event queue counter [bytes] +// Default: 1 (255 events maximum in a queue) +#define QF_EQUEUE_CTR_SIZE 1U + +// Memory pool counter size (QF_MPOOL_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool counter [bytes] +// Default: 2 (64K blocks maximum in a pool) +#define QF_MPOOL_CTR_SIZE 2U + +// Memory block size (QF_MPOOL_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool block [bytes] +// Default: 2 (64K bytes maximum block size) +#define QF_MPOOL_SIZ_SIZE 2U + +// + +//.......................................................................... +// QS Software Tracing +// Target-resident component of QP/Spy software tracing system +// (tracing instrumenation and command-input). + +// NOTE: Requires command-line macro: Q_SPY +// The QS software tracing instrumenation is activated only when +// the macro Q_SPY is defined on the command-line to the compiler. +// Typically, Q_SPY is defined only in the "spy" build configuration. + +// QS timestamp size (QS_TIME_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the timestamp in QS [bytes] +// Default: 4 (2^32 dynamic range) +#define QS_TIME_SIZE 4U + +// Object pointer size (QS_OBJ_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of object pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_OBJ_PTR_SIZE 4U + +// Function pointer size (QS_FUN_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of function pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_FUN_PTR_SIZE 4U + +// QS buffer counter size (QS_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the counter in the internal QS buffer [bytes] +// Default: 2 (64K bytes in QS buffer) +#define QS_CTR_SIZE 2U + +// + +//.......................................................................... +// QK Preemptive Non-Blocking Kernel +// Preemptive non-blocking/blocking RTOS kernel. + +// Context switch callback (QF_ON_CONTEXT_SW) + +// Context switch callback WITHOUT QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is undefined. +//#ifndef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// Context switch callback WITH QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is defined. +#ifdef Q_SPY +#define QF_ON_CONTEXT_SW +#endif +// + +// + +// MPU memory isolation (QF_MEM_ISOLATE) +// Enable memory isolation (requires MPU) +// NOTE: implies QF_ON_CONTEXT_SW. +//#define QF_MEM_ISOLATE +// + +// Use IRQ handler for QK return-from-preemption +// Enable this option only if the NMI handler is used in the project. +// If enabled, provide the otherwise unused IRQ number (QK_USE_IRQ_NUM) +// and the corresponding IRQ handler name (QK_USE_IRQ_HANDLER) +// in the "Text Editor" mode. +//#define QK_USE_IRQ_NUM 31 +//#define QK_USE_IRQ_HANDLER Reserved31_IRQHandler +// + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#endif // QP_CONFIG_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h.base@7.3.4 b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h.base@7.3.4 new file mode 100644 index 0000000..afba217 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/RTEF/qp_config.h.base@7.3.4 @@ -0,0 +1,271 @@ +//============================================================================ +// QP configuration file (QK on ARM Cortex-M) +// Last updated for version: 7.3.0 +// Last updated on: 2023-10-30 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef QP_CONFIG_H_ +#define QP_CONFIG_H_ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- + +// NOTE: Requires command-line macro: QP_CONFIG +// This qp_config.h header file is activated only when the macro +// QP_CONFIG is defined on the command-line to the compiler +// ------------------------------------------- + +// QP API compatibility version (QP_API_VERSION) +// <0=> 0 (Maximum compatibility) +// <580=>580 (QP 5.8.0 or newer) +// <660=>660 (QP 6.6.0 or newer) +// <691=>691 (QP 6.9.1 or newer) +// <700=>700 (QP 7.0.0 or newer) +// <9999=>9999 (Latest only) +// QP API backwards compatibility with the QP/C API version. +// Lower QP_API_VERSION values enable backwards compatibility +// with lower (older) QP API versions. +// For example, QP_API_VERSION==691 will enable the compatibility +// layer with QP version 6.9.1 and newer, but not older than 6.9.1. +// QP_API_VERSION==0 enables the maximum currently supported +// backwards compatibility. Conversely, QP_API_VERSION==9999 means +// that no backwards compatibility layer should be enabled. +// Default: 0 (All supported) +#define QP_API_VERSION 0 + +//.......................................................................... +// QP Functional Safety (FuSa) Subsystem (Q_UNSAFE) +// The QP FuSa Subsystem consists of the following facilities: +// - Software assertions as a recommended technique +// (called Failure Assertion Programming (FAP) in IEC 61508) +// - Software Self-Monitoring (SSM), which encompasses such techniques: +// * Duplicate Inverse Storage for critical variables +// * Memory Markers for critical objects (e.g., events) +// * Hard-limits for all loops +// * Memory Isolation by means of Memory Protection Unit (MPU) + +// Disable QP FuSa in development +// Disable assertions and other self monitoring features +// in development build configurations (NDEBUG undefined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifndef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// Disable QP FuSa in production release +// Disable assertions and other self monitoring features +// in the release build configurations (NDEBUG defined). +// VIOLATES functional safety standards. NOT recommended !!! +//#ifdef NDEBUG +//#define Q_UNSAFE +//#endif +// + +// + +//.......................................................................... +// QEP Event Processor +// Events and state machines. + +// Event signal size (Q_SIGNAL_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the QEvt signal for QEP/QF [bytes] +// Default: 2 +#define Q_SIGNAL_SIZE 2U + +// + +//.......................................................................... +// QF Framework +// Active Object framework + +// Maximum # Active Objects (QF_MAX_ACTIVE) <1-64> +// Maximum # Active Objects in the system <1..64> +// Default: 32 +#define QF_MAX_ACTIVE 32U + +// Maximum # event pools (QF_MAX_EPOOL) +// <0=>0 no event pools +// <1=>1 <2=>2 <3=>3 (default) <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # Event Pools <1..15> +// Default: 3 +#define QF_MAX_EPOOL 3U + +// Maximum # clock tick rates (QF_MAX_TICK_RATE) +// <0=>0 no time events +// <1=>1 (default) <2=>2 <3=>3 <4=>4 <5=>5 +// <6=>6 <7=>7 <8=>8 <9=>9 <10=>10 <11=>11 +// <12=>12 <13=>13 <14=>14 <15=>15 +// Maximum # clock tick rates for time events <1..15> +// Default: 1 +#define QF_MAX_TICK_RATE 1U + +// Dynamic Event Constructor (QEVT_DYN_CTOR) +// Dynamic Event Constructor (RAII) +//#define QEVT_DYN_CTOR +// + +// Active Object stop API (QACTIVE_CAN_STOP) +// Enable Active Object stop API (Not recommended) +//#define QACTIVE_CAN_STOP +// + +// Event size (QF_EVENT_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the dynamic events for QF [bytes] +// Default: 2 (64K bytes maximum event size) +#define QF_EVENT_SIZ_SIZE 2U + +// Time event counter size (QF_TIMEEVT_CTR_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the QTimeEvt counter [bytes] +// Default: 4 (2^32 dynamic range) +#define QF_TIMEEVT_CTR_SIZE 4U + +// Event queue counter size (QF_EQUEUE_CTR_SIZE) +// <1U=>1 (default) +// <2U=>2 +// <4U=>4 +// Size of event queue counter [bytes] +// Default: 1 (255 events maximum in a queue) +#define QF_EQUEUE_CTR_SIZE 1U + +// Memory pool counter size (QF_MPOOL_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool counter [bytes] +// Default: 2 (64K blocks maximum in a pool) +#define QF_MPOOL_CTR_SIZE 2U + +// Memory block size (QF_MPOOL_SIZ_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of memory pool block [bytes] +// Default: 2 (64K bytes maximum block size) +#define QF_MPOOL_SIZ_SIZE 2U + +// + +//.......................................................................... +// QS Software Tracing +// Target-resident component of QP/Spy software tracing system +// (tracing instrumenation and command-input). + +// NOTE: Requires command-line macro: Q_SPY +// The QS software tracing instrumenation is activated only when +// the macro Q_SPY is defined on the command-line to the compiler. +// Typically, Q_SPY is defined only in the "spy" build configuration. + +// QS timestamp size (QS_TIME_SIZE) +// <1U=>1 +// <2U=>2 +// <4U=>4 (default) +// Size of the timestamp in QS [bytes] +// Default: 4 (2^32 dynamic range) +#define QS_TIME_SIZE 4U + +// Object pointer size (QS_OBJ_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of object pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_OBJ_PTR_SIZE 4U + +// Function pointer size (QS_FUN_PTR_SIZE) +// <2U=>2 +// <4U=>4 (default) +// <8U=>8 +// Size of function pointer for QS [bytes] +// Default: 4 (4G address space) +#define QS_FUN_PTR_SIZE 4U + +// QS buffer counter size (QS_CTR_SIZE) +// <1U=>1 +// <2U=>2 (default) +// <4U=>4 +// Size of the counter in the internal QS buffer [bytes] +// Default: 2 (64K bytes in QS buffer) +#define QS_CTR_SIZE 2U + +// + +//.......................................................................... +// QK Preemptive Non-Blocking Kernel +// Preemptive non-blocking/blocking RTOS kernel. + +// Context switch callback (QF_ON_CONTEXT_SW) + +// Context switch callback WITHOUT QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is undefined. +//#ifndef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// Context switch callback WITH QS +// Enable context switch callback QF_onContextSw() +// When Q_SPY is defined. +//#ifdef Q_SPY +//#define QF_ON_CONTEXT_SW +//#endif +// + +// + +// MPU memory isolation (QF_MEM_ISOLATE) +// Enable memory isolation (requires MPU) +// NOTE: implies QF_ON_CONTEXT_SW. +//#define QF_MEM_ISOLATE +// + +// Use IRQ handler for QK return-from-preemption +// Enable this option only if the NMI handler is used in the project. +// If enabled, provide the otherwise unused IRQ number (QK_USE_IRQ_NUM) +// and the corresponding IRQ handler name (QK_USE_IRQ_HANDLER) +// in the "Text Editor" mode. +//#define QK_USE_IRQ_NUM 31 +//#define QK_USE_IRQ_HANDLER Reserved31_IRQHandler +// + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#endif // QP_CONFIG_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_dbg/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_dbg/RTE_Components.h new file mode 100644 index 0000000..0fe09c1 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_dbg/RTE_Components.h @@ -0,0 +1,29 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'project' + * Target: 'dbg' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32c0xx.h" + +/* Keil::Device:Startup@1.0.0 */ +#define RTE_DEVICE_STARTUP_STM32C0XX /* Device Startup for STM32C0 */ +/* QuantumLeaps::RTEF&qpc:Event Processor&qep@7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +/* QuantumLeaps::RTEF&qpc:Framework&qf@7.3.4 */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +/* QuantumLeaps::RTEF&qpc:Real-Time Kernel&qk@7.3.4 */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_spy/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_spy/RTE_Components.h new file mode 100644 index 0000000..7ab3441 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/RTE/_spy/RTE_Components.h @@ -0,0 +1,31 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'project' + * Target: 'spy' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32c0xx.h" + +/* Keil::Device:Startup@1.0.0 */ +#define RTE_DEVICE_STARTUP_STM32C0XX /* Device Startup for STM32C0 */ +/* QuantumLeaps::RTEF&qpc:Event Processor&qep@7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +/* QuantumLeaps::RTEF&qpc:Framework&qf@7.3.4 */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +/* QuantumLeaps::RTEF&qpc:Real-Time Kernel&qk@7.3.4 */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ +/* QuantumLeaps::RTEF&qpc:Software tracing&qs@7.3.4 */ +#define RTE_RTEF_QPC_QS /* QP/C QS */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.c b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.c new file mode 100644 index 0000000..586c75a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.c @@ -0,0 +1,521 @@ +//============================================================================ +// Product: DPP example, NUCLEO-C031C6 board, QK kernel +// Last updated for version 7.3.3 +// Last updated on 2023-12-13 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// +// +//============================================================================ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +#include "stm32c0xx.h" // CMSIS-compliant header file for the MCU used +// add other drivers if necessary... + +Q_DEFINE_THIS_FILE // define the name of this file for assertions + +// Local-scope defines ----------------------------------------------------- +// LED pins available on the board (just one user LED LD4--Green on PA.5) +#define LD4_PIN 5U + +// Button pins available on the board (just one user Button B1 on PC.13) +#define B1_PIN 13U + +// Local-scope objects ----------------------------------------------------- +static uint32_t l_rndSeed; + +#ifdef Q_SPY + + QSTimeCtr QS_tickTime_; + QSTimeCtr QS_tickPeriod_; + + // QSpy source IDs + static QSpyId const l_SysTick_Handler = { 0U }; + static QSpyId const l_EXTI0_1_IRQHandler = { 0U }; + + enum AppRecords { // application-specific trace records + PHILO_STAT = QS_USER, + PAUSED_STAT, + CONTEXT_SW, + }; + +#endif + +//============================================================================ +// Error handler and ISRs... + +Q_NORETURN Q_onError(char const * const module, int_t const id) { + // NOTE: this implementation of the assertion handler is intended only + // for debugging and MUST be changed for deployment of the application + // (assuming that you ship your production code with assertions enabled). + Q_UNUSED_PAR(module); + Q_UNUSED_PAR(id); + QS_ASSERTION(module, id, 10000U); + +#ifndef NDEBUG + // light up the user LED + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + // for debugging, hang on in an endless loop... + for (;;) { + } +#endif + + NVIC_SystemReset(); +} +//............................................................................ +// assertion failure handler for the STM32 library, including the startup code +void assert_failed(char const * const module, int_t const id); // prototype +void assert_failed(char const * const module, int_t const id) { + Q_onError(module, id); +} + +// ISRs used in the application ============================================ + +void SysTick_Handler(void); // prototype +void SysTick_Handler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + QTIMEEVT_TICK_X(0U, &l_SysTick_Handler); // time events at rate 0 + + // Perform the debouncing of buttons. The algorithm for debouncing + // adapted from the book "Embedded Systems Dictionary" by Jack Ganssle + // and Michael Barr, page 71. + static struct { + uint32_t depressed; + uint32_t previous; + } buttons = { 0U, 0U }; + + uint32_t current = ~GPIOC->IDR; // read Port C with state of Button B1 + uint32_t tmp = buttons.depressed; // save the depressed buttons + buttons.depressed |= (buttons.previous & current); // set depressed + buttons.depressed &= (buttons.previous | current); // clear released + buttons.previous = current; // update the history + tmp ^= buttons.depressed; // changed debounced depressed + current = buttons.depressed; + + if ((tmp & (1U << B1_PIN)) != 0U) { // debounced B1 state changed? + if ((current & (1U << B1_PIN)) != 0U) { // is B1 depressed? + static QEvt const pauseEvt = QEVT_INITIALIZER(PAUSE_SIG); + QACTIVE_PUBLISH(&pauseEvt, &l_SysTick_Handler); + } + else { // the button is released + static QEvt const serveEvt = QEVT_INITIALIZER(SERVE_SIG); + QACTIVE_PUBLISH(&serveEvt, &l_SysTick_Handler); + } + } + +#ifdef Q_SPY + tmp = SysTick->CTRL; // clear CTRL_COUNTFLAG + QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover +#endif + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} +//............................................................................ +// interrupt handler for testing preemptions in QK +void EXTI0_1_IRQHandler(void); // prototype +void EXTI0_1_IRQHandler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + static QEvt const testEvt = QEVT_INITIALIZER(TEST_SIG); + QACTIVE_POST(AO_Table, &testEvt, &l_EXTI0_1_IRQHandler); + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} + +//............................................................................ +#ifdef Q_SPY +// ISR for receiving bytes from the QSPY Back-End +// NOTE: This ISR is "QF-unaware" meaning that it does not interact with +// the QF/QK and is not disabled. Such ISRs don't need to call +// QK_ISR_ENTRY/QK_ISR_EXIT and they cannot post or publish events. + +void USART2_IRQHandler(void); // prototype +void USART2_IRQHandler(void) { // used in QS-RX (kernel UNAWARE interrutp) + // is RX register NOT empty? + if ((USART2->ISR & (1U << 5U)) != 0U) { + uint32_t b = USART2->RDR; + QS_RX_PUT(b); + } + + QK_ARM_ERRATUM_838869(); +} +#endif // Q_SPY + +//............................................................................ +#ifdef QF_ON_CONTEXT_SW +// NOTE: the context-switch callback is called with interrupts DISABLED +void QF_onContextSw(QActive *prev, QActive *next) { + QS_BEGIN_INCRIT(CONTEXT_SW, 0U) // in critical section! + QS_OBJ(prev); + QS_OBJ(next); + QS_END_INCRIT() +} +#endif // QF_ON_CONTEXT_SW + + +//============================================================================ +// BSP functions... + +void BSP_init(void) { + // Configure the MPU to prevent NULL-pointer dereferencing ... + MPU->RBAR = 0x0U // base address (NULL) + | MPU_RBAR_VALID_Msk // valid region + | (MPU_RBAR_REGION_Msk & 7U); // region #7 + MPU->RASR = (7U << MPU_RASR_SIZE_Pos) // 2^(7+1) region + | (0x0U << MPU_RASR_AP_Pos) // no-access region + | MPU_RASR_ENABLE_Msk; // region enable + MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk // enable background region + | MPU_CTRL_ENABLE_Msk; // enable the MPU + __ISB(); + __DSB(); + + // NOTE: SystemInit() has been already called from the startup code + // but SystemCoreClock needs to be updated + SystemCoreClockUpdate(); + + // enable GPIOA clock port for the LED LD4 + RCC->IOPENR |= (1U << 0U); + + // set all used GPIOA pins as push-pull output, no pull-up, pull-down + GPIOA->MODER &= ~(3U << 2U*LD4_PIN); + GPIOA->MODER |= (1U << 2U*LD4_PIN); + GPIOA->OTYPER &= ~(1U << LD4_PIN); + GPIOA->OSPEEDR &= ~(3U << 2U*LD4_PIN); + GPIOA->OSPEEDR |= (1U << 2U*LD4_PIN); + GPIOA->PUPDR &= ~(3U << 2U*LD4_PIN); + + // enable GPIOC clock port for the Button B1 + RCC->IOPENR |= (1U << 2U); + + // configure Button B1 pin on GPIOC as input, no pull-up, pull-down + GPIOC->MODER &= ~(3U << 2U*B1_PIN); + GPIOC->PUPDR &= ~(3U << 2U*B1_PIN); + + BSP_randomSeed(1234U); // seed the random number generator + + // initialize the QS software tracing... + if (!QS_INIT((void *)0)) { + Q_ERROR(); + } + + // dictionaries... + QS_OBJ_DICTIONARY(&l_SysTick_Handler); + QS_USR_DICTIONARY(PHILO_STAT); + QS_USR_DICTIONARY(PAUSED_STAT); + QS_USR_DICTIONARY(CONTEXT_SW); + + QS_ONLY(produce_sig_dict()); + + // setup the QS filters... + QS_GLB_FILTER(QS_ALL_RECORDS); // all records + QS_GLB_FILTER(-QS_QF_TICK); // exclude the clock tick +} +//............................................................................ +void BSP_start(void) { + // initialize event pools + static QF_MPOOL_EL(TableEvt) smlPoolSto[2*N_PHILO]; + QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0])); + + // initialize publish-subscribe + static QSubscrList subscrSto[MAX_PUB_SIG]; + QActive_psInit(subscrSto, Q_DIM(subscrSto)); + + // instantiate and start AOs/threads... + + static QEvt const *philoQueueSto[N_PHILO][10]; + for (uint8_t n = 0U; n < N_PHILO; ++n) { + Philo_ctor(n); + QACTIVE_START(AO_Philo[n], + + // NOTE: set the preemption-threshold of all Philos to + // the same level, so that they cannot preempt each other. + Q_PRIO(n + 3U, N_PHILO + 2U), // QF-prio/pre-thre. + + philoQueueSto[n], // event queue storage + Q_DIM(philoQueueSto[n]), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param + } + + static QEvt const *tableQueueSto[N_PHILO]; + Table_ctor(); + QACTIVE_START(AO_Table, + N_PHILO + 7U, // QP prio. of the AO + tableQueueSto, // event queue storage + Q_DIM(tableQueueSto), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param +} +//............................................................................ +void BSP_displayPhilStat(uint8_t n, char const *stat) { + Q_UNUSED_PAR(n); + + if (stat[0] == 'e') { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + } + else { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off + } + + // app-specific trace record... + QS_BEGIN_ID(PHILO_STAT, AO_Table->prio) + QS_U8(1, n); // Philosopher number + QS_STR(stat); // Philosopher status + QS_END() +} +//............................................................................ +void BSP_displayPaused(uint8_t const paused) { + // not enough LEDs to implement this feature + if (paused != 0U) { + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + } + else { + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + } + + // application-specific trace record + QS_BEGIN_ID(PAUSED_STAT, AO_Table->prio) + QS_U8(1, paused); // Paused status + QS_END() +} +//............................................................................ +void BSP_randomSeed(uint32_t seed) { + l_rndSeed = seed; +} +//............................................................................ +uint32_t BSP_random(void) { // a very cheap pseudo-random-number generator + + QSchedStatus lockStat = QK_schedLock(N_PHILO); // N_PHILO prio. ceiling + // "Super-Duper" Linear Congruential Generator (LCG) + // LCG(2^32, 3*7*11*13*23, 0, seed) + // + uint32_t rnd = l_rndSeed * (3U*7U*11U*13U*23U); + l_rndSeed = rnd; // set for the next time + QK_schedUnlock(lockStat); + + return (rnd >> 8U); +} +//............................................................................ +void BSP_ledOn(void) { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on +} +//............................................................................ +void BSP_ledOff(void) { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off +} +//............................................................................ +void BSP_terminate(int16_t result) { + Q_UNUSED_PAR(result); +} + +//============================================================================ +// QF callbacks... +void QF_onStartup(void) { + // set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate + SysTick_Config(SystemCoreClock / BSP_TICKS_PER_SEC); + + // assign all priority bits for preemption-prio. and none to sub-prio. + // NOTE: this might have been changed by STM32Cube. + NVIC_SetPriorityGrouping(0U); + + // set priorities of ALL ISRs used in the system, see NOTE1 + NVIC_SetPriority(USART2_IRQn, 0U); // kernel UNAWARE interrupt + NVIC_SetPriority(EXTI0_1_IRQn, QF_AWARE_ISR_CMSIS_PRI + 0U); + NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U); + // ... + + // enable IRQs... + NVIC_EnableIRQ(EXTI0_1_IRQn); + +#ifdef Q_SPY + NVIC_EnableIRQ(USART2_IRQn); // UART2 interrupt used for QS-RX +#endif +} +//............................................................................ +void QF_onCleanup(void) { +} + +//............................................................................ +void QK_onIdle(void) { + // toggle an LED on and then off (not enough LEDs, see NOTE2) + //QF_INT_DISABLE(); + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + //QF_INT_ENABLE(); + +#ifdef Q_SPY + QS_rxParse(); // parse all the received bytes + + if ((USART2->ISR & (1U << 7U)) != 0U) { // TXE empty? + QF_INT_DISABLE(); + uint16_t b = QS_getByte(); + QF_INT_ENABLE(); + + if (b != QS_EOD) { // not End-Of-Data? + USART2->TDR = b; // put into the DR register + } + } +#elif defined NDEBUG + // Put the CPU and peripherals to the low-power mode. + // you might need to customize the clock management for your application, + // see the datasheet for your particular Cortex-M MCU. + __WFI(); // Wait-For-Interrupt +#endif +} + +//============================================================================ +// QS callbacks... +#ifdef Q_SPY + +//............................................................................ +static uint16_t const UARTPrescTable[12] = { + 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U +}; + +#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) \ + + ((__BAUD__)/2U)) / (__BAUD__)) + +#define UART_PRESCALER_DIV1 0U + +// USART2 pins PA.2 and PA.3 +#define USART2_TX_PIN 2U +#define USART2_RX_PIN 3U + +//............................................................................ +uint8_t QS_onStartup(void const *arg) { + Q_UNUSED_PAR(arg); + + static uint8_t qsTxBuf[2*1024]; // buffer for QS-TX channel + QS_initBuf(qsTxBuf, sizeof(qsTxBuf)); + + static uint8_t qsRxBuf[100]; // buffer for QS-RX channel + QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); + + // enable peripheral clock for USART2 + RCC->IOPENR |= ( 1U << 0U); // Enable GPIOA clock for USART pins + RCC->APBENR1 |= ( 1U << 17U); // Enable USART#2 clock + + // Configure PA to USART2_RX, PA to USART2_TX + GPIOA->AFR[0] &= ~((15U << 4U*USART2_RX_PIN) | (15U << 4U*USART2_TX_PIN)); + GPIOA->AFR[0] |= (( 1U << 4U*USART2_RX_PIN) | ( 1U << 4U*USART2_TX_PIN)); + GPIOA->MODER &= ~(( 3U << 2U*USART2_RX_PIN) | ( 3U << 2U*USART2_TX_PIN)); + GPIOA->MODER |= (( 2U << 2U*USART2_RX_PIN) | ( 2U << 2U*USART2_TX_PIN)); + + // baud rate + USART2->BRR = UART_DIV_SAMPLING16( + SystemCoreClock, 115200U, UART_PRESCALER_DIV1); + USART2->CR3 = 0x0000U | // no flow control + (1U << 12U); // disable overrun detection (OVRDIS) + USART2->CR2 = 0x0000U; // 1 stop bit + USART2->CR1 = ((1U << 2U) | // enable RX + (1U << 3U) | // enable TX + (1U << 5U) | // enable RX interrupt + (0U << 12U) | // 8 data bits + (0U << 28U) | // 8 data bits + (1U << 0U)); // enable USART + + QS_tickPeriod_ = SystemCoreClock / BSP_TICKS_PER_SEC; + QS_tickTime_ = QS_tickPeriod_; // to start the timestamp at zero + + return 1U; // return success +} +//............................................................................ +void QS_onCleanup(void) { +} +//............................................................................ +QSTimeCtr QS_onGetTime(void) { // NOTE: invoked with interrupts DISABLED + if ((SysTick->CTRL & 0x00010000U) == 0U) { // not set? + return QS_tickTime_ - (QSTimeCtr)SysTick->VAL; + } + else { // the rollover occurred, but the SysTick_ISR did not run yet + return QS_tickTime_ + QS_tickPeriod_ - (QSTimeCtr)SysTick->VAL; + } +} +//............................................................................ +// NOTE: +// No critical section in QS_onFlush() to avoid nesting of critical sections +// in case QS_onFlush() is called from Q_onError(). +void QS_onFlush(void) { + for (;;) { + uint16_t b = QS_getByte(); + if (b != QS_EOD) { + while ((USART2->ISR & (1U << 7U)) == 0U) { // while TXE not empty + } + USART2->TDR = b; + } + else { + break; + } + } +} +//............................................................................ +void QS_onReset(void) { + NVIC_SystemReset(); +} +//............................................................................ +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ + Q_UNUSED_PAR(cmdId); + Q_UNUSED_PAR(param1); + Q_UNUSED_PAR(param2); + Q_UNUSED_PAR(param3); +} + +#endif // Q_SPY +//---------------------------------------------------------------------------- + +//============================================================================ +// NOTE1: +// The QF_AWARE_ISR_CMSIS_PRI constant from the QF port specifies the highest +// ISR priority that is disabled by the QF framework. The value is suitable +// for the NVIC_SetPriority() CMSIS function. +// +// Only ISRs prioritized at or below the QF_AWARE_ISR_CMSIS_PRI level (i.e., +// with the numerical values of priorities equal or higher than +// QF_AWARE_ISR_CMSIS_PRI) are allowed to call the QK_ISR_ENTRY/ +// QK_ISR_ENTRY macros or any other QF/QK services. These ISRs are +// "QF-aware". +// +// Conversely, any ISRs prioritized above the QF_AWARE_ISR_CMSIS_PRI priority +// level (i.e., with the numerical values of priorities less than +// QF_AWARE_ISR_CMSIS_PRI) are never disabled and are not aware of the kernel. +// Such "QF-unaware" ISRs cannot call ANY QF/QK services. In particular they +// can NOT call the macros QK_ISR_ENTRY/QK_ISR_ENTRY. The only mechanism +// by which a "QF-unaware" ISR can communicate with the QF framework is by +// triggering a "QF-aware" ISR, which can post/publish events. +// +// NOTE2: +// The User LED is used to visualize the idle loop activity. The brightness +// of the LED is proportional to the frequency of the idle loop. +// Please note that the LED is toggled with interrupts locked, so no interrupt +// execution time contributes to the brightness of the User LED. +// diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.h new file mode 100644 index 0000000..fe8149a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/bsp.h @@ -0,0 +1,49 @@ +//============================================================================ +// Product: DPP example +// Last Updated for Version: 7.3.0 +// Date of the Last Update: 2023-06-27 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef BSP_H_ +#define BSP_H_ + +#define BSP_TICKS_PER_SEC 100U + +void BSP_init(void); +void BSP_start(void); +void BSP_displayPaused(uint8_t paused); +void BSP_displayPhilStat(uint8_t n, char const *stat); +void BSP_terminate(int16_t result); + +void BSP_randomSeed(uint32_t seed); // random seed +uint32_t BSP_random(void); // pseudo-random generator + +void BSP_ledOn(void); +void BSP_ledOff(void); + +#endif // BSP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.h new file mode 100644 index 0000000..36b752f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.h @@ -0,0 +1,112 @@ +//$file${.::dpp.h} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::dpp.h} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::dpp.h} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#ifndef DPP_H_ +#define DPP_H_ + +//$declare${Shared} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AppSignals} ...................................................... +enum AppSignals { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + +//${Shared::produce_sig_dict} ................................................ +#ifdef Q_SPY +static inline void produce_sig_dict(void) { + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); + QS_SIG_DICTIONARY(DONE_SIG, (void *)0); + QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); + QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); + QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + + QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); + QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); +} +#endif // def Q_SPY + +//${Shared::N_PHILO} ......................................................... +#define N_PHILO ((uint8_t)5U) + +//${Shared::TableEvt} ........................................................ +typedef struct { +// protected: + QEvt super; + +// public: + uint8_t philoId; +} TableEvt; + +// public: +static inline TableEvt * TableEvt_init(TableEvt * const me, + uint8_t id) +{ + if (me != (TableEvt *)0) { + me->philoId = id; + } + return me; +} + +//${Shared::AO_Philo[N_PHILO]} ............................................... +extern QActive * const AO_Philo[N_PHILO]; + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id); + +//${Shared::AO_Table} ........................................................ +extern QActive * const AO_Table; + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void); +//$enddecl${Shared} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.qm b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.qm new file mode 100644 index 0000000..422de2f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/dpp.qm @@ -0,0 +1,523 @@ + + + Dining Philosopher Problem example + + + + + + + { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + + + + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); +QS_SIG_DICTIONARY(DONE_SIG, (void *)0); +QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); +QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); +QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + +QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); +QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); + + + + ((uint8_t)5U) + + + + + + + + + + if (me != (TableEvt *)0) { + me->philoId = id; +} +return me; + + + + + = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; + + + + + + Philo * const me = &Philo_inst[id]; +QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); +QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), +me->id = (uint8_t)id; + + + + = &Table_inst.super; + + + + Table * const me = &Table_inst; +QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; +} + + + + + + + The Philo AO and the N_PHILO instances + + + + + + + + + + + Q_UNUSED_PAR(par); + +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + +QActive_subscribe(&me->super, EAT_SIG); +QActive_subscribe(&me->super, TEST_SIG); + + + + + + + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + #ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); +pe->philoId = me->id; +#endif +QACTIVE_POST(AO_Table, &pe->super, &me->super); + + + + + Q_EVT_CAST(TableEvt)->philoId == me->id + + + + + + + + + + + // DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); +pe->philoId = me->id; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + + + + + + + + Q_UNUSED_PAR(par); + +#ifdef Q_SPY +Table *Table_inst = me; +QS_OBJ_DICTIONARY(Table_inst); +#endif + +QActive_subscribe(&me->super, DONE_SIG); +QActive_subscribe(&me->super, PAUSE_SIG); +QActive_subscribe(&me->super, SERVE_SIG); +QActive_subscribe(&me->super, TEST_SIG); + +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); +} + + + + + + + + + + + + + + + Q_ERROR(); + + + + + + + // give permissions to eat... +for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } +} + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, HUNGRY); +uint8_t m = left(n); + + + (me->fork[m] == FREE) && (me->fork[n] == FREE) + me->fork[m] = USED; +me->fork[n] = USED; +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else +TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); +pe->philoId = n; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); +BSP_displayPhilStat(n, EATING); + + + + + + + else + me->isHungry[n] = true; + + + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; +m = right(n); // check the right neighbor + +if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} +m = left(n); // check the left neighbor +n = left(m); // left fork of the left neighbor +if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} + + + + + + + Q_ERROR(); + + + + + + + + + + + + + + + + + BSP_displayPaused(1U); + BSP_displayPaused(0U); + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// philo ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +me->isHungry[n] = true; +BSP_displayPhilStat(n, HUNGRY); + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; + + + + + + + + + + + + + + + + + + + + #ifndef DPP_H_ +#define DPP_H_ + +$declare ${Shared} + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Philo} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +$define ${Shared::Philo_ctor} +$define ${Shared::AO_Philo[N_PHILO]} +$define ${AOs::Philo} + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Table} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +$define ${Shared::Table_ctor} +$define ${Shared::AO_Table} +$define ${AOs::Table} + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/main.c b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/main.c new file mode 100644 index 0000000..cfcfaf0 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/main.c @@ -0,0 +1,44 @@ +//============================================================================ +// APP example +// Last updated for version 7.3.0 +// Last updated on 2023-08-09 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// +// +//============================================================================ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//............................................................................ +int main() { + QF_init(); // initialize the framework and the underlying RT kernel + BSP_init(); // initialize the BSP + BSP_start(); // start the AOs/Threads + return QF_run(); // run the QF application +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/philo.c b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/philo.c new file mode 100644 index 0000000..45a2726 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/philo.c @@ -0,0 +1,254 @@ +//$file${.::philo.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::philo.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::philo.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +typedef struct Philo { +// protected: + QActive super; + +// private: + QTimeEvt timeEvt; + uint8_t id; + +// public: +} Philo; + +extern Philo Philo_inst[N_PHILO]; + +// protected: +static QState Philo_initial(Philo * const me, void const * const par); +static QState Philo_thinking(Philo * const me, QEvt const * const e); +static QState Philo_hungry(Philo * const me, QEvt const * const e); +static QState Philo_eating(Philo * const me, QEvt const * const e); +//$enddecl${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Philo_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id) { + Philo * const me = &Philo_inst[id]; + QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); + QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), + me->id = (uint8_t)id; +} +//$enddef${Shared::Philo_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Philo[N_PHILO]} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Philo[N_PHILO]} ............................................... +QActive * const AO_Philo[N_PHILO] = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; +//$enddef${Shared::AO_Philo[N_PHILO]} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +Philo Philo_inst[N_PHILO]; + +//${AOs::Philo::SM} .......................................................... +static QState Philo_initial(Philo * const me, void const * const par) { + //${AOs::Philo::SM::initial} + Q_UNUSED_PAR(par); + + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + + QActive_subscribe(&me->super, EAT_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + QS_FUN_DICTIONARY(&Philo_thinking); + QS_FUN_DICTIONARY(&Philo_hungry); + QS_FUN_DICTIONARY(&Philo_eating); + + return Q_TRAN(&Philo_thinking); +} + +//${AOs::Philo::SM::thinking} ................................................ +static QState Philo_thinking(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::thinking} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_hungry); + break; + } + //${AOs::Philo::SM::thinking::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::hungry} .................................................. +static QState Philo_hungry(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::hungry} + case Q_ENTRY_SIG: { + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); + pe->philoId = me->id; + #endif + QACTIVE_POST(AO_Table, &pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::hungry::EAT} + case EAT_SIG: { + //${AOs::Philo::SM::hungry::EAT::[e->philoId==me->iid]} + if (Q_EVT_CAST(TableEvt)->philoId == me->id) { + status_ = Q_TRAN(&Philo_eating); + } + else { + status_ = Q_UNHANDLED(); + } + break; + } + //${AOs::Philo::SM::hungry::DONE} + case DONE_SIG: { + // DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::eating} .................................................. +static QState Philo_eating(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::eating} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); + pe->philoId = me->id; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_thinking); + break; + } + //${AOs::Philo::SM::eating::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} +//$enddef${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.sct b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.sct similarity index 84% rename from arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.sct rename to cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.sct index 100826b..ba68792 100644 --- a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.sct +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.sct @@ -2,7 +2,7 @@ ; *** Scatter-Loading Description File generated by uVision *** ; ; Adapted by Quantum Leaps: -; moved STACK as the first section in RW_STACK +; added STACK as the first section in RW_STACK ; ************************************************************* LR_IROM1 0x08000000 0x00008000 { ; load region size_region @@ -13,7 +13,7 @@ LR_IROM1 0x08000000 0x00008000 { ; load region size_region .ANY (+XO) } - RW_STACK 0x20000000 { + RW_STACK 0x20000000 { ; STACK area * (STACK, +First) } RW_IRAM1 +0 (0x00003000 - 2048) { diff --git a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvoptx b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvoptx similarity index 52% rename from arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvoptx rename to cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvoptx index 68dea58..02d7294 100644 --- a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvoptx +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvoptx @@ -12,7 +12,7 @@ *.lib *.txt; *.h; *.inc; *.md *.plm - *.cpp + *.cpp; *.cc; *.cxx 0 @@ -22,7 +22,7 @@ - dpp-dbg + dbg 0x4 ARM-ADS @@ -45,7 +45,7 @@ 79 66 8 - .\dbg\ + .\Listings\ 1 @@ -75,7 +75,7 @@ 1 0 - 0 + 1 18 @@ -95,7 +95,7 @@ 1 0 1 - 0 + 1 1 1 0 @@ -119,58 +119,42 @@ 0 - ST-LINKIII-KEIL_SWO - -U066BFF505153848667095842 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(0BC11477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 0 - UL2CM3 - -U -O206 -S8 -C0 -P00 -N00("") -D00(00000000) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) 0 - DLGUARM - (105=-1,-1,-1,-1,0) + ARMDBGFLAGS + 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 + ST-LINKIII-KEIL_SWO + -U -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(0BC11477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + DLGUARM + (105=-1,-1,-1,-1,0) 0 - ARMDBGFLAGS - + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32 -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM)) - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - 0 0 - 0 + 1 1 0 0 @@ -218,7 +202,7 @@ - dpp-rel + spy 0x4 ARM-ADS @@ -241,7 +225,7 @@ 79 66 8 - .\rel\ + .\Listings\ 1 @@ -291,7 +275,7 @@ 1 0 1 - 0 + 1 1 1 0 @@ -313,21 +297,6 @@ STLink\ST-LINKIII-KEIL_SWO.dll - - 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32C0x_32 -FL08000 -FS08000000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) - - - 0 - ST-LINKIII-KEIL_SWO - UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32C0x_32 -FL08000 -FS08000000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) - - - 0 - DLGUARM - (105=-1,-1,-1,-1,0) - 0 ARMRTXEVENTFLAGS @@ -336,188 +305,17 @@ 0 DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) 0 ARMDBGFLAGS - - - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - - - 0 - - - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - - - - - - - 1 - 1 - 0 - 2 - 10000000 - - - - - - dpp-spy - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 0 - 1 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\spy\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 1 - - 18 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 0 - 0 - 6 - - - - - - - - - - - STLink\ST-LINKIII-KEIL_SWO.dll - - - - 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32C0x_32 -FL08000 -FS08000000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) - 0 ST-LINKIII-KEIL_SWO - -U-O206 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(0BC11477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) + -U -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(0BC11477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32.FLM -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0 0 @@ -526,43 +324,17 @@ 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32 -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM)) - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - 0 0 - 0 + 1 1 0 0 @@ -610,7 +382,7 @@ - Source Code + Application 1 0 0 @@ -622,7 +394,7 @@ 0 0 0 - ..\bsp.c + .\bsp.c bsp.c 0 0 @@ -634,7 +406,7 @@ 0 0 0 - ..\..\bsp.h + .\bsp.h bsp.h 0 0 @@ -646,7 +418,7 @@ 0 0 0 - ..\..\dpp.h + .\dpp.h dpp.h 0 0 @@ -658,8 +430,8 @@ 0 0 0 - ..\..\philo.c - philo.c + .\main.c + main.c 0 0 @@ -670,115 +442,39 @@ 0 0 0 - ..\..\table.c - table.c + .\philo.c + philo.c 0 0 1 6 - 5 - 0 - 0 - 0 - .\dpp-qxk.sct - dpp-qxk.sct - 0 - 0 - - - 1 - 7 - 1 - 0 - 0 - 0 - ..\xthread1.c - xthread1.c - 0 - 0 - - - 1 - 8 1 0 0 0 - ..\xthread2.c - xthread2.c - 0 - 0 - - - 1 - 9 - 1 - 0 - 0 - 0 - ..\..\main.c - main.c + .\table.c + table.c 0 0 - nucleo-c031c6 + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device 1 0 0 - 0 - - 2 - 10 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - stm32c0xx.h - 0 - 0 - - - 2 - 11 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - stm32c031xx.h - 0 - 0 - - - 2 - 12 - 1 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c - system_stm32c0xx.c - 0 - 0 - - - 2 - 13 - 2 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\nucleo-c031c6\arm\startup_stm32c031xx.s - startup_stm32c031xx.s - 0 - 0 - + 1 diff --git a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvprojx b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvprojx similarity index 52% rename from arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvprojx rename to cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvprojx index 5c6498c..acfe053 100644 --- a/arm-cm/dpp_nucleo-c031c6/qxk/arm-pack/dpp-qxk.uvprojx +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/project.uvprojx @@ -7,7 +7,7 @@ - dpp-dbg + dbg 0x4 ARM-ADS 6210000::V6.21::ARMCLANG @@ -48,14 +48,14 @@ 0 1 - .\dbg\ - dpp-qxk + .\Objects\ + project 1 0 0 1 - 1 - .\dbg\ + 0 + .\Listings\ 1 0 0 @@ -70,9 +70,9 @@ 0 - 1 + 0 0 - cmd /c "del .\dbg\qstamp.o" + 0 0 @@ -80,9 +80,9 @@ 0 - 1 + 0 0 - fromelf --bin --output .\dbg\dpp-qxk.bin .\dbg\dpp-qxk.axf + 0 0 @@ -159,8 +159,8 @@ 1 1 0 - 0 - 0 + 1 + 1 0 0 1 @@ -206,12 +206,12 @@ 0 0 0 - 1 + 0 0 0 0 0 - 1 + 0 0 @@ -313,7 +313,7 @@ - 0 + 1 1 0 0 @@ -326,13 +326,13 @@ 3 0 0 - 0 - 0 + 1 + 1 0 - 3 + 5 3 - 0 - 0 + 1 + 1 0 0 0 @@ -340,7 +340,7 @@ QP_CONFIG - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 + @@ -351,12 +351,12 @@ 0 0 0 - 1 + 0 0 - 4 + 1 - Stack_Size=2048 Heap_Size=16 + @@ -368,13 +368,13 @@ 0 1 0 - 0x00000000 - 0x20000000 + + - .\dpp-qxk.sct + .\project.sct - --entry Reset_Handler + @@ -382,534 +382,45 @@ - Source Code + Application bsp.c 1 - ..\bsp.c + .\bsp.c bsp.h 5 - ..\..\bsp.h + .\bsp.h dpp.h 5 - ..\..\dpp.h - - - philo.c - 1 - ..\..\philo.c - - - table.c - 1 - ..\..\table.c - - - dpp-qxk.sct - 5 - .\dpp-qxk.sct - - - xthread1.c - 1 - ..\xthread1.c - - - xthread2.c - 1 - ..\xthread2.c + .\dpp.h main.c 1 - ..\..\main.c - - - - - nucleo-c031c6 - - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - - - system_stm32c0xx.c - 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c - - - startup_stm32c031xx.s - 2 - ..\..\..\..\..\3rd_party\nucleo-c031c6\arm\startup_stm32c031xx.s - - - - - ::RTEF - - - - - dpp-rel - 0x4 - ARM-ADS - 6210000::V6.21::ARMCLANG - 1 - - - STM32C031C6Tx - STMicroelectronics - Keil.STM32C0xx_DFP.1.0.0 - https://www.keil.com/pack/ - IRAM(0x20000000,0x00003000) IROM(0x08000000,0x00008000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE - - - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32 -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM)) - 0 - $$Device:STM32C031C6Tx$Drivers\CMSIS\Device\ST\STM32C0xx\Include\stm32c0xx.h - - - - - - - - - - $$Device:STM32C031C6Tx$CMSIS\SVD\STM32C031.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\rel\ - dpp-qxk - 1 - 0 - 0 - 0 - 0 - .\rel\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 1 - 0 - cmd /c "del .\rel\qstamp.o" - - 0 - 0 - 0 - 0 - - - 1 - 0 - fromelf --bin --output .\rel\dpp-qxk.bin .\rel\dpp-qxk.axf - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - SARMCM3.DLL - -REMAP-MPU - DARMCM1.DLL - -pCM0+ - SARMCM3.DLL - -MPU - TARMCM1.DLL - -pCM0+ - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4097 - - 1 - BIN\UL2CM3.DLL - - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M0+" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 8 - 0 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x3000 - - - 1 - 0x8000000 - 0x8000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x8000000 - 0x8000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x3000 - - - 0 - 0x0 - 0x0 - - - - - - 0 - 6 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 3 - 0 - 0 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - - - NDEBUG,QP_CONFIG - - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 4 - - - Stack_Size=2048 Heap_Size=16 - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x20000000 - - .\dpp-qxk.sct - - - --entry Reset_Handler - - - - - - - - Source Code - - - bsp.c - 1 - ..\bsp.c - - - bsp.h - 5 - ..\..\bsp.h - - - dpp.h - 5 - ..\..\dpp.h + .\main.c philo.c 1 - ..\..\philo.c + .\philo.c table.c 1 - ..\..\table.c - - - dpp-qxk.sct - 5 - .\dpp-qxk.sct - - - xthread1.c - 1 - ..\xthread1.c - - - xthread2.c - 1 - ..\xthread2.c - - - main.c - 1 - ..\..\main.c + .\table.c - nucleo-c031c6 - - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - - - system_stm32c0xx.c - 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c - - - startup_stm32c031xx.s - 2 - ..\..\..\..\..\3rd_party\nucleo-c031c6\arm\startup_stm32c031xx.s - - + ::CMSIS + + + ::Device ::RTEF @@ -917,7 +428,7 @@ - dpp-spy + spy 0x4 ARM-ADS 6210000::V6.21::ARMCLANG @@ -958,14 +469,14 @@ 0 1 - .\spy\ - dpp-qxk + .\Objects\ + project 1 0 0 1 - 1 - .\spy\ + 0 + .\Listings\ 1 0 0 @@ -980,9 +491,9 @@ 0 - 1 + 0 0 - cmd /c "del .\spy\qstamp.o" + 0 0 @@ -990,9 +501,9 @@ 0 - 1 + 0 0 - fromelf --bin --output .\spy\dpp-qxk.bin .\spy\dpp-qxk.axf + 0 0 @@ -1048,7 +559,7 @@ 1 BIN\UL2CM3.DLL - + "" () @@ -1069,8 +580,8 @@ 1 1 0 - 0 - 0 + 1 + 1 0 0 1 @@ -1116,12 +627,12 @@ 0 0 0 - 1 + 0 0 0 0 0 - 1 + 0 0 @@ -1223,8 +734,8 @@ - 0 - 2 + 1 + 1 0 0 1 @@ -1236,13 +747,13 @@ 3 0 0 - 0 - 0 + 1 + 1 0 - 3 + 5 3 - 0 - 0 + 1 + 1 0 0 0 @@ -1250,7 +761,7 @@ Q_SPY,QP_CONFIG - ..\..;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-c031c6 + @@ -1261,12 +772,12 @@ 0 0 0 - 1 + 0 0 - 4 + 1 - Stack_Size=2048 Heap_Size=16 + @@ -1278,13 +789,13 @@ 0 1 0 - 0x00000000 - 0x20000000 + + - .\dpp-qxk.sct + .\project.sct - --entry Reset_Handler + @@ -1292,79 +803,45 @@ - Source Code + Application bsp.c 1 - ..\bsp.c + .\bsp.c bsp.h 5 - ..\..\bsp.h + .\bsp.h dpp.h 5 - ..\..\dpp.h - - - philo.c - 1 - ..\..\philo.c + .\dpp.h - table.c - 1 - ..\..\table.c - - - dpp-qxk.sct - 5 - .\dpp-qxk.sct - - - xthread1.c + main.c 1 - ..\xthread1.c + .\main.c - xthread2.c + philo.c 1 - ..\xthread2.c + .\philo.c - main.c + table.c 1 - ..\..\main.c + .\table.c - nucleo-c031c6 - - - stm32c0xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c0xx.h - - - stm32c031xx.h - 5 - ..\..\..\..\..\3rd_party\nucleo-c031c6\stm32c031xx.h - - - system_stm32c0xx.c - 1 - ..\..\..\..\..\3rd_party\nucleo-c031c6\system_stm32c0xx.c - - - startup_stm32c031xx.s - 2 - ..\..\..\..\..\3rd_party\nucleo-c031c6\arm\startup_stm32c031xx.s - - + ::CMSIS + + + ::Device ::RTEF @@ -1376,51 +853,87 @@ - - + + + + + + + + + + + + + + + + - - - + + - - + + - - - + + - - + + - - - + + - - + + - - - + + - + + RTE\Device\STM32C031C6Tx\startup_stm32c031xx.s + + + + + + + + + RTE\Device\STM32C031C6Tx\system_stm32c0xx.c + + + + + + + + RTE\RTEF\qp_config.h - - + + - - - + + + + + + project + 1 + + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/stm32-nucleo-c031c6.jpg b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/stm32-nucleo-c031c6.jpg new file mode 100644 index 0000000..6647e2d Binary files /dev/null and b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/stm32-nucleo-c031c6.jpg differ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-keil/table.c b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/table.c new file mode 100644 index 0000000..c705fcc --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-keil/table.c @@ -0,0 +1,342 @@ +//$file${.::table.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${.::table.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${.::table.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +typedef struct Table { +// protected: + QActive super; + +// private: + uint8_t fork[N_PHILO]; + bool isHungry[N_PHILO]; + +// public: +} Table; + +extern Table Table_inst; + +// protected: +static QState Table_initial(Table * const me, void const * const par); +static QState Table_active(Table * const me, QEvt const * const e); +static QState Table_serving(Table * const me, QEvt const * const e); +static QState Table_paused(Table * const me, QEvt const * const e); +//$enddecl${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Table_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void) { + Table * const me = &Table_inst; + QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + } +} +//$enddef${Shared::Table_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Table} ........................................................ +QActive * const AO_Table = &Table_inst.super; +//$enddef${Shared::AO_Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +Table Table_inst; + +//${AOs::Table::SM} .......................................................... +static QState Table_initial(Table * const me, void const * const par) { + //${AOs::Table::SM::initial} + Q_UNUSED_PAR(par); + + #ifdef Q_SPY + Table *Table_inst = me; + QS_OBJ_DICTIONARY(Table_inst); + #endif + + QActive_subscribe(&me->super, DONE_SIG); + QActive_subscribe(&me->super, PAUSE_SIG); + QActive_subscribe(&me->super, SERVE_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); + } + + QS_FUN_DICTIONARY(&Table_active); + QS_FUN_DICTIONARY(&Table_serving); + QS_FUN_DICTIONARY(&Table_paused); + + return Q_TRAN(&Table_serving); +} + +//${AOs::Table::SM::active} .................................................. +static QState Table_active(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::serving} ......................................... +static QState Table_serving(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::serving} + case Q_ENTRY_SIG: { + // give permissions to eat... + for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, HUNGRY); + uint8_t m = left(n); + //${AOs::Table::SM::active::serving::HUNGRY::[bothfree]} + if ((me->fork[m] == FREE) && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(n, EATING); + status_ = Q_HANDLED(); + } + //${AOs::Table::SM::active::serving::HUNGRY::[else]} + else { + me->isHungry[n] = true; + status_ = Q_HANDLED(); + } + break; + } + //${AOs::Table::SM::active::serving::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + m = right(n); // check the right neighbor + + if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + m = left(n); // check the left neighbor + n = left(m); // left fork of the left neighbor + if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::PAUSE} + case PAUSE_SIG: { + status_ = Q_TRAN(&Table_paused); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::paused} .......................................... +static QState Table_paused(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::paused} + case Q_ENTRY_SIG: { + BSP_displayPaused(1U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused} + case Q_EXIT_SIG: { + BSP_displayPaused(0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::SERVE} + case SERVE_SIG: { + status_ = Q_TRAN(&Table_serving); + break; + } + //${AOs::Table::SM::active::paused::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // philo ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + me->isHungry[n] = true; + BSP_displayPhilStat(n, HUNGRY); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} +//$enddef${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.cproject b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.cproject new file mode 100644 index 0000000..e4a1bbc --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.cproject @@ -0,0 +1,276 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.mxproject b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.mxproject new file mode 100644 index 0000000..cb7467a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.mxproject @@ -0,0 +1,37 @@ +[PreviousLibFiles] +LibFiles=Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_system.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_cortex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_cortex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_rcc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_rcc_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_rcc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_utils.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_bus.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash_ramfunc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_gpio.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_gpio.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_gpio_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_dma.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_dma_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_pwr.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_pwr.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_pwr_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_def.h;Drivers\STM32C0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_exti.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_exti.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_tim.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_tim_ex.h;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo_errno.h;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_usart.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_usart_ex.h;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart_ex.c;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_uart.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_uart_ex.h;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_cortex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_gpio.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma_ex.c;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_dma.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_dmamux.h;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_exti.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim_ex.c;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart.c;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_system.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_cortex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_cortex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_rcc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_rcc_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_rcc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_utils.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_bus.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_flash_ramfunc.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_gpio.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_gpio.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_gpio_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_dma.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_dma_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_pwr.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_pwr.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_pwr_ex.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_def.h;Drivers\STM32C0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_exti.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_ll_exti.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_tim.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_tim_ex.h;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo_errno.h;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_usart.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_usart_ex.h;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart_ex.c;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_uart.h;Drivers\STM32C0xx_HAL_Driver\Inc\stm32c0xx_hal_uart_ex.h;Drivers\CMSIS\Device\ST\STM32C0xx\Include\stm32c031xx.h;Drivers\CMSIS\Device\ST\STM32C0xx\Include\stm32c0xx.h;Drivers\CMSIS\Device\ST\STM32C0xx\Include\system_stm32c0xx.h;Drivers\CMSIS\Device\ST\STM32C0xx\Source\Templates\system_stm32c0xx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h; + +[PreviousUsedCubeIDEFiles] +SourceFiles=Core\Src\main.c;Core\Src\stm32c0xx_it.c;Core\Src\stm32c0xx_hal_msp.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_cortex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_gpio.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_exti.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim_ex.c;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32C0xx\Source\Templates\system_stm32c0xx.c;Core\Src\system_stm32c0xx.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_cortex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_rcc_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_flash_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_gpio.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_dma_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_pwr_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_exti.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_tim_ex.c;Drivers\BSP\STM32C0xx_Nucleo\stm32c0xx_nucleo.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_usart.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart_ex.c;Drivers\STM32C0xx_HAL_Driver\Src\stm32c0xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32C0xx\Source\Templates\system_stm32c0xx.c;Core\Src\system_stm32c0xx.c;;; +HeaderPath=Drivers\STM32C0xx_HAL_Driver\Inc;Drivers\STM32C0xx_HAL_Driver\Inc\Legacy;Drivers\BSP\STM32C0xx_Nucleo;Drivers\CMSIS\Device\ST\STM32C0xx\Include;Drivers\CMSIS\Include;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\ports\arm-cm\qk\gnu\;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\ports\arm-cm\qk\config;Core\Inc; +CDefines=USE_NUCLEO_64;USE_HAL_DRIVER;STM32C031xx;USE_HAL_DRIVER;USE_HAL_DRIVER; + +[PreviousGenFiles] +AdvancedFolderStructure=true +HeaderFileListSize=5 +HeaderFiles#0=..\Core\Inc\stm32c0xx_nucleo_conf.h +HeaderFiles#1=..\Core\Inc\stm32c0xx_it.h +HeaderFiles#2=..\Core\Inc\RTE_Components.h +HeaderFiles#3=..\Core\Inc\stm32c0xx_hal_conf.h +HeaderFiles#4=..\Core\Inc\main.h +HeaderFolderListSize=1 +HeaderPath#0=..\Core\Inc +HeaderFiles=; +SourceFileListSize=3 +SourceFiles#0=..\Core\Src\stm32c0xx_it.c +SourceFiles#1=..\Core\Src\stm32c0xx_hal_msp.c +SourceFiles#2=..\Core\Src\main.c +SourceFolderListSize=1 +SourcePath#0=..\Core\Src +SourceFiles=; + +[ThirdPartyIp] +ThirdPartyIpNumber=1 +ThirdPartyIpName#0=QuantumLeaps.qpc.7.3.4 + +[ThirdPartyIp#QuantumLeaps.qpc.7.3.4] +include=Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\ports\arm-cm\qk\gnu; +doc=Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\https:\www.state-machine.com\qpc\srs_sm.html;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\https:\www.state-machine.com\qpc\srs_qs.html;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\https:\www.state-machine.com\qpc\srs_ao.html;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\https:\www.state-machine.com\qpc\srs_qk.html; +header=Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qpc.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qp.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qp_pkg.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qsafe.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qs_dummy.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qstamp.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qs.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qs_pkg.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qequeue.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qmpool.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\include\qk.h;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\ports\arm-cm\qk\config\qp_config.h; +source=Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qep_hsm.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qep_msm.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qs.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qs_64bit.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qs_fp.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qs_rx.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qstamp.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qs\qutest.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_act.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_defer.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_dyn.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_mem.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_ps.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_qact.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_qeq.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_qmact.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_time.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qf\qf_actq.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\src\qk\qk.c;Middlewares\Third_Party\QuantumLeaps_RTEF_qpc\ports\arm-cm\qk\gnu\qk_port.c; + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.project b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.project new file mode 100644 index 0000000..82468c4 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.project @@ -0,0 +1,32 @@ + + + project + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + com.st.stm32cube.ide.mcu.MCUCubeProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature + com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/language.settings.xml b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/language.settings.xml new file mode 100644 index 0000000..b76095f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/language.settings.xml @@ -0,0 +1,36 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/stm32cubeide.project.prefs b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/stm32cubeide.project.prefs new file mode 100644 index 0000000..8b22a72 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/.settings/stm32cubeide.project.prefs @@ -0,0 +1,4 @@ +66BE74F758C12D739921AEA421D593D3=7 +8DF89ED150041C4CBC7CB9A9CAA90856=BEF8C8E1150EA70D6AE037C7BC0D4672 +DC22A860405A8BF2F2C095E5B6529F12=BEF8C8E1150EA70D6AE037C7BC0D4672 +eclipse.preferences.version=1 diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/RTE_Components.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/RTE_Components.h new file mode 100644 index 0000000..8463dc2 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/RTE_Components.h @@ -0,0 +1,31 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file + * @author MCD Application Team + * @version V2.0.0 + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + /* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __RTE_COMPONENTS_H__ +#define __RTE_COMPONENTS_H__ + +/* Defines ------------------------------------------------------------------*/ +/* QuantumLeaps.qpc.7.3.4 */ +#define RTE_RTEF_QPC_QEP /* QP/C QEP */ +#define RTE_RTEF_QPC_QF /* QP/C QF */ +#define RTE_RTEF_QPC_QS /* QP/C QS */ +#define RTE_RTEF_QPC_QK /* QP/C QK kernel */ + +#endif /* __RTE_COMPONENTS_H__ */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/bsp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/bsp.h new file mode 100644 index 0000000..fe8149a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/bsp.h @@ -0,0 +1,49 @@ +//============================================================================ +// Product: DPP example +// Last Updated for Version: 7.3.0 +// Date of the Last Update: 2023-06-27 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved. +// +// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial +// +// This software is dual-licensed under the terms of the open source GNU +// General Public License version 3 (or any later version), or alternatively, +// under the terms of one of the closed source Quantum Leaps commercial +// licenses. +// +// The terms of the open source GNU General Public License version 3 +// can be found at: +// +// The terms of the closed source Quantum Leaps commercial licenses +// can be found at: +// +// Redistributions in source code must retain this top-level comment block. +// Plagiarizing this software to sidestep the license obligations is illegal. +// +// Contact information: +// +// +//============================================================================ +#ifndef BSP_H_ +#define BSP_H_ + +#define BSP_TICKS_PER_SEC 100U + +void BSP_init(void); +void BSP_start(void); +void BSP_displayPaused(uint8_t paused); +void BSP_displayPhilStat(uint8_t n, char const *stat); +void BSP_terminate(int16_t result); + +void BSP_randomSeed(uint32_t seed); // random seed +uint32_t BSP_random(void); // pseudo-random generator + +void BSP_ledOn(void); +void BSP_ledOff(void); + +#endif // BSP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/dpp.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/dpp.h new file mode 100644 index 0000000..4ad922f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/dpp.h @@ -0,0 +1,112 @@ +//$file${Inc::dpp.h} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${Inc::dpp.h} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${Inc::dpp.h} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#ifndef DPP_H_ +#define DPP_H_ + +//$declare${Shared} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AppSignals} ...................................................... +enum AppSignals { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + +//${Shared::produce_sig_dict} ................................................ +#ifdef Q_SPY +static inline void produce_sig_dict(void) { + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); + QS_SIG_DICTIONARY(DONE_SIG, (void *)0); + QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); + QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); + QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + + QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); + QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); +} +#endif // def Q_SPY + +//${Shared::N_PHILO} ......................................................... +#define N_PHILO ((uint8_t)5U) + +//${Shared::TableEvt} ........................................................ +typedef struct { +// protected: + QEvt super; + +// public: + uint8_t philoId; +} TableEvt; + +// public: +static inline TableEvt * TableEvt_init(TableEvt * const me, + uint8_t id) +{ + if (me != (TableEvt *)0) { + me->philoId = id; + } + return me; +} + +//${Shared::AO_Philo[N_PHILO]} ............................................... +extern QActive * const AO_Philo[N_PHILO]; + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id); + +//${Shared::AO_Table} ........................................................ +extern QActive * const AO_Table; + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void); +//$enddecl${Shared} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/main.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/main.h new file mode 100644 index 0000000..b298655 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/main.h @@ -0,0 +1,70 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32c0xx_hal.h" +#include "stm32c0xx_nucleo.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_hal_conf.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_hal_conf.h new file mode 100644 index 0000000..7e028bc --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_hal_conf.h @@ -0,0 +1,275 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32c0xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32c0xx_hal_conf.h. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32C0xx_HAL_CONF_H +#define STM32C0xx_HAL_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +/* #define HAL_ADC_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_I2C_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_SPI_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Register Callbacks selection ############################## */ +/** + * @brief Set below the peripheral configuration to "1U" to add the support + * of HAL callback registration/unregistration feature for the HAL + * driver(s). This allows user application to provide specific callback + * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting + * the default weak callback functions (see each stm32c0xx_hal_ppp.h file + * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef + * for each PPP peripheral). + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IWDG_REGISTER_CALLBACKS 0U /* IWDG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) +#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) +#define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) +#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz +The real value may vary depending on the variations +in voltage and temperature.*/ +#if !defined (LSI_STARTUP_TIME) +#define LSI_STARTUP_TIME 130UL /*!< Time out for LSI start up, in ms */ +#endif /* LSI_STARTUP_TIME */ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) +#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) +#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S1 peripheral + * This value is used by the RCC HAL module to compute the I2S1 clock source + * frequency. + */ +#if !defined (EXTERNAL_I2S1_CLOCK_VALUE) +#define EXTERNAL_I2S1_CLOCK_VALUE (12288000UL) /*!< Value of the I2S1 External clock source in Hz*/ +#endif /* EXTERNAL_I2S1_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY 3U /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include modules header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32c0xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32c0xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32c0xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32c0xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32c0xx_hal_adc.h" + #include "stm32c0xx_hal_adc_ex.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32c0xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32c0xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32c0xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32c0xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32c0xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32c0xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32c0xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32c0xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32c0xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32c0xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32c0xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32c0xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32c0xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32c0xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32c0xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32c0xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for functions parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32C0xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_it.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_it.h new file mode 100644 index 0000000..f2da24d --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_it.h @@ -0,0 +1,59 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32c0xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32C0xx_IT_H +#define __STM32C0xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void HardFault_Handler(void); +void SVC_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32C0xx_IT_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_nucleo_conf.h b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_nucleo_conf.h new file mode 100644 index 0000000..bbfcfed --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Inc/stm32c0xx_nucleo_conf.h @@ -0,0 +1,80 @@ + +/** + ****************************************************************************** + * @file stm32c0xx_nucleo_conf.h + * @author MCD Application Team + * @brief STM32C0xx_Nucleo board configuration file. + * This file should be copied to the application folder and renamed + * to stm32c0xx_nucleo_conf.h + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32C0XX_NUCLEO_CONF_H +#define STM32C0XX_NUCLEO_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32c0xx_hal.h" + +/** @addtogroup BSP + * @{ + */ + +/** @addtogroup STM32C0XX_NUCLEO + * @{ + */ + +/** @defgroup STM32C0XX_NUCLEO_CONFIG Config + * @{ + */ + +/** @defgroup STM32C0XX_NUCLEO_CONFIG_Exported_Constants Exported Constants + * @{ + */ +/* Nucleo pin and part number defines */ +#define USE_STM32C0XX_NUCLEO + +/* COM define */ +#define USE_COM_LOG 0U +#define USE_BSP_COM_FEATURE 0U + +/* IRQ priorities */ +#define BSP_BUTTON_USER_IT_PRIORITY 15U + +/* User button EXTI handle */ +#define H_EXTI_13 hpb_exti[BUTTON_USER] +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32C0XX_NUCLEO_CONF_H */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/bsp.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/bsp.c new file mode 100644 index 0000000..e212fd9 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/bsp.c @@ -0,0 +1,503 @@ +//============================================================================ +// Product: DPP example, NUCLEO-C031C6 board, QK kernel +// Last updated for version 7.3.3 +// Last updated on 2023-12-13 +// +// Q u a n t u m L e a P s +// ------------------------ +// Modern Embedded Software +// +// Copyright (C) 2005 Quantum Leaps, LLC. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// +// +//============================================================================ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +#include "main.h" // CMSIS-compliant header file for the MCU used +// add other drivers if necessary... + +Q_DEFINE_THIS_FILE // define the name of this file for assertions + +// Local-scope defines ----------------------------------------------------- +// LED pins available on the board (just one user LED LD4--Green on PA.5) +#define LD4_PIN 5U + +// Button pins available on the board (just one user Button B1 on PC.13) +#define B1_PIN 13U + +// Local-scope objects ----------------------------------------------------- +static uint32_t l_rndSeed; + +#ifdef Q_SPY + + QSTimeCtr QS_tickTime_; + QSTimeCtr QS_tickPeriod_; + + // QSpy source IDs + static QSpyId const l_SysTick_Handler = { 0U }; + static QSpyId const l_EXTI0_1_IRQHandler = { 0U }; + + enum AppRecords { // application-specific trace records + PHILO_STAT = QS_USER, + PAUSED_STAT, + CONTEXT_SW, + }; + +#endif + +//============================================================================ +// Error handler and ISRs... + +Q_NORETURN Q_onError(char const * const module, int_t const id) { + // NOTE: this implementation of the assertion handler is intended only + // for debugging and MUST be changed for deployment of the application + // (assuming that you ship your production code with assertions enabled). + Q_UNUSED_PAR(module); + Q_UNUSED_PAR(id); + QS_ASSERTION(module, id, 10000U); + +#ifndef NDEBUG + // light up the user LED + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + // for debugging, hang on in an endless loop... + for (;;) { + } +#endif + + NVIC_SystemReset(); +} +//............................................................................ +// assertion failure handler for the STM32 library, including the startup code +void assert_failed(char const * const module, int_t const id); // prototype +void assert_failed(char const * const module, int_t const id) { + Q_onError(module, id); +} + +// ISRs used in the application ============================================ + +void SysTick_Handler(void); // prototype +void SysTick_Handler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + QTIMEEVT_TICK_X(0U, &l_SysTick_Handler); // time events at rate 0 + + // Perform the debouncing of buttons. The algorithm for debouncing + // adapted from the book "Embedded Systems Dictionary" by Jack Ganssle + // and Michael Barr, page 71. + static struct { + uint32_t depressed; + uint32_t previous; + } buttons = { 0U, 0U }; + + uint32_t current = ~GPIOC->IDR; // read Port C with state of Button B1 + uint32_t tmp = buttons.depressed; // save the depressed buttons + buttons.depressed |= (buttons.previous & current); // set depressed + buttons.depressed &= (buttons.previous | current); // clear released + buttons.previous = current; // update the history + tmp ^= buttons.depressed; // changed debounced depressed + current = buttons.depressed; + + if ((tmp & (1U << B1_PIN)) != 0U) { // debounced B1 state changed? + if ((current & (1U << B1_PIN)) != 0U) { // is B1 depressed? + static QEvt const pauseEvt = QEVT_INITIALIZER(PAUSE_SIG); + QACTIVE_PUBLISH(&pauseEvt, &l_SysTick_Handler); + } + else { // the button is released + static QEvt const serveEvt = QEVT_INITIALIZER(SERVE_SIG); + QACTIVE_PUBLISH(&serveEvt, &l_SysTick_Handler); + } + } + +#ifdef Q_SPY + tmp = SysTick->CTRL; // clear CTRL_COUNTFLAG + QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover +#endif + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} +//............................................................................ +// interrupt handler for testing preemptions in QK +void EXTI0_1_IRQHandler(void); // prototype +void EXTI0_1_IRQHandler(void) { + QK_ISR_ENTRY(); // inform QK about entering an ISR + + static QEvt const testEvt = QEVT_INITIALIZER(TEST_SIG); + QACTIVE_POST(AO_Table, &testEvt, &l_EXTI0_1_IRQHandler); + + QK_ISR_EXIT(); // inform QK about exiting an ISR +} + +//............................................................................ +#ifdef Q_SPY +// ISR for receiving bytes from the QSPY Back-End +// NOTE: This ISR is "QF-unaware" meaning that it does not interact with +// the QF/QK and is not disabled. Such ISRs don't need to call +// QK_ISR_ENTRY/QK_ISR_EXIT and they cannot post or publish events. + +void USART2_IRQHandler(void); // prototype +void USART2_IRQHandler(void) { // used in QS-RX (kernel UNAWARE interrutp) + // is RX register NOT empty? + if ((USART2->ISR & (1U << 5U)) != 0U) { + uint32_t b = USART2->RDR; + QS_RX_PUT(b); + } + + QK_ARM_ERRATUM_838869(); +} +#endif // Q_SPY + +//............................................................................ +#ifdef QF_ON_CONTEXT_SW +// NOTE: the context-switch callback is called with interrupts DISABLED +void QF_onContextSw(QActive *prev, QActive *next) { + QS_BEGIN_INCRIT(CONTEXT_SW, 0U) // in critical section! + QS_OBJ(prev); + QS_OBJ(next); + QS_END_INCRIT() +} +#endif // QF_ON_CONTEXT_SW + + +//============================================================================ +// BSP functions... + +void BSP_init(void) { + // Configure the MPU to prevent NULL-pointer dereferencing ... + MPU->RBAR = 0x0U // base address (NULL) + | MPU_RBAR_VALID_Msk // valid region + | (MPU_RBAR_REGION_Msk & 7U); // region #7 + MPU->RASR = (7U << MPU_RASR_SIZE_Pos) // 2^(7+1) region + | (0x0U << MPU_RASR_AP_Pos) // no-access region + | MPU_RASR_ENABLE_Msk; // region enable + MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk // enable background region + | MPU_CTRL_ENABLE_Msk; // enable the MPU + __ISB(); + __DSB(); + + // NOTE: SystemInit() has been already called from the startup code + // but SystemCoreClock needs to be updated + SystemCoreClockUpdate(); + + BSP_randomSeed(1234U); // seed the random number generator + + // initialize the QS software tracing... + if (!QS_INIT((void *)0)) { + Q_ERROR(); + } + + // dictionaries... + QS_OBJ_DICTIONARY(&l_SysTick_Handler); + QS_USR_DICTIONARY(PHILO_STAT); + QS_USR_DICTIONARY(PAUSED_STAT); + QS_USR_DICTIONARY(CONTEXT_SW); + + QS_ONLY(produce_sig_dict()); + + // setup the QS filters... + QS_GLB_FILTER(QS_ALL_RECORDS); // all records + QS_GLB_FILTER(-QS_QF_TICK); // exclude the clock tick +} +//............................................................................ +void BSP_start(void) { + // initialize event pools + static QF_MPOOL_EL(TableEvt) smlPoolSto[2*N_PHILO]; + QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0])); + + // initialize publish-subscribe + static QSubscrList subscrSto[MAX_PUB_SIG]; + QActive_psInit(subscrSto, Q_DIM(subscrSto)); + + // instantiate and start AOs/threads... + + static QEvt const *philoQueueSto[N_PHILO][10]; + for (uint8_t n = 0U; n < N_PHILO; ++n) { + Philo_ctor(n); + QACTIVE_START(AO_Philo[n], + + // NOTE: set the preemption-threshold of all Philos to + // the same level, so that they cannot preempt each other. + Q_PRIO(n + 3U, N_PHILO + 2U), // QF-prio/pre-thre. + + philoQueueSto[n], // event queue storage + Q_DIM(philoQueueSto[n]), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param + } + + static QEvt const *tableQueueSto[N_PHILO]; + Table_ctor(); + QACTIVE_START(AO_Table, + N_PHILO + 7U, // QP prio. of the AO + tableQueueSto, // event queue storage + Q_DIM(tableQueueSto), // queue length [events] + (void *)0, 0U, // no stack storage + (void *)0); // no initialization param +} +//............................................................................ +void BSP_displayPhilStat(uint8_t n, char const *stat) { + Q_UNUSED_PAR(n); + + if (stat[0] == 'e') { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on + } + else { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off + } + + // app-specific trace record... + QS_BEGIN_ID(PHILO_STAT, AO_Table->prio) + QS_U8(1, n); // Philosopher number + QS_STR(stat); // Philosopher status + QS_END() +} +//............................................................................ +void BSP_displayPaused(uint8_t const paused) { + // not enough LEDs to implement this feature + if (paused != 0U) { + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + } + else { + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + } + + // application-specific trace record + QS_BEGIN_ID(PAUSED_STAT, AO_Table->prio) + QS_U8(1, paused); // Paused status + QS_END() +} +//............................................................................ +void BSP_randomSeed(uint32_t seed) { + l_rndSeed = seed; +} +//............................................................................ +uint32_t BSP_random(void) { // a very cheap pseudo-random-number generator + + QSchedStatus lockStat = QK_schedLock(N_PHILO); // N_PHILO prio. ceiling + // "Super-Duper" Linear Congruential Generator (LCG) + // LCG(2^32, 3*7*11*13*23, 0, seed) + // + uint32_t rnd = l_rndSeed * (3U*7U*11U*13U*23U); + l_rndSeed = rnd; // set for the next time + QK_schedUnlock(lockStat); + + return (rnd >> 8U); +} +//............................................................................ +void BSP_ledOn(void) { + GPIOA->BSRR = (1U << LD4_PIN); // turn LED on +} +//............................................................................ +void BSP_ledOff(void) { + GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED off +} +//............................................................................ +void BSP_terminate(int16_t result) { + Q_UNUSED_PAR(result); +} + +//============================================================================ +// QF callbacks... +void QF_onStartup(void) { + // set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate + SysTick_Config(SystemCoreClock / BSP_TICKS_PER_SEC); + + // assign all priority bits for preemption-prio. and none to sub-prio. + // NOTE: this might have been changed by STM32Cube. + NVIC_SetPriorityGrouping(0U); + + // set priorities of ALL ISRs used in the system, see NOTE1 + NVIC_SetPriority(USART2_IRQn, 0U); // kernel UNAWARE interrupt + NVIC_SetPriority(EXTI0_1_IRQn, QF_AWARE_ISR_CMSIS_PRI + 0U); + NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U); + // ... + + // enable IRQs... + NVIC_EnableIRQ(EXTI0_1_IRQn); + +#ifdef Q_SPY + NVIC_EnableIRQ(USART2_IRQn); // UART2 interrupt used for QS-RX +#endif +} +//............................................................................ +void QF_onCleanup(void) { +} + +//............................................................................ +void QK_onIdle(void) { + // toggle an LED on and then off (not enough LEDs, see NOTE2) + //QF_INT_DISABLE(); + //GPIOA->BSRR = (1U << LD4_PIN); // turn LED[n] on + //GPIOA->BSRR = (1U << (LD4_PIN + 16U)); // turn LED[n] off + //QF_INT_ENABLE(); + +#ifdef Q_SPY + QS_rxParse(); // parse all the received bytes + + if ((USART2->ISR & (1U << 7U)) != 0U) { // TXE empty? + QF_INT_DISABLE(); + uint16_t b = QS_getByte(); + QF_INT_ENABLE(); + + if (b != QS_EOD) { // not End-Of-Data? + USART2->TDR = b; // put into the DR register + } + } +#elif defined NDEBUG + // Put the CPU and peripherals to the low-power mode. + // you might need to customize the clock management for your application, + // see the datasheet for your particular Cortex-M MCU. + __WFI(); // Wait-For-Interrupt +#endif +} + +//============================================================================ +// QS callbacks... +#ifdef Q_SPY + +//............................................................................ +static uint16_t const QS_UARTPrescTable[12] = { + 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U +}; + +#define QS_UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + ((((__PCLK__)/QS_UARTPrescTable[(__CLOCKPRESCALER__)]) \ + + ((__BAUD__)/2U)) / (__BAUD__)) + +#define QS_UART_PRESCALER_DIV1 0U + +// USART2 pins PA.2 and PA.3 +#define USART2_TX_PIN 2U +#define USART2_RX_PIN 3U + +//............................................................................ +uint8_t QS_onStartup(void const *arg) { + Q_UNUSED_PAR(arg); + + static uint8_t qsTxBuf[2*1024]; // buffer for QS-TX channel + QS_initBuf(qsTxBuf, sizeof(qsTxBuf)); + + static uint8_t qsRxBuf[100]; // buffer for QS-RX channel + QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); + + // enable peripheral clock for USART2 + RCC->IOPENR |= ( 1U << 0U); // Enable GPIOA clock for USART pins + RCC->APBENR1 |= ( 1U << 17U); // Enable USART#2 clock + + // Configure PA to USART2_RX, PA to USART2_TX + GPIOA->AFR[0] &= ~((15U << 4U*USART2_RX_PIN) | (15U << 4U*USART2_TX_PIN)); + GPIOA->AFR[0] |= (( 1U << 4U*USART2_RX_PIN) | ( 1U << 4U*USART2_TX_PIN)); + GPIOA->MODER &= ~(( 3U << 2U*USART2_RX_PIN) | ( 3U << 2U*USART2_TX_PIN)); + GPIOA->MODER |= (( 2U << 2U*USART2_RX_PIN) | ( 2U << 2U*USART2_TX_PIN)); + + // baud rate + USART2->BRR = QS_UART_DIV_SAMPLING16( + SystemCoreClock, 115200U, QS_UART_PRESCALER_DIV1); + USART2->CR3 = 0x0000U | // no flow control + (1U << 12U); // disable overrun detection (OVRDIS) + USART2->CR2 = 0x0000U; // 1 stop bit + USART2->CR1 = ((1U << 2U) | // enable RX + (1U << 3U) | // enable TX + (1U << 5U) | // enable RX interrupt + (0U << 12U) | // 8 data bits + (0U << 28U) | // 8 data bits + (1U << 0U)); // enable USART + + QS_tickPeriod_ = SystemCoreClock / BSP_TICKS_PER_SEC; + QS_tickTime_ = QS_tickPeriod_; // to start the timestamp at zero + + return 1U; // return success +} +//............................................................................ +void QS_onCleanup(void) { +} +//............................................................................ +QSTimeCtr QS_onGetTime(void) { // NOTE: invoked with interrupts DISABLED + if ((SysTick->CTRL & 0x00010000U) == 0U) { // not set? + return QS_tickTime_ - (QSTimeCtr)SysTick->VAL; + } + else { // the rollover occurred, but the SysTick_ISR did not run yet + return QS_tickTime_ + QS_tickPeriod_ - (QSTimeCtr)SysTick->VAL; + } +} +//............................................................................ +// NOTE: +// No critical section in QS_onFlush() to avoid nesting of critical sections +// in case QS_onFlush() is called from Q_onError(). +void QS_onFlush(void) { + for (;;) { + uint16_t b = QS_getByte(); + if (b != QS_EOD) { + while ((USART2->ISR & (1U << 7U)) == 0U) { // while TXE not empty + } + USART2->TDR = b; + } + else { + break; + } + } +} +//............................................................................ +void QS_onReset(void) { + NVIC_SystemReset(); +} +//............................................................................ +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ + Q_UNUSED_PAR(cmdId); + Q_UNUSED_PAR(param1); + Q_UNUSED_PAR(param2); + Q_UNUSED_PAR(param3); +} + +#endif // Q_SPY +//---------------------------------------------------------------------------- + +//============================================================================ +// NOTE1: +// The QF_AWARE_ISR_CMSIS_PRI constant from the QF port specifies the highest +// ISR priority that is disabled by the QF framework. The value is suitable +// for the NVIC_SetPriority() CMSIS function. +// +// Only ISRs prioritized at or below the QF_AWARE_ISR_CMSIS_PRI level (i.e., +// with the numerical values of priorities equal or higher than +// QF_AWARE_ISR_CMSIS_PRI) are allowed to call the QK_ISR_ENTRY/ +// QK_ISR_ENTRY macros or any other QF/QK services. These ISRs are +// "QF-aware". +// +// Conversely, any ISRs prioritized above the QF_AWARE_ISR_CMSIS_PRI priority +// level (i.e., with the numerical values of priorities less than +// QF_AWARE_ISR_CMSIS_PRI) are never disabled and are not aware of the kernel. +// Such "QF-unaware" ISRs cannot call ANY QF/QK services. In particular they +// can NOT call the macros QK_ISR_ENTRY/QK_ISR_ENTRY. The only mechanism +// by which a "QF-unaware" ISR can communicate with the QF framework is by +// triggering a "QF-aware" ISR, which can post/publish events. +// +// NOTE2: +// The User LED is used to visualize the idle loop activity. The brightness +// of the LED is proportional to the frequency of the idle loop. +// Please note that the LED is toggled with interrupts locked, so no interrupt +// execution time contributes to the brightness of the User LED. +// diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/main.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/main.c new file mode 100644 index 0000000..e2dc5ea --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/main.c @@ -0,0 +1,233 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "qpc.h" +#include "bsp.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + + /* USER CODE BEGIN 1 */ + QF_init(); + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Initialize leds */ + BSP_LED_Init(LED_GREEN); + + /* Initialize User push-button without interrupt mode. */ + BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO); + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + BSP_init(); + BSP_start(); + QF_run(); // does NOT return + //##################################################### + + while (1) + { + BSP_LED_On(LED_GREEN); + HAL_Delay(100); + BSP_LED_Off(LED_GREEN); + HAL_Delay(300); + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; +/* USER CODE BEGIN MX_GPIO_Init_1 */ +/* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET); + + /*Configure GPIO pin : PC13 */ + GPIO_InitStruct.Pin = GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /*Configure GPIO pin : PA5 */ + GPIO_InitStruct.Pin = GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pins : PB8 PB9 */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF6_I2C1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + +/* USER CODE BEGIN MX_GPIO_Init_2 */ +/* USER CODE END MX_GPIO_Init_2 */ +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/philo.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/philo.c new file mode 100644 index 0000000..2c7498a --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/philo.c @@ -0,0 +1,254 @@ +//$file${Src::philo.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${Src::philo.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${Src::philo.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +typedef struct Philo { +// protected: + QActive super; + +// private: + QTimeEvt timeEvt; + uint8_t id; + +// public: +} Philo; + +extern Philo Philo_inst[N_PHILO]; + +// protected: +static QState Philo_initial(Philo * const me, void const * const par); +static QState Philo_thinking(Philo * const me, QEvt const * const e); +static QState Philo_hungry(Philo * const me, QEvt const * const e); +static QState Philo_eating(Philo * const me, QEvt const * const e); +//$enddecl${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Philo_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Philo_ctor} ...................................................... +void Philo_ctor(uint_fast8_t const id) { + Philo * const me = &Philo_inst[id]; + QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); + QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), + me->id = (uint8_t)id; +} +//$enddef${Shared::Philo_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Philo[N_PHILO]} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Philo[N_PHILO]} ............................................... +QActive * const AO_Philo[N_PHILO] = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; +//$enddef${Shared::AO_Philo[N_PHILO]} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Philo} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Philo} .............................................................. +Philo Philo_inst[N_PHILO]; + +//${AOs::Philo::SM} .......................................................... +static QState Philo_initial(Philo * const me, void const * const par) { + //${AOs::Philo::SM::initial} + Q_UNUSED_PAR(par); + + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); + QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + + QActive_subscribe(&me->super, EAT_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + QS_FUN_DICTIONARY(&Philo_thinking); + QS_FUN_DICTIONARY(&Philo_hungry); + QS_FUN_DICTIONARY(&Philo_eating); + + return Q_TRAN(&Philo_thinking); +} + +//${AOs::Philo::SM::thinking} ................................................ +static QState Philo_thinking(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::thinking} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_hungry); + break; + } + //${AOs::Philo::SM::thinking::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::thinking::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::hungry} .................................................. +static QState Philo_hungry(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::hungry} + case Q_ENTRY_SIG: { + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); + pe->philoId = me->id; + #endif + QACTIVE_POST(AO_Table, &pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::hungry::EAT} + case EAT_SIG: { + //${AOs::Philo::SM::hungry::EAT::[e->philoId==me->iid]} + if (Q_EVT_CAST(TableEvt)->philoId == me->id) { + status_ = Q_TRAN(&Philo_eating); + } + else { + status_ = Q_UNHANDLED(); + } + break; + } + //${AOs::Philo::SM::hungry::DONE} + case DONE_SIG: { + // DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Philo::SM::eating} .................................................. +static QState Philo_eating(Philo * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Philo::SM::eating} + case Q_ENTRY_SIG: { + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating} + case Q_EXIT_SIG: { + (void)QTimeEvt_disarm(&me->timeEvt); + + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); + #else + TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); + pe->philoId = me->id; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + status_ = Q_HANDLED(); + break; + } + //${AOs::Philo::SM::eating::TIMEOUT} + case TIMEOUT_SIG: { + status_ = Q_TRAN(&Philo_thinking); + break; + } + //${AOs::Philo::SM::eating::EAT, DONE} + case EAT_SIG: // intentionally fall through + case DONE_SIG: { + // EAT or DONE must be for other Philos than this one + Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} +//$enddef${AOs::Philo} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_hal_msp.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_hal_msp.c new file mode 100644 index 0000000..12c12b4 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_hal_msp.c @@ -0,0 +1,82 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32c0xx_hal_msp.c + * @brief This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_it.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_it.c new file mode 100644 index 0000000..053be6b --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/stm32c0xx_it.c @@ -0,0 +1,103 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32c0xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32c0xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVC_IRQn 0 */ + + /* USER CODE END SVC_IRQn 0 */ + /* USER CODE BEGIN SVC_IRQn 1 */ + + /* USER CODE END SVC_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32C0xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32c0xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/syscalls.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/syscalls.c new file mode 100644 index 0000000..f3462a0 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/syscalls.c @@ -0,0 +1,176 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeIDE + * @brief STM32CubeIDE Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib libc-manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + + return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _open(char *path, int flags, ...) +{ + (void)path; + (void)flags; + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + (void)status; + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + (void)name; + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + (void)buf; + return -1; +} + +int _stat(char *file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + (void)old; + (void)new; + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + (void)name; + (void)argv; + (void)env; + errno = ENOMEM; + return -1; +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/sysmem.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/sysmem.c new file mode 100644 index 0000000..6122419 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/sysmem.c @@ -0,0 +1,79 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeIDE + * @brief STM32CubeIDE System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) + { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) + { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/system_stm32c0xx.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/system_stm32c0xx.c new file mode 100644 index 0000000..f0e137f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/system_stm32c0xx.c @@ -0,0 +1,228 @@ +/** + ****************************************************************************** + * @file system_stm32c0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32c0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32c0xx_system + * @{ + */ + +/** @addtogroup STM32C0xx_System_Private_Includes + * @{ + */ + +#include "stm32c0xx.h" + +#if !defined (HSE_VALUE) +#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ +#endif /* LSI_VALUE */ + +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ +#endif /* LSE_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +//#define VECT_TAB_SRAM +#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 48000000UL; + + const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; + const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32C0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit(void) +{ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE + * + * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE + * + * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value + * 48 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp; + uint32_t hsidiv; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_0: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + + case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ + SystemCoreClock = LSI_VALUE; + break; + + case RCC_CFGR_SWS_2: /* LSE used as system clock */ + SystemCoreClock = LSE_VALUE; + break; + + case 0x00000000U: /* HSI used as system clock */ + default: /* HSI used as system clock */ + hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); + SystemCoreClock = (HSI_VALUE/hsidiv); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/table.c b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/table.c new file mode 100644 index 0000000..eeb6d4b --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Src/table.c @@ -0,0 +1,342 @@ +//$file${Src::table.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// +// Model: dpp.qm +// File: ${Src::table.c} +// +// This code has been generated by QM 6.1.2 . +// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost. +// +// SPDX-License-Identifier: GPL-3.0-or-later +// +// This generated code is open source software: you can redistribute it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation. +// +// This code is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +// more details. +// +// NOTE: +// Alternatively, this generated code may be distributed under the terms +// of Quantum Leaps commercial licenses, which expressly supersede the GNU +// General Public License and are specifically designed for licensees +// interested in retaining the proprietary status of their code. +// +// Contact information: +// +// +// +//$endhead${Src::table.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +#include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +//$declare${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +typedef struct Table { +// protected: + QActive super; + +// private: + uint8_t fork[N_PHILO]; + bool isHungry[N_PHILO]; + +// public: +} Table; + +extern Table Table_inst; + +// protected: +static QState Table_initial(Table * const me, void const * const par); +static QState Table_active(Table * const me, QEvt const * const e); +static QState Table_serving(Table * const me, QEvt const * const e); +static QState Table_paused(Table * const me, QEvt const * const e); +//$enddecl${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +//$skip${QP_VERSION} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv +// Check for the minimum required QP version +#if (QP_VERSION < 730U) || (QP_VERSION != ((QP_RELEASE^4294967295U) % 0x3E8U)) +#error qpc version 7.3.0 or higher required +#endif +//$endskip${QP_VERSION} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::Table_ctor} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::Table_ctor} ...................................................... +void Table_ctor(void) { + Table * const me = &Table_inst; + QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + } +} +//$enddef${Shared::Table_ctor} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${Shared::AO_Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${Shared::AO_Table} ........................................................ +QActive * const AO_Table = &Table_inst.super; +//$enddef${Shared::AO_Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +//$define${AOs::Table} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv + +//${AOs::Table} .............................................................. +Table Table_inst; + +//${AOs::Table::SM} .......................................................... +static QState Table_initial(Table * const me, void const * const par) { + //${AOs::Table::SM::initial} + Q_UNUSED_PAR(par); + + #ifdef Q_SPY + Table *Table_inst = me; + QS_OBJ_DICTIONARY(Table_inst); + #endif + + QActive_subscribe(&me->super, DONE_SIG); + QActive_subscribe(&me->super, PAUSE_SIG); + QActive_subscribe(&me->super, SERVE_SIG); + QActive_subscribe(&me->super, TEST_SIG); + + for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); + } + + QS_FUN_DICTIONARY(&Table_active); + QS_FUN_DICTIONARY(&Table_serving); + QS_FUN_DICTIONARY(&Table_paused); + + return Q_TRAN(&Table_serving); +} + +//${AOs::Table::SM::active} .................................................. +static QState Table_active(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::TEST} + case TEST_SIG: { + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&QHsm_top); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::serving} ......................................... +static QState Table_serving(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::serving} + case Q_ENTRY_SIG: { + // give permissions to eat... + for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, HUNGRY); + uint8_t m = left(n); + //${AOs::Table::SM::active::serving::HUNGRY::[bothfree]} + if ((me->fork[m] == FREE) && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(n, EATING); + status_ = Q_HANDLED(); + } + //${AOs::Table::SM::active::serving::HUNGRY::[else]} + else { + me->isHungry[n] = true; + status_ = Q_HANDLED(); + } + break; + } + //${AOs::Table::SM::active::serving::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + m = right(n); // check the right neighbor + + if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + m = left(n); // check the left neighbor + n = left(m); // left fork of the left neighbor + if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; + #ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); + #else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; + #endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); + } + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::EAT} + case EAT_SIG: { + Q_ERROR(); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::serving::PAUSE} + case PAUSE_SIG: { + status_ = Q_TRAN(&Table_paused); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} + +//${AOs::Table::SM::active::paused} .......................................... +static QState Table_paused(Table * const me, QEvt const * const e) { + QState status_; + switch (e->sig) { + //${AOs::Table::SM::active::paused} + case Q_ENTRY_SIG: { + BSP_displayPaused(1U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused} + case Q_EXIT_SIG: { + BSP_displayPaused(0U); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::SERVE} + case SERVE_SIG: { + status_ = Q_TRAN(&Table_serving); + break; + } + //${AOs::Table::SM::active::paused::HUNGRY} + case HUNGRY_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // philo ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + me->isHungry[n] = true; + BSP_displayPhilStat(n, HUNGRY); + status_ = Q_HANDLED(); + break; + } + //${AOs::Table::SM::active::paused::DONE} + case DONE_SIG: { + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + + // phil ID must be in range and he must be not hungry + Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + + BSP_displayPhilStat(n, THINKING); + uint8_t m = left(n); + + // both forks of Phil[n] must be used + Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + + me->fork[m] = FREE; + me->fork[n] = FREE; + status_ = Q_HANDLED(); + break; + } + default: { + status_ = Q_SUPER(&Table_active); + break; + } + } + return status_; +} +//$enddef${AOs::Table} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Startup/startup_stm32c031c6tx.s b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Startup/startup_stm32c031c6tx.s new file mode 100644 index 0000000..768eba5 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/Startup/startup_stm32c031c6tx.s @@ -0,0 +1,258 @@ +/** + ****************************************************************************** + * @file startup_stm32c031xx.s + * @author MCD Application Team + * @brief STM32C031xx devices vector table GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0+ processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ******************************************************************************* + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ******************************************************************************* + */ + + .syntax unified + .cpu cortex-m0plus + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2] + adds r2, r2, #4 + + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word 0 /* reserved */ + .word RTC_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word 0 /* reserved */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMAMUX1_IRQHandler /* DMAMUX1 */ + .word ADC1_IRQHandler /* ADC1 */ + .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word 0 /* reserved */ + .word TIM3_IRQHandler /* TIM3 */ + .word 0 /* reserved */ + .word 0 /* reserved */ + .word TIM14_IRQHandler /* TIM14 */ + .word 0 /* reserved */ + .word TIM16_IRQHandler /* TIM16 */ + .word TIM17_IRQHandler /* TIM17 */ + .word I2C1_IRQHandler /* I2C1 */ + .word 0 /* reserved */ + .word SPI1_IRQHandler /* SPI1 */ + .word 0 /* reserved */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word 0 /* reserved */ + .word 0 /* reserved */ + .word 0 /* reserved */ +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMAMUX1_IRQHandler + .thumb_set DMAMUX1_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/dpp.qm b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/dpp.qm new file mode 100644 index 0000000..b1f95e4 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/Core/dpp.qm @@ -0,0 +1,526 @@ + + + Dining Philosopher Problem example + + + + + + + { + EAT_SIG = Q_USER_SIG, // published by Table to let a Philo eat + DONE_SIG, // published by Philo when done eating + PAUSE_SIG, // published by BSP to pause the application + SERVE_SIG, // published by BSP to serve re-start serving forks + TEST_SIG, // published by BSP to test the application + MAX_PUB_SIG, // the last published signal + + TIMEOUT_SIG, // posted by time event to Philo + HUNGRY_SIG, // posted by hungry Philo to Table + MAX_SIG // the last signal +}; + + + + QS_SIG_DICTIONARY(EAT_SIG, (void *)0); +QS_SIG_DICTIONARY(DONE_SIG, (void *)0); +QS_SIG_DICTIONARY(PAUSE_SIG, (void *)0); +QS_SIG_DICTIONARY(SERVE_SIG, (void *)0); +QS_SIG_DICTIONARY(TEST_SIG, (void *)0); + +QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0); +QS_SIG_DICTIONARY(HUNGRY_SIG, (void *)0); + + + + ((uint8_t)5U) + + + + + + + + + + if (me != (TableEvt *)0) { + me->philoId = id; +} +return me; + + + + + = { + &Philo_inst[0].super, + &Philo_inst[1].super, + &Philo_inst[2].super, + &Philo_inst[3].super, + &Philo_inst[4].super +}; + + + + + + Philo * const me = &Philo_inst[id]; +QActive_ctor(&me->super, Q_STATE_CAST(&Philo_initial)); +QTimeEvt_ctorX(&me->timeEvt, &me->super, TIMEOUT_SIG, 0U), +me->id = (uint8_t)id; + + + + = &Table_inst.super; + + + + Table * const me = &Table_inst; +QActive_ctor(&me->super, Q_STATE_CAST(&Table_initial)); +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; +} + + + + + + + The Philo AO and the N_PHILO instances + + + + + + + + + + + Q_UNUSED_PAR(par); + +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id], me->id); +QS_OBJ_ARR_DICTIONARY(&Philo_inst[me->id].timeEvt, me->id); + +QActive_subscribe(&me->super, EAT_SIG); +QActive_subscribe(&me->super, TEST_SIG); + + + + + + + QTimeEvt_armX(&me->timeEvt, think_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + #ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, HUNGRY_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, HUNGRY_SIG); +pe->philoId = me->id; +#endif +QACTIVE_POST(AO_Table, &pe->super, &me->super); + + + + + Q_EVT_CAST(TableEvt)->philoId == me->id + + + + + + + + + + + // DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + QTimeEvt_armX(&me->timeEvt, eat_time(), 0U); + (void)QTimeEvt_disarm(&me->timeEvt); + +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, DONE_SIG, me->id); +#else +TableEvt *pe = Q_NEW(TableEvt, DONE_SIG); +pe->philoId = me->id; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); + + + + + + + + + // EAT or DONE must be for other Philos than this one +Q_ASSERT(Q_EVT_CAST(TableEvt)->philoId != me->id); + + + + + + + + + + + + + + + + + + + + + + + + + Q_UNUSED_PAR(par); + +#ifdef Q_SPY +Table *Table_inst = me; +QS_OBJ_DICTIONARY(Table_inst); +#endif + +QActive_subscribe(&me->super, DONE_SIG); +QActive_subscribe(&me->super, PAUSE_SIG); +QActive_subscribe(&me->super, SERVE_SIG); +QActive_subscribe(&me->super, TEST_SIG); + +for (uint8_t n = 0U; n < N_PHILO; ++n) { + me->fork[n] = FREE; + me->isHungry[n] = false; + BSP_displayPhilStat(n, THINKING); +} + + + + + + + + + + + + + + + Q_ERROR(); + + + + + + + // give permissions to eat... +for (uint8_t n = 0U; n < N_PHILO; ++n) { + if (me->isHungry[n] + && (me->fork[left(n)] == FREE) + && (me->fork[n] == FREE)) + { + me->fork[left(n)] = USED; + me->fork[n] = USED; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = n; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + me->isHungry[n] = false; + BSP_displayPhilStat(n, EATING); + } +} + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, HUNGRY); +uint8_t m = left(n); + + + (me->fork[m] == FREE) && (me->fork[n] == FREE) + me->fork[m] = USED; +me->fork[n] = USED; +#ifdef QEVT_PAR_INIT +TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, n); +#else +TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); +pe->philoId = n; +#endif +QACTIVE_PUBLISH(&pe->super, &me->super); +BSP_displayPhilStat(n, EATING); + + + + + + + else + me->isHungry[n] = true; + + + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; +m = right(n); // check the right neighbor + +if (me->isHungry[m] && (me->fork[m] == FREE)) { + me->fork[n] = USED; + me->fork[m] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} +m = left(n); // check the left neighbor +n = left(m); // left fork of the left neighbor +if (me->isHungry[m] && (me->fork[n] == FREE)) { + me->fork[m] = USED; + me->fork[n] = USED; + me->isHungry[m] = false; +#ifdef QEVT_PAR_INIT + TableEvt const *pe = Q_NEW(TableEvt, EAT_SIG, m); +#else + TableEvt *pe = Q_NEW(TableEvt, EAT_SIG); + pe->philoId = m; +#endif + QACTIVE_PUBLISH(&pe->super, &me->super); + BSP_displayPhilStat(m, EATING); +} + + + + + + + Q_ERROR(); + + + + + + + + + + + + + + + + + BSP_displayPaused(1U); + BSP_displayPaused(0U); + + + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// philo ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +me->isHungry[n] = true; +BSP_displayPhilStat(n, HUNGRY); + + + + + + + uint8_t n = Q_EVT_CAST(TableEvt)->philoId; + +// phil ID must be in range and he must be not hungry +Q_ASSERT((n < N_PHILO) && (!me->isHungry[n])); + +BSP_displayPhilStat(n, THINKING); +uint8_t m = left(n); + +// both forks of Phil[n] must be used +Q_ASSERT((me->fork[n] == USED) && (me->fork[m] == USED)); + +me->fork[m] = FREE; +me->fork[n] = FREE; + + + + + + + + + + + + + + + + + + + + #ifndef DPP_H_ +#define DPP_H_ + +$declare ${Shared} + +#ifdef QXK_H_ + +extern QXThread * const TH_XThread1; +void XThread1_ctor(void); + +extern QXThread * const TH_XThread2; +void XThread2_ctor(void); + +extern QXSemaphore TH_sema; +extern QXMutex TH_mutex; + +#endif // QXK_H_ + +#endif // DPP_H_ + + + + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Philo} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide a randomized think time for Philos +static QTimeEvtCtr think_time(void); // prototype +static inline QTimeEvtCtr think_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + (BSP_TICKS_PER_SEC/2U)); +} + +// helper function to provide a randomized eat time for Philos +static QTimeEvtCtr eat_time(void); // prototype +static inline QTimeEvtCtr eat_time(void) { + return (QTimeEvtCtr)((BSP_random() % BSP_TICKS_PER_SEC) + + BSP_TICKS_PER_SEC); +} +//---------------------------------------------------------------------------- + +$define ${Shared::Philo_ctor} +$define ${Shared::AO_Philo[N_PHILO]} +$define ${AOs::Philo} + + + + #include "qpc.h" // QP/C real-time embedded framework +#include "dpp.h" // DPP Application interface +#include "bsp.h" // Board Support Package + +$declare ${AOs::Table} + +//---------------------------------------------------------------------------- +Q_DEFINE_THIS_FILE + +// helper function to provide the RIGHT neighbor of a Philo[n] +static inline uint8_t right(uint8_t const n) { + return (uint8_t)((n + (N_PHILO - 1U)) % N_PHILO); +} + +// helper function to provide the LEFT neighbor of a Philo[n] +static inline uint8_t left(uint8_t const n) { + return (uint8_t)((n + 1U) % N_PHILO); +} + +#define FREE ((uint8_t)0U) +#define USED ((uint8_t)1U) + +#define THINKING "thinking" +#define HUNGRY "hungry " +#define EATING "eating " + +//---------------------------------------------------------------------------- + +$define ${Shared::Table_ctor} +$define ${Shared::AO_Table} +$define ${AOs::Table} + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/README.md b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/README.md new file mode 100644 index 0000000..d4251c2 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/README.md @@ -0,0 +1,72 @@ +# About this project + +This project is for STM32Cube IDE with CubeMX and the +NUCLEO-C031C6 board: + +![](stm32-nucleo-c031c6.jpg) + +This project demonstrates: +- Using the QP/C Framework from the CMSIS-pack + + Using the preemptive, non-blocking QK kernel +- DPP (Dining Philosopher Problem) example application + + code generated from a QM model, which can be edited manually, + or with graphical QM modeling tool. +- Debug configuration +- Spy configuration with software tracing + + +# Steps to use this project + +1. Choose menu: "File | Open Projects from File System..." +2. In the Project Explorer select (double-click) on the file "project.ioc" +3. Choose menu: "Project | Generate Code" + - this will create directory `Middlewares` in the project directory +4. Build the project (click the "hammer" tool in the toolbar) +5. Connect the NUCLEO-C031C6 board and Run/Debug the project + + +# Using the Spy configuration + +1. Click on the down-arrow on the "hammer" tool and choose "Spy" +2. Click on "Debug configurations" button and choose "Debug Configurations..." +3. Choose or create the "project Spy" debug configuration +4. Open a terminal window and type "qspy -c ", where is the serial + port of your NUCLEO-C031C6 board +5. Start debugging / run the program +6. The qspy window should start showing the output. + + +# Modifying the example + +The example code is located in the `Core` sub-folder: + +``` +\---Core + | dpp.qm + | + +---Inc + | bsp.h + | dpp.h + | main.h + | RTE_Components.h + | stm32c0xx_hal_conf.h + | stm32c0xx_it.h + | stm32c0xx_nucleo_conf.h + | + +---Src + | bsp.c + | main.c + | philo.c + | stm32c0xx_hal_msp.c + | stm32c0xx_it.c + | syscalls.c + | sysmem.c + | system_stm32c0xx.c + | table.c +``` + +The example code can be edited manually, as any regular C code. + +However, it is also possible (and recommended) to model the application +graphically by means of the QM modeling tool and then **generate** the +code automatically. The example model is located in the file `Core/dpp.qm`. diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/STM32C031C6TX_FLASH.ld b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/STM32C031C6TX_FLASH.ld new file mode 100644 index 0000000..669b267 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/STM32C031C6TX_FLASH.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-C031C6 Board embedding STM32C031C6Tx Device from stm32c0 series +** 32KBytes FLASH +** 12KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 12K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Debug.launch b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Debug.launch new file mode 100644 index 0000000..6a02361 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Debug.launch @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Spy.launch b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Spy.launch new file mode 100644 index 0000000..020a37f --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project Spy.launch @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project.ioc b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project.ioc new file mode 100644 index 0000000..9e56b48 --- /dev/null +++ b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/project.ioc @@ -0,0 +1,146 @@ +#MicroXplorer Configuration settings - do not modify +BSP_IP_NAME=NUCLEO-C031C6 +CAD.formats= +CAD.pinconfig= +CAD.provider= +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +Mcu.CPN=STM32C031C6T3 +Mcu.Family=STM32C0 +Mcu.IP0=CORTEX_M0+ +Mcu.IP1=NUCLEO-C031C6 +Mcu.IP2=NUCLEO-C031C6 +Mcu.IP3=NVIC +Mcu.IP4=RCC +Mcu.IP5=SYS +Mcu.IPNb=7 +Mcu.Name=STM32C031C(4-6)Tx +Mcu.Package=LQFP48 +Mcu.Pin0=PC13 +Mcu.Pin1=PC14-OSCX_IN (PC14) +Mcu.Pin10=VP_SYS_VS_Systick +Mcu.Pin11=VP_QuantumLeaps.qpc_VS_RTEFJjqpc_7.3.4_7.3.4 +Mcu.Pin12=VP_NUCLEO-C031C6_VS_BSP_COMMON +Mcu.Pin2=PC15-OSCX_OUT (PC15) +Mcu.Pin3=PF0-OSC_IN (PF0) +Mcu.Pin4=PF1-OSC_OUT (PF1) +Mcu.Pin5=PA5 +Mcu.Pin6=PA13 +Mcu.Pin7=PA14-BOOT0 +Mcu.Pin8=PB8 +Mcu.Pin9=PB9 +Mcu.PinsNb=13 +Mcu.ThirdParty0=QuantumLeaps.qpc.7.3.4 +Mcu.ThirdPartyNb=1 +Mcu.UserConstants= +Mcu.UserName=STM32C031C6Tx +MxCube.Version=6.11.1 +MxDb.Version=DB.6.0.111 +NUCLEO-C031C6.BUTTON=2 +NUCLEO-C031C6.IPParameters=VCP,LD4,BUTTON +NUCLEO-C031C6.LD4=true +NUCLEO-C031C6.VCP=false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false +NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:false\:false\:true\:false +PA13.Locked=true +PA13.Signal=DEBUG_SWDIO +PA14-BOOT0.Locked=true +PA14-BOOT0.Signal=DEBUG_SWCLK +PA5.Locked=true +PA5.Signal=GPIO_Output +PB8.Locked=true +PB8.Signal=I2C1_SCL +PB9.Locked=true +PB9.Signal=I2C1_SDA +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSCX_IN\ (PC14).Locked=true +PC14-OSCX_IN\ (PC14).Mode=LSE-External-Oscillator +PC14-OSCX_IN\ (PC14).Signal=RCC_OSCX_IN +PC15-OSCX_OUT\ (PC15).Locked=true +PC15-OSCX_OUT\ (PC15).Mode=LSE-External-Oscillator +PC15-OSCX_OUT\ (PC15).Signal=RCC_OSCX_OUT +PF0-OSC_IN\ (PF0).Locked=true +PF0-OSC_IN\ (PF0).Mode=HSE-External-Oscillator +PF0-OSC_IN\ (PF0).Signal=RCC_OSC_IN +PF1-OSC_OUT\ (PF1).Locked=true +PF1-OSC_OUT\ (PF1).Mode=HSE-External-Oscillator +PF1-OSC_OUT\ (PF1).Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32C031C6Tx +ProjectManager.FirmwarePackage=STM32Cube FW_C0 V1.1.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=project.ioc +ProjectManager.ProjectName=project +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=STM32CubeIDE +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,0-MX_CORTEX_M0+_Init-CORTEX_M0+-false-HAL-true +QuantumLeaps.qpc.7.3.4.IPParameters=qpcCcRTEFJjEventOoProcessor,qpcCcRTEFJjFramework,qpcCcRTEFJjSoftwareOotracing,qpcCcRTEFJjRealAaTimeOoKernel +QuantumLeaps.qpc.7.3.4.RTEFJjqpc_Checked=true +QuantumLeaps.qpc.7.3.4.qpcCcRTEFJjEventOoProcessor=qep +QuantumLeaps.qpc.7.3.4.qpcCcRTEFJjFramework=qf +QuantumLeaps.qpc.7.3.4.qpcCcRTEFJjRealAaTimeOoKernel=qk +QuantumLeaps.qpc.7.3.4.qpcCcRTEFJjSoftwareOotracing=qs +QuantumLeaps.qpc.7.3.4_SwParameter=qpcCcRTEFJjSoftwareOotracing\:qs;qpcCcRTEFJjRealAaTimeOoKernel\:qk;qpcCcRTEFJjEventOoProcessor\:qep;qpcCcRTEFJjFramework\:qf; +RCC.ADCFreq_Value=48000000 +RCC.AHBFreq_Value=48000000 +RCC.APBFreq_Value=48000000 +RCC.APBTimFreq_Value=48000000 +RCC.CortexFreq_Value=48000000 +RCC.EXTERNAL_CLOCK_VALUE=12288000 +RCC.FCLKCortexFreq_Value=48000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=48000000 +RCC.HSE_VALUE=48000000 +RCC.HSISYSCLKDivider=RCC_HSI_DIV1 +RCC.HSI_VALUE=48000000 +RCC.I2C1Freq_Value=48000000 +RCC.I2S1Freq_Value=48000000 +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSISYSCLKDivider,HSI_VALUE,I2C1Freq_Value,I2S1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PWRFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=48000000 +RCC.MCO2PinFreq_Value=48000000 +RCC.PWRFreq_Value=48000000 +RCC.SYSCLKFreq_VALUE=48000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_HSE +RCC.USART1Freq_Value=48000000 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +VP_NUCLEO-C031C6_VS_BSP_COMMON.Mode=COMMON +VP_NUCLEO-C031C6_VS_BSP_COMMON.Signal=NUCLEO-C031C6_VS_BSP_COMMON +VP_QuantumLeaps.qpc_VS_RTEFJjqpc_7.3.4_7.3.4.Mode=RTEFJjqpc +VP_QuantumLeaps.qpc_VS_RTEFJjqpc_7.3.4_7.3.4.Signal=QuantumLeaps.qpc_VS_RTEFJjqpc_7.3.4_7.3.4 +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=NUCLEO-C031C6 +boardIOC=true +isbadioc=false diff --git a/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/stm32-nucleo-c031c6.jpg b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/stm32-nucleo-c031c6.jpg new file mode 100644 index 0000000..6647e2d Binary files /dev/null and b/cmsis-packs/dpp_nucleo-c031c6-qk-stm32cube/stm32-nucleo-c031c6.jpg differ