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[Bug]: Cannot set Verilog input/output pins to 1 bit #311

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Gelthir opened this issue Nov 22, 2024 · 1 comment
Open

[Bug]: Cannot set Verilog input/output pins to 1 bit #311

Gelthir opened this issue Nov 22, 2024 · 1 comment
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@Gelthir
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Gelthir commented Nov 22, 2024

Discord Thread

https://discord.com/channels/828292123936948244/1309351705074470974

What happened?

Attempting to change the width of a Verilog output pin to 1 is ignored, 2 seems to be minimum accepted.

Version

0.1225 Beta

What OSes are you seeing the problem on?

Windows

Relevant debug.log output, search next to the exectuable

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@Gelthir Gelthir added the bug Something isn't working label Nov 22, 2024
@github-project-automation github-project-automation bot moved this to Needs triage in Issues & Suggestions Nov 22, 2024
@Gelthir Gelthir changed the title [Bug]: Cannot set Verilog output pin to 1 bit [Bug]: Cannot set Verilog input/output pins to 1 bit Nov 22, 2024
@Gelthir
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Gelthir commented Nov 22, 2024

Same issue applies to Veriog input pins.

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@Gelthir