From 8876cf6cbe2100f9b9968fff1058410b15845ed6 Mon Sep 17 00:00:00 2001 From: whatisRT Date: Fri, 11 Oct 2024 15:11:56 +0200 Subject: [PATCH] Make `HasOrder` follow the same structure as everything else --- Class/HasOrder.agda | 158 +---------------- Class/HasOrder/Core.agda | 160 ++++++++++++++++++ .../{Instances.agda => Instance.agda} | 4 +- 3 files changed, 164 insertions(+), 158 deletions(-) create mode 100644 Class/HasOrder/Core.agda rename Class/HasOrder/{Instances.agda => Instance.agda} (95%) diff --git a/Class/HasOrder.agda b/Class/HasOrder.agda index 6086fa6..b21efcb 100644 --- a/Class/HasOrder.agda +++ b/Class/HasOrder.agda @@ -2,159 +2,5 @@ module Class.HasOrder where -open import Class.Decidable -open import Data.Empty -open import Data.Product -open import Data.Sum -open import Function -open import Level -open import Relation.Binary -open import Relation.Binary using () renaming (Decidable to Decidable²) -open import Relation.Binary.PropositionalEquality -open import Relation.Nullary - -open Equivalence - -module _ {a} {A : Set a} where - module _ {_≈_ : Rel A a} where - - record HasPreorder : Set (suc a) where - infix 4 _≤_ _<_ _≥_ _>_ - field - _≤_ _<_ : Rel A a - ≤-isPreorder : IsPreorder _≈_ _≤_ - <-irrefl : Irreflexive _≈_ _<_ - ≤⇔<∨≈ : ∀ {x y} → x ≤ y ⇔ (x < y ⊎ x ≈ y) - - _≥_ = flip _≤_ - _>_ = flip _<_ - - open IsPreorder ≤-isPreorder public - using () - renaming (isEquivalence to ≈-isEquivalence; refl to ≤-refl; trans to ≤-trans) - - _≤?_ : ⦃ _≤_ ⁇² ⦄ → Decidable _≤_ - _≤?_ = dec² - - _⊎≈ : ∀ {x y} → x < y → ¬ (y < x ⊎ y ≈ x) - <⇒¬>⊎≈ x⊎≈ x_ + field + _≤_ _<_ : Rel A a + ≤-isPreorder : IsPreorder _≈_ _≤_ + <-irrefl : Irreflexive _≈_ _<_ + ≤⇔<∨≈ : ∀ {x y} → x ≤ y ⇔ (x < y ⊎ x ≈ y) + + _≥_ = flip _≤_ + _>_ = flip _<_ + + open IsPreorder ≤-isPreorder public + using () + renaming (isEquivalence to ≈-isEquivalence; refl to ≤-refl; trans to ≤-trans) + + _≤?_ : ⦃ _≤_ ⁇² ⦄ → Decidable _≤_ + _≤?_ = dec² + + _⊎≈ : ∀ {x y} → x < y → ¬ (y < x ⊎ y ≈ x) + <⇒¬>⊎≈ x⊎≈ x