flattened.v

/* Generated by Yosys 0.25+83 (git sha1 755b753e1, aarch64-apple-darwin20.2-clang 10.0.0-4ubuntu1 -fPIC -Os) */

/* top =  1  */
/* src = "d23_zhiyingm_turing/src/toplevel_chip.v:4.1-18.10" */
module d23_zhiyingm_turing(io_in, io_out);
  wire _0000_;
  wire _0001_;
  wire _0002_;
  wire _0003_;
  wire _0004_;
  wire _0005_;
  wire _0006_;
  wire _0007_;
  wire _0008_;
  wire _0009_;
  wire _0010_;
  wire _0011_;
  wire _0012_;
  wire _0013_;
  wire _0014_;
  wire _0015_;
  wire _0016_;
  wire _0017_;
  wire _0018_;
  wire _0019_;
  wire _0020_;
  wire _0021_;
  wire _0022_;
  wire _0023_;
  wire _0024_;
  wire _0025_;
  wire _0026_;
  wire _0027_;
  wire _0028_;
  wire _0029_;
  wire _0030_;
  wire _0031_;
  wire _0032_;
  wire _0033_;
  wire _0034_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0035_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0036_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0037_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0038_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0039_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0040_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0041_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0042_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0043_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0044_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0045_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0046_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0047_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire _0048_;
  wire _0049_;
  wire _0050_;
  wire _0051_;
  wire _0052_;
  wire _0053_;
  wire _0054_;
  wire _0055_;
  wire _0056_;
  wire _0057_;
  wire _0058_;
  wire _0059_;
  wire _0060_;
  wire _0061_;
  wire _0062_;
  wire _0063_;
  wire _0064_;
  wire _0065_;
  wire _0066_;
  wire _0067_;
  wire _0068_;
  wire _0069_;
  wire _0070_;
  wire _0071_;
  wire _0072_;
  wire _0073_;
  wire _0074_;
  wire _0075_;
  wire _0076_;
  wire _0077_;
  wire _0078_;
  wire _0079_;
  wire _0080_;
  wire _0081_;
  wire _0082_;
  wire _0083_;
  wire _0084_;
  wire _0085_;
  wire _0086_;
  wire _0087_;
  wire _0088_;
  wire _0089_;
  wire _0090_;
  wire _0091_;
  wire _0092_;
  wire _0093_;
  wire _0094_;
  wire _0095_;
  wire _0096_;
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  wire _0098_;
  wire _0099_;
  wire _0100_;
  wire _0101_;
  wire _0102_;
  wire _0103_;
  wire _0104_;
  wire _0105_;
  wire _0106_;
  wire _0107_;
  wire _0108_;
  wire _0109_;
  wire _0110_;
  wire _0111_;
  wire _0112_;
  wire _0113_;
  wire _0114_;
  wire _0115_;
  wire _0116_;
  wire _0117_;
  wire _0118_;
  wire _0119_;
  wire _0120_;
  wire _0121_;
  wire _0122_;
  wire _0123_;
  wire _0124_;
  wire _0125_;
  wire _0126_;
  wire _0127_;
  wire _0128_;
  wire _0129_;
  wire _0130_;
  wire _0131_;
  wire _0132_;
  wire _0133_;
  wire _0134_;
  wire _0135_;
  wire _0136_;
  wire _0137_;
  wire _0138_;
  wire _0139_;
  wire _0140_;
  wire _0141_;
  wire _0142_;
  wire _0143_;
  wire _0144_;
  wire _0145_;
  wire _0146_;
  wire _0147_;
  wire _0148_;
  wire _0149_;
  wire _0150_;
  wire _0151_;
  wire _0152_;
  wire _0153_;
  wire _0154_;
  wire _0155_;
  wire _0156_;
  wire _0157_;
  wire _0158_;
  wire _0159_;
  wire _0160_;
  wire _0161_;
  wire _0162_;
  wire _0163_;
  wire _0164_;
  wire _0165_;
  wire _0166_;
  wire _0167_;
  wire _0168_;
  wire _0169_;
  wire _0170_;
  wire _0171_;
  wire _0172_;
  wire _0173_;
  wire _0174_;
  wire _0175_;
  wire _0176_;
  wire _0177_;
  wire _0178_;
  wire _0179_;
  wire _0180_;
  wire _0181_;
  wire _0182_;
  wire _0183_;
  wire _0184_;
  wire _0185_;
  wire _0186_;
  wire _0187_;
  wire _0188_;
  wire _0189_;
  wire _0190_;
  wire _0191_;
  wire _0192_;
  wire _0193_;
  wire _0194_;
  wire _0195_;
  wire _0196_;
  wire _0197_;
  wire _0198_;
  wire _0199_;
  wire _0200_;
  wire _0201_;
  wire _0202_;
  wire _0203_;
  wire _0204_;
  wire _0205_;
  wire _0206_;
  wire _0207_;
  wire _0208_;
  wire _0209_;
  wire _0210_;
  wire _0211_;
  wire _0212_;
  wire _0213_;
  wire _0214_;
  wire _0215_;
  wire _0216_;
  wire _0217_;
  wire _0218_;
  wire _0219_;
  wire _0220_;
  wire _0221_;
  wire _0222_;
  wire _0223_;
  wire _0224_;
  wire _0225_;
  wire _0226_;
  wire _0227_;
  wire _0228_;
  wire _0229_;
  wire _0230_;
  wire _0231_;
  wire _0232_;
  wire _0233_;
  wire _0234_;
  wire _0235_;
  wire _0236_;
  wire _0237_;
  wire _0238_;
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  wire _0240_;
  wire _0241_;
  wire _0242_;
  wire _0243_;
  wire _0244_;
  wire _0245_;
  wire _0246_;
  wire _0247_;
  wire _0248_;
  wire _0249_;
  wire _0250_;
  wire _0251_;
  wire _0252_;
  wire _0253_;
  wire _0254_;
  wire _0255_;
  wire _0256_;
  wire _0257_;
  wire _0258_;
  wire _0259_;
  wire _0260_;
  wire _0261_;
  wire _0262_;
  wire _0263_;
  wire _0264_;
  wire _0265_;
  wire _0266_;
  wire _0267_;
  wire _0268_;
  wire _0269_;
  wire _0270_;
  wire _0271_;
  wire _0272_;
  wire _0273_;
  wire _0274_;
  wire _0275_;
  wire _0276_;
  wire _0277_;
  wire _0278_;
  wire _0279_;
  wire _0280_;
  wire _0281_;
  wire _0282_;
  wire _0283_;
  wire _0284_;
  wire _0285_;
  wire _0286_;
  wire _0287_;
  wire _0288_;
  wire _0289_;
  wire _0290_;
  wire _0291_;
  wire _0292_;
  wire _0293_;
  wire _0294_;
  wire _0295_;
  wire _0296_;
  wire _0297_;
  wire _0298_;
  wire _0299_;
  wire _0300_;
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  wire _0302_;
  wire _0303_;
  wire _0304_;
  wire _0305_;
  wire _0306_;
  wire _0307_;
  wire _0308_;
  wire _0309_;
  wire _0310_;
  wire _0311_;
  wire _0312_;
  wire _0313_;
  wire _0314_;
  wire _0315_;
  wire _0316_;
  wire _0317_;
  wire _0318_;
  wire _0319_;
  wire _0320_;
  wire _0321_;
  wire _0322_;
  wire _0323_;
  wire _0324_;
  wire _0325_;
  wire _0326_;
  wire _0327_;
  wire _0328_;
  wire _0329_;
  wire _0330_;
  wire _0331_;
  wire _0332_;
  wire _0333_;
  wire _0334_;
  wire _0335_;
  wire _0336_;
  wire _0337_;
  wire _0338_;
  wire _0339_;
  wire _0340_;
  wire _0341_;
  wire _0342_;
  wire _0343_;
  wire _0344_;
  wire _0345_;
  wire _0346_;
  wire _0347_;
  wire _0348_;
  wire _0349_;
  wire _0350_;
  wire _0351_;
  wire _0352_;
  wire _0353_;
  wire _0354_;
  wire _0355_;
  wire _0356_;
  wire _0357_;
  wire _0358_;
  wire _0359_;
  wire _0360_;
  wire _0361_;
  wire _0362_;
  wire _0363_;
  wire _0364_;
  wire _0365_;
  wire _0366_;
  wire _0367_;
  wire _0368_;
  wire _0369_;
  wire _0370_;
  wire _0371_;
  wire _0372_;
  wire _0373_;
  wire _0374_;
  wire _0375_;
  wire _0376_;
  wire _0377_;
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  wire _0380_;
  wire _0381_;
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  wire _0383_;
  wire _0384_;
  wire _0385_;
  wire _0386_;
  wire _0387_;
  wire _0388_;
  wire _0389_;
  wire _0390_;
  wire _0391_;
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  wire _0393_;
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  wire _0399_;
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  wire _0403_;
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  wire _0451_;
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  wire _0453_;
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  wire _0468_;
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  wire _0813_;
  wire _0814_;
  wire _0815_;
  wire _0816_;
  wire _0817_;
  wire _0818_;
  wire _0819_;
  wire _0820_;
  wire _0821_;
  wire _0822_;
  wire _0823_;
  wire _0824_;
  wire _0825_;
  wire _0826_;
  wire _0827_;
  wire _0828_;
  wire _0829_;
  wire _0830_;
  wire _0831_;
  wire _0832_;
  wire _0833_;
  wire _0834_;
  wire _0835_;
  wire _0836_;
  wire _0837_;
  wire _0838_;
  wire _0839_;
  wire _0840_;
  wire _0841_;
  wire _0842_;
  wire _0843_;
  wire _0844_;
  wire _0845_;
  wire _0846_;
  wire _0847_;
  wire _0848_;
  wire _0849_;
  wire _0850_;
  wire _0851_;
  wire _0852_;
  wire _0853_;
  wire _0854_;
  wire _0855_;
  wire _0856_;
  wire _0857_;
  wire _0858_;
  wire _0859_;
  wire _0860_;
  wire _0861_;
  wire _0862_;
  wire _0863_;
  wire _0864_;
  wire _0865_;
  wire _0866_;
  wire _0867_;
  wire _0868_;
  wire _0869_;
  wire _0870_;
  wire _0871_;
  wire _0872_;
  wire _0873_;
  wire _0874_;
  wire _0875_;
  wire _0876_;
  wire _0877_;
  wire _0878_;
  wire _0879_;
  wire _0880_;
  wire _0881_;
  wire _0882_;
  wire _0883_;
  wire _0884_;
  wire _0885_;
  wire _0886_;
  wire _0887_;
  wire _0888_;
  wire _0889_;
  wire _0890_;
  wire _0891_;
  wire _0892_;
  wire _0893_;
  wire _0894_;
  wire _0895_;
  wire _0896_;
  wire _0897_;
  wire _0898_;
  wire _0899_;
  wire _0900_;
  wire _0901_;
  wire _0902_;
  wire _0903_;
  wire _0904_;
  wire _0905_;
  wire _0906_;
  wire _0907_;
  wire _0908_;
  wire _0909_;
  wire _0910_;
  wire _0911_;
  wire _0912_;
  wire _0913_;
  wire _0914_;
  wire _0915_;
  wire _0916_;
  wire _0917_;
  wire _0918_;
  wire _0919_;
  wire _0920_;
  wire _0921_;
  wire _0922_;
  wire _0923_;
  wire _0924_;
  wire _0925_;
  wire _0926_;
  wire _0927_;
  wire _0928_;
  wire _0929_;
  wire _0930_;
  wire _0931_;
  wire _0932_;
  wire _0933_;
  wire _0934_;
  wire _0935_;
  wire _0936_;
  wire _0937_;
  wire _0938_;
  wire _0939_;
  wire _0940_;
  wire _0941_;
  wire _0942_;
  wire _0943_;
  wire _0944_;
  wire _0945_;
  wire _0946_;
  wire _0947_;
  wire _0948_;
  wire _0949_;
  wire _0950_;
  wire _0951_;
  wire _0952_;
  wire _0953_;
  wire _0954_;
  wire _0955_;
  wire _0956_;
  wire _0957_;
  wire _0958_;
  wire _0959_;
  wire _0960_;
  wire _0961_;
  wire _0962_;
  wire _0963_;
  wire _0964_;
  wire _0965_;
  wire _0966_;
  wire _0967_;
  wire _0968_;
  wire _0969_;
  wire _0970_;
  wire _0971_;
  wire _0972_;
  wire _0973_;
  wire _0974_;
  wire _0975_;
  wire _0976_;
  wire _0977_;
  wire _0978_;
  wire _0979_;
  wire _0980_;
  wire _0981_;
  wire _0982_;
  wire _0983_;
  wire _0984_;
  wire _0985_;
  wire _0986_;
  wire _0987_;
  wire _0988_;
  wire _0989_;
  wire _0990_;
  wire _0991_;
  wire _0992_;
  wire _0993_;
  wire _0994_;
  wire _0995_;
  wire _0996_;
  wire _0997_;
  wire _0998_;
  wire _0999_;
  wire _1000_;
  wire _1001_;
  wire _1002_;
  wire _1003_;
  wire _1004_;
  wire _1005_;
  wire _1006_;
  wire _1007_;
  wire _1008_;
  wire _1009_;
  wire _1010_;
  wire _1011_;
  wire _1012_;
  wire _1013_;
  wire _1014_;
  wire _1015_;
  wire _1016_;
  wire _1017_;
  wire _1018_;
  wire _1019_;
  wire _1020_;
  wire _1021_;
  wire _1022_;
  wire _1023_;
  wire _1024_;
  wire _1025_;
  wire _1026_;
  wire _1027_;
  wire _1028_;
  wire _1029_;
  wire _1030_;
  wire _1031_;
  wire _1032_;
  wire _1033_;
  wire _1034_;
  wire _1035_;
  wire _1036_;
  wire _1037_;
  wire _1038_;
  wire _1039_;
  wire _1040_;
  wire _1041_;
  wire _1042_;
  wire _1043_;
  wire _1044_;
  wire _1045_;
  wire _1046_;
  wire _1047_;
  wire _1048_;
  wire _1049_;
  wire _1050_;
  wire _1051_;
  wire _1052_;
  wire _1053_;
  wire _1054_;
  wire _1055_;
  wire _1056_;
  wire _1057_;
  wire _1058_;
  wire _1059_;
  wire _1060_;
  wire _1061_;
  wire _1062_;
  wire _1063_;
  wire _1064_;
  wire _1065_;
  wire _1066_;
  wire _1067_;
  wire _1068_;
  wire _1069_;
  wire _1070_;
  wire _1071_;
  wire _1072_;
  wire _1073_;
  wire _1074_;
  wire _1075_;
  wire _1076_;
  wire _1077_;
  wire _1078_;
  wire _1079_;
  wire _1080_;
  wire _1081_;
  wire _1082_;
  wire _1083_;
  wire _1084_;
  wire _1085_;
  wire _1086_;
  wire _1087_;
  wire _1088_;
  wire _1089_;
  wire _1090_;
  wire _1091_;
  wire _1092_;
  wire _1093_;
  wire _1094_;
  wire _1095_;
  wire _1096_;
  wire _1097_;
  wire _1098_;
  wire _1099_;
  wire _1100_;
  wire _1101_;
  wire _1102_;
  wire _1103_;
  wire _1104_;
  wire _1105_;
  wire _1106_;
  wire _1107_;
  wire _1108_;
  wire _1109_;
  wire _1110_;
  wire _1111_;
  wire _1112_;
  wire _1113_;
  wire _1114_;
  wire _1115_;
  wire _1116_;
  wire _1117_;
  wire _1118_;
  wire _1119_;
  wire _1120_;
  wire _1121_;
  wire _1122_;
  wire _1123_;
  wire _1124_;
  wire _1125_;
  wire _1126_;
  wire _1127_;
  wire _1128_;
  wire _1129_;
  wire _1130_;
  wire _1131_;
  wire _1132_;
  wire _1133_;
  wire _1134_;
  wire _1135_;
  wire _1136_;
  wire _1137_;
  wire _1138_;
  wire _1139_;
  wire _1140_;
  wire _1141_;
  wire _1142_;
  wire _1143_;
  wire _1144_;
  wire _1145_;
  wire _1146_;
  wire _1147_;
  wire _1148_;
  wire _1149_;
  wire _1150_;
  wire _1151_;
  wire _1152_;
  wire _1153_;
  wire _1154_;
  wire _1155_;
  wire _1156_;
  wire _1157_;
  wire _1158_;
  wire _1159_;
  wire _1160_;
  wire _1161_;
  wire _1162_;
  wire _1163_;
  wire _1164_;
  wire _1165_;
  wire _1166_;
  wire _1167_;
  wire _1168_;
  wire _1169_;
  wire _1170_;
  wire _1171_;
  wire _1172_;
  wire _1173_;
  wire _1174_;
  wire _1175_;
  wire _1176_;
  wire _1177_;
  wire _1178_;
  wire _1179_;
  wire _1180_;
  wire _1181_;
  wire _1182_;
  wire _1183_;
  wire _1184_;
  wire _1185_;
  wire _1186_;
  wire _1187_;
  wire _1188_;
  wire _1189_;
  wire _1190_;
  wire _1191_;
  wire _1192_;
  wire _1193_;
  wire _1194_;
  wire _1195_;
  wire _1196_;
  wire _1197_;
  wire _1198_;
  wire _1199_;
  wire _1200_;
  wire _1201_;
  wire _1202_;
  wire _1203_;
  wire _1204_;
  wire _1205_;
  wire _1206_;
  wire _1207_;
  wire _1208_;
  wire _1209_;
  wire _1210_;
  wire _1211_;
  wire _1212_;
  wire _1213_;
  wire _1214_;
  wire _1215_;
  wire _1216_;
  wire _1217_;
  wire _1218_;
  wire _1219_;
  wire _1220_;
  wire _1221_;
  wire _1222_;
  wire _1223_;
  wire _1224_;
  wire _1225_;
  wire _1226_;
  wire _1227_;
  wire _1228_;
  wire _1229_;
  wire _1230_;
  wire _1231_;
  wire _1232_;
  wire _1233_;
  wire _1234_;
  wire _1235_;
  wire _1236_;
  wire _1237_;
  wire _1238_;
  wire _1239_;
  wire _1240_;
  wire _1241_;
  wire _1242_;
  wire _1243_;
  wire _1244_;
  wire _1245_;
  wire _1246_;
  wire _1247_;
  wire _1248_;
  wire _1249_;
  wire _1250_;
  wire _1251_;
  wire _1252_;
  wire _1253_;
  wire _1254_;
  wire _1255_;
  wire _1256_;
  wire _1257_;
  wire _1258_;
  wire _1259_;
  wire _1260_;
  wire _1261_;
  wire _1262_;
  wire _1263_;
  wire _1264_;
  wire _1265_;
  wire _1266_;
  wire _1267_;
  wire _1268_;
  wire _1269_;
  wire _1270_;
  wire _1271_;
  wire _1272_;
  wire _1273_;
  wire _1274_;
  wire _1275_;
  wire _1276_;
  wire _1277_;
  wire _1278_;
  wire _1279_;
  wire _1280_;
  wire _1281_;
  wire _1282_;
  wire _1283_;
  wire _1284_;
  wire _1285_;
  wire _1286_;
  wire _1287_;
  wire _1288_;
  wire _1289_;
  wire _1290_;
  wire _1291_;
  wire _1292_;
  wire _1293_;
  wire _1294_;
  wire _1295_;
  wire _1296_;
  wire _1297_;
  wire _1298_;
  wire _1299_;
  wire _1300_;
  wire _1301_;
  wire _1302_;
  wire _1303_;
  wire _1304_;
  wire _1305_;
  wire _1306_;
  wire _1307_;
  wire _1308_;
  wire _1309_;
  wire _1310_;
  wire _1311_;
  wire _1312_;
  wire _1313_;
  wire _1314_;
  wire _1315_;
  wire _1316_;
  wire _1317_;
  wire _1318_;
  wire _1319_;
  wire _1320_;
  wire _1321_;
  wire _1322_;
  wire _1323_;
  wire _1324_;
  wire _1325_;
  wire _1326_;
  wire _1327_;
  wire _1328_;
  wire _1329_;
  wire _1330_;
  wire _1331_;
  wire _1332_;
  wire _1333_;
  wire _1334_;
  wire _1335_;
  wire _1336_;
  wire _1337_;
  wire _1338_;
  wire _1339_;
  wire _1340_;
  wire _1341_;
  wire _1342_;
  wire _1343_;
  wire _1344_;
  wire _1345_;
  wire _1346_;
  wire _1347_;
  wire _1348_;
  wire _1349_;
  wire _1350_;
  wire _1351_;
  wire _1352_;
  wire _1353_;
  wire _1354_;
  wire _1355_;
  wire _1356_;
  wire _1357_;
  wire _1358_;
  wire _1359_;
  wire _1360_;
  wire _1361_;
  wire _1362_;
  wire _1363_;
  wire _1364_;
  wire _1365_;
  wire _1366_;
  wire _1367_;
  wire _1368_;
  wire _1369_;
  wire _1370_;
  wire _1371_;
  wire _1372_;
  wire _1373_;
  wire _1374_;
  wire _1375_;
  wire _1376_;
  wire _1377_;
  wire _1378_;
  wire _1379_;
  wire _1380_;
  wire _1381_;
  wire _1382_;
  wire _1383_;
  wire _1384_;
  wire _1385_;
  wire _1386_;
  wire _1387_;
  wire _1388_;
  wire _1389_;
  wire _1390_;
  wire _1391_;
  wire _1392_;
  wire _1393_;
  wire _1394_;
  wire _1395_;
  wire _1396_;
  wire _1397_;
  wire _1398_;
  wire _1399_;
  wire _1400_;
  wire _1401_;
  wire _1402_;
  wire _1403_;
  wire _1404_;
  wire _1405_;
  wire _1406_;
  wire _1407_;
  wire _1408_;
  wire _1409_;
  wire _1410_;
  wire _1411_;
  wire _1412_;
  wire _1413_;
  wire _1414_;
  wire _1415_;
  /* force_downto = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:32.23-32.44|d23_zhiyingm_turing/src/chip.sv:21.29-22.86|/Users/anish/workspace/oss-cad-suite/libexec/../share/yosys/techmap.v:270.26-270.27" */
  wire [6:0] _1416_;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:5.18-5.23" */
  input [13:0] io_in;
  wire [13:0] io_in;
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:6.19-6.25" */
  output [13:0] io_out;
  wire [13:0] io_out;
  /* hdlname = "mchip Done" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:10.17-10.21" */
  wire \mchip.Done ;
  /* hdlname = "mchip Next" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:10.11-10.15" */
  wire \mchip.Next ;
  /* hdlname = "mchip clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:6.17-6.22" */
  wire \mchip.clock ;
  /* hdlname = "mchip dut Compute_done" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:10.17-10.29|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Compute_done ;
  /* hdlname = "mchip dut DataReg_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:14.34-14.44|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.DataReg_en ;
  /* hdlname = "mchip dut Done" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:8.36-8.40|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Done ;
  /* hdlname = "mchip dut Halt" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:18.18-18.22|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Halt ;
  /* hdlname = "mchip dut Init" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:13.9-13.13|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Init ;
  /* hdlname = "mchip dut InputAddr_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:13.29-13.41|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.InputAddr_en ;
  /* hdlname = "mchip dut Left" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:18.24-18.28|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Left ;
  /* hdlname = "mchip dut Next" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:8.30-8.34|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Next ;
  /* hdlname = "mchip dut NextState_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:13.15-13.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.NextState_en ;
  /* hdlname = "mchip dut Read_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:13.107-13.114|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Read_en ;
  /* hdlname = "mchip dut StateAddr_ld" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:13.43-13.55|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.StateAddr_ld ;
  /* hdlname = "mchip dut TapeReg_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:14.22-14.32|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.TapeReg_en ;
  /* hdlname = "mchip dut Tape_start" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:18.30-18.40|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.Tape_start ;
  /* hdlname = "mchip dut clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:8.16-8.21|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.clock ;
  /* hdlname = "mchip dut data_reg Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:61.17-61.100|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg \mchip.dut.data_reg.Q ;
  /* hdlname = "mchip dut data_reg clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:61.17-61.100|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.data_reg.clear ;
  /* hdlname = "mchip dut data_reg clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:61.17-61.100|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.data_reg.clock ;
  /* hdlname = "mchip dut data_reg en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:61.17-61.100|d23_zhiyingm_turing/src/library.sv:67.17-67.19|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.data_reg.en ;
  /* hdlname = "mchip dut data_reg_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.87-25.99|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.data_reg_out ;
  /* hdlname = "mchip dut demux I" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:50.19-50.127|d23_zhiyingm_turing/src/library.sv:5.25-5.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.demux.I ;
  /* hdlname = "mchip dut demux Y0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:50.19-50.127|d23_zhiyingm_turing/src/library.sv:7.25-7.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.demux.Y0 ;
  /* hdlname = "mchip dut demux Y1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:50.19-50.127|d23_zhiyingm_turing/src/library.sv:7.29-7.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.demux.Y1 ;
  /* hdlname = "mchip dut demux Y2" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:50.19-50.127|d23_zhiyingm_turing/src/library.sv:7.33-7.35|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.demux.Y2 ;
  /* hdlname = "mchip dut demux Y3" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:50.19-50.127|d23_zhiyingm_turing/src/library.sv:7.37-7.39|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.demux.Y3 ;
  /* hdlname = "mchip dut direction_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:24.15-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [1:0] \mchip.dut.direction_in ;
  /* hdlname = "mchip dut direction_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:24.29-24.42|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [1:0] \mchip.dut.direction_out ;
  /* hdlname = "mchip dut direction_reg D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.direction_reg.D ;
  /* hdlname = "mchip dut direction_reg Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.direction_reg.Q ;
  /* hdlname = "mchip dut direction_reg clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.direction_reg.clear ;
  /* hdlname = "mchip dut direction_reg clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.direction_reg.clock ;
  /* hdlname = "mchip dut display_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:9.24-9.35|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [10:0] \mchip.dut.display_out ;
  /* hdlname = "mchip dut display_reg Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:121.25-121.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg [10:0] \mchip.dut.display_reg.Q ;
  /* hdlname = "mchip dut display_reg clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:120.21-120.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.display_reg.clear ;
  /* hdlname = "mchip dut display_reg clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:120.51-120.56|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.display_reg.clock ;
  /* hdlname = "mchip dut fsm DataReg_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:80.41-80.51|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.DataReg_en ;
  /* hdlname = "mchip dut fsm Done" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:77.35-77.39|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Done ;
  /* hdlname = "mchip dut fsm Halt" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:78.24-78.28|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Halt ;
  /* hdlname = "mchip dut fsm Init" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:79.16-79.20|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Init ;
  /* hdlname = "mchip dut fsm InputAddr_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:79.36-79.48|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.InputAddr_en ;
  /* hdlname = "mchip dut fsm Left" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:78.30-78.34|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Left ;
  /* hdlname = "mchip dut fsm Next" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:77.29-77.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Next ;
  /* hdlname = "mchip dut fsm NextState_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:79.22-79.34|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.NextState_en ;
  /* hdlname = "mchip dut fsm Read_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:79.114-79.121|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Read_en ;
  /* hdlname = "mchip dut fsm StateAddr_ld" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:79.50-79.62|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.StateAddr_ld ;
  /* hdlname = "mchip dut fsm TapeReg_en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:80.29-80.39|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.TapeReg_en ;
  /* hdlname = "mchip dut fsm Tape_start" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:78.36-78.46|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.Tape_start ;
  /* hdlname = "mchip dut fsm clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:77.15-77.20|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.clock ;
  /* onehot = 32'd1 */
  wire [14:0] \mchip.dut.fsm.currState ;
  /* hdlname = "mchip dut fsm reset" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:71.7-71.15|d23_zhiyingm_turing/src/TuringMachine.sv:77.22-77.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.fsm.reset ;
  /* hdlname = "mchip dut input_addr Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:87.25-87.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg [6:0] \mchip.dut.input_addr.Q ;
  /* hdlname = "mchip dut input_addr clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:85.21-85.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.input_addr.clear ;
  /* hdlname = "mchip dut input_addr clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:85.38-85.43|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.input_addr.clock ;
  /* hdlname = "mchip dut input_addr en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:85.17-85.19|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.input_addr.en ;
  /* hdlname = "mchip dut input_addr load" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:85.28-85.32|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.input_addr.load ;
  /* hdlname = "mchip dut input_addr up" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:85.34-85.36|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.input_addr.up ;
  /* hdlname = "mchip dut input_addr_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.18-21.32|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.input_addr_out ;
  /* hdlname = "mchip dut input_data" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:7.25-7.35|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.input_data ;
  reg [4:0] \mchip.dut.memory.M[0] ;
  reg [4:0] \mchip.dut.memory.M[100] ;
  reg [4:0] \mchip.dut.memory.M[101] ;
  reg [4:0] \mchip.dut.memory.M[102] ;
  reg [4:0] \mchip.dut.memory.M[103] ;
  reg [4:0] \mchip.dut.memory.M[104] ;
  reg [4:0] \mchip.dut.memory.M[105] ;
  reg [4:0] \mchip.dut.memory.M[106] ;
  reg [4:0] \mchip.dut.memory.M[107] ;
  reg [4:0] \mchip.dut.memory.M[108] ;
  reg [4:0] \mchip.dut.memory.M[109] ;
  reg [4:0] \mchip.dut.memory.M[10] ;
  reg [4:0] \mchip.dut.memory.M[110] ;
  reg [4:0] \mchip.dut.memory.M[111] ;
  reg [4:0] \mchip.dut.memory.M[112] ;
  reg [4:0] \mchip.dut.memory.M[113] ;
  reg [4:0] \mchip.dut.memory.M[114] ;
  reg [4:0] \mchip.dut.memory.M[115] ;
  reg [4:0] \mchip.dut.memory.M[116] ;
  reg [4:0] \mchip.dut.memory.M[117] ;
  reg [4:0] \mchip.dut.memory.M[118] ;
  reg [4:0] \mchip.dut.memory.M[119] ;
  reg [4:0] \mchip.dut.memory.M[11] ;
  reg [4:0] \mchip.dut.memory.M[120] ;
  reg [4:0] \mchip.dut.memory.M[121] ;
  reg [4:0] \mchip.dut.memory.M[122] ;
  reg [4:0] \mchip.dut.memory.M[123] ;
  reg [4:0] \mchip.dut.memory.M[124] ;
  reg [4:0] \mchip.dut.memory.M[125] ;
  reg [4:0] \mchip.dut.memory.M[126] ;
  reg [4:0] \mchip.dut.memory.M[127] ;
  reg [4:0] \mchip.dut.memory.M[12] ;
  reg [4:0] \mchip.dut.memory.M[13] ;
  reg [4:0] \mchip.dut.memory.M[14] ;
  reg [4:0] \mchip.dut.memory.M[15] ;
  reg [4:0] \mchip.dut.memory.M[16] ;
  reg [4:0] \mchip.dut.memory.M[17] ;
  reg [4:0] \mchip.dut.memory.M[18] ;
  reg [4:0] \mchip.dut.memory.M[19] ;
  reg [4:0] \mchip.dut.memory.M[1] ;
  reg [4:0] \mchip.dut.memory.M[20] ;
  reg [4:0] \mchip.dut.memory.M[21] ;
  reg [4:0] \mchip.dut.memory.M[22] ;
  reg [4:0] \mchip.dut.memory.M[23] ;
  reg [4:0] \mchip.dut.memory.M[24] ;
  reg [4:0] \mchip.dut.memory.M[25] ;
  reg [4:0] \mchip.dut.memory.M[26] ;
  reg [4:0] \mchip.dut.memory.M[27] ;
  reg [4:0] \mchip.dut.memory.M[28] ;
  reg [4:0] \mchip.dut.memory.M[29] ;
  reg [4:0] \mchip.dut.memory.M[2] ;
  reg [4:0] \mchip.dut.memory.M[30] ;
  reg [4:0] \mchip.dut.memory.M[31] ;
  reg [4:0] \mchip.dut.memory.M[32] ;
  reg [4:0] \mchip.dut.memory.M[33] ;
  reg [4:0] \mchip.dut.memory.M[34] ;
  reg [4:0] \mchip.dut.memory.M[35] ;
  reg [4:0] \mchip.dut.memory.M[36] ;
  reg [4:0] \mchip.dut.memory.M[37] ;
  reg [4:0] \mchip.dut.memory.M[38] ;
  reg [4:0] \mchip.dut.memory.M[39] ;
  reg [4:0] \mchip.dut.memory.M[3] ;
  reg [4:0] \mchip.dut.memory.M[40] ;
  reg [4:0] \mchip.dut.memory.M[41] ;
  reg [4:0] \mchip.dut.memory.M[42] ;
  reg [4:0] \mchip.dut.memory.M[43] ;
  reg [4:0] \mchip.dut.memory.M[44] ;
  reg [4:0] \mchip.dut.memory.M[45] ;
  reg [4:0] \mchip.dut.memory.M[46] ;
  reg [4:0] \mchip.dut.memory.M[47] ;
  reg [4:0] \mchip.dut.memory.M[48] ;
  reg [4:0] \mchip.dut.memory.M[49] ;
  reg [4:0] \mchip.dut.memory.M[4] ;
  reg [4:0] \mchip.dut.memory.M[50] ;
  reg [4:0] \mchip.dut.memory.M[51] ;
  reg [4:0] \mchip.dut.memory.M[52] ;
  reg [4:0] \mchip.dut.memory.M[53] ;
  reg [4:0] \mchip.dut.memory.M[54] ;
  reg [4:0] \mchip.dut.memory.M[55] ;
  reg [4:0] \mchip.dut.memory.M[56] ;
  reg [4:0] \mchip.dut.memory.M[57] ;
  reg [4:0] \mchip.dut.memory.M[58] ;
  reg [4:0] \mchip.dut.memory.M[59] ;
  reg [4:0] \mchip.dut.memory.M[5] ;
  reg [4:0] \mchip.dut.memory.M[60] ;
  reg [4:0] \mchip.dut.memory.M[61] ;
  reg [4:0] \mchip.dut.memory.M[62] ;
  reg [4:0] \mchip.dut.memory.M[63] ;
  reg [4:0] \mchip.dut.memory.M[64] ;
  reg [4:0] \mchip.dut.memory.M[65] ;
  reg [4:0] \mchip.dut.memory.M[66] ;
  reg [4:0] \mchip.dut.memory.M[67] ;
  reg [4:0] \mchip.dut.memory.M[68] ;
  reg [4:0] \mchip.dut.memory.M[69] ;
  reg [4:0] \mchip.dut.memory.M[6] ;
  reg [4:0] \mchip.dut.memory.M[70] ;
  reg [4:0] \mchip.dut.memory.M[71] ;
  reg [4:0] \mchip.dut.memory.M[72] ;
  reg [4:0] \mchip.dut.memory.M[73] ;
  reg [4:0] \mchip.dut.memory.M[74] ;
  reg [4:0] \mchip.dut.memory.M[75] ;
  reg [4:0] \mchip.dut.memory.M[76] ;
  reg [4:0] \mchip.dut.memory.M[77] ;
  reg [4:0] \mchip.dut.memory.M[78] ;
  reg [4:0] \mchip.dut.memory.M[79] ;
  reg [4:0] \mchip.dut.memory.M[7] ;
  reg [4:0] \mchip.dut.memory.M[80] ;
  reg [4:0] \mchip.dut.memory.M[81] ;
  reg [4:0] \mchip.dut.memory.M[82] ;
  reg [4:0] \mchip.dut.memory.M[83] ;
  reg [4:0] \mchip.dut.memory.M[84] ;
  reg [4:0] \mchip.dut.memory.M[85] ;
  reg [4:0] \mchip.dut.memory.M[86] ;
  reg [4:0] \mchip.dut.memory.M[87] ;
  reg [4:0] \mchip.dut.memory.M[88] ;
  reg [4:0] \mchip.dut.memory.M[89] ;
  reg [4:0] \mchip.dut.memory.M[8] ;
  reg [4:0] \mchip.dut.memory.M[90] ;
  reg [4:0] \mchip.dut.memory.M[91] ;
  reg [4:0] \mchip.dut.memory.M[92] ;
  reg [4:0] \mchip.dut.memory.M[93] ;
  reg [4:0] \mchip.dut.memory.M[94] ;
  reg [4:0] \mchip.dut.memory.M[95] ;
  reg [4:0] \mchip.dut.memory.M[96] ;
  reg [4:0] \mchip.dut.memory.M[97] ;
  reg [4:0] \mchip.dut.memory.M[98] ;
  reg [4:0] \mchip.dut.memory.M[99] ;
  reg [4:0] \mchip.dut.memory.M[9] ;
  /* hdlname = "mchip dut memory clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:48.29-48.137|d23_zhiyingm_turing/src/library.sv:141.24-141.29|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.memory.clock ;
  /* hdlname = "mchip dut memory data_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:48.29-48.137|d23_zhiyingm_turing/src/library.sv:143.25-143.32|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.memory.data_in ;
  /* hdlname = "mchip dut memory data_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:48.29-48.137|d23_zhiyingm_turing/src/library.sv:144.26-144.34|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.memory.data_out ;
  /* hdlname = "mchip dut memory re" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:48.29-48.137|d23_zhiyingm_turing/src/library.sv:141.16-141.18|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.memory.re ;
  /* hdlname = "mchip dut mux_display I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:58.17-58.94|d23_zhiyingm_turing/src/library.sv:24.25-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_display.I0 ;
  /* hdlname = "mchip dut mux_display I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:58.17-58.94|d23_zhiyingm_turing/src/library.sv:24.29-24.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_display.I1 ;
  /* hdlname = "mchip dut mux_display S" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:58.17-58.94|d23_zhiyingm_turing/src/library.sv:25.17-25.18|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_display.S ;
  /* hdlname = "mchip dut mux_display Y" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:58.17-58.94|d23_zhiyingm_turing/src/library.sv:26.25-26.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_display.Y ;
  /* hdlname = "mchip dut mux_input_calculate I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:28.17-28.104|d23_zhiyingm_turing/src/library.sv:24.25-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.mux_input_calculate.I0 ;
  /* hdlname = "mchip dut mux_input_calculate I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:28.17-28.104|d23_zhiyingm_turing/src/library.sv:24.29-24.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.mux_input_calculate.I1 ;
  /* hdlname = "mchip dut mux_input_calculate Y" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:28.17-28.104|d23_zhiyingm_turing/src/library.sv:26.25-26.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.mux_input_calculate.Y ;
  /* hdlname = "mchip dut mux_next_state I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:38.17-38.94|d23_zhiyingm_turing/src/library.sv:24.25-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_next_state.I0 ;
  /* hdlname = "mchip dut mux_next_state I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:38.17-38.94|d23_zhiyingm_turing/src/library.sv:24.29-24.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_next_state.I1 ;
  /* hdlname = "mchip dut mux_next_state S" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:38.17-38.94|d23_zhiyingm_turing/src/library.sv:25.17-25.18|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_next_state.S ;
  /* hdlname = "mchip dut mux_next_state Y" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:38.17-38.94|d23_zhiyingm_turing/src/library.sv:26.25-26.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_next_state.Y ;
  /* hdlname = "mchip dut mux_prev_tape I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:55.16-55.110|d23_zhiyingm_turing/src/library.sv:24.25-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_prev_tape.I0 ;
  /* hdlname = "mchip dut mux_prev_tape I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:55.16-55.110|d23_zhiyingm_turing/src/library.sv:24.29-24.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_prev_tape.I1 ;
  /* hdlname = "mchip dut mux_prev_tape Y" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:55.16-55.110|d23_zhiyingm_turing/src/library.sv:26.25-26.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_prev_tape.Y ;
  /* hdlname = "mchip dut mux_state_tape_addr I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:47.17-47.151|d23_zhiyingm_turing/src/library.sv:35.25-35.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_state_tape_addr.I0 ;
  /* hdlname = "mchip dut mux_state_tape_addr I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:47.17-47.151|d23_zhiyingm_turing/src/library.sv:35.29-35.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_state_tape_addr.I1 ;
  /* hdlname = "mchip dut mux_state_tape_addr I3" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:47.17-47.151|d23_zhiyingm_turing/src/library.sv:35.37-35.39|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.mux_state_tape_addr.I3 ;
  /* hdlname = "mchip dut mux_tape_reg I0" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:52.16-52.91|d23_zhiyingm_turing/src/library.sv:24.25-24.27|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_tape_reg.I0 ;
  /* hdlname = "mchip dut mux_tape_reg I1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:52.16-52.91|d23_zhiyingm_turing/src/library.sv:24.29-24.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_tape_reg.I1 ;
  /* hdlname = "mchip dut mux_tape_reg S" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:52.16-52.91|d23_zhiyingm_turing/src/library.sv:25.17-25.18|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_tape_reg.S ;
  /* hdlname = "mchip dut mux_tape_reg Y" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:52.16-52.91|d23_zhiyingm_turing/src/library.sv:26.25-26.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.mux_tape_reg.Y ;
  /* hdlname = "mchip dut next_state D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.next_state.D ;
  /* hdlname = "mchip dut next_state Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.next_state.Q ;
  /* hdlname = "mchip dut next_state clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.next_state.clear ;
  /* hdlname = "mchip dut next_state clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.next_state.clock ;
  /* hdlname = "mchip dut next_state en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:67.17-67.19|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.next_state.en ;
  /* hdlname = "mchip dut next_state_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.64-21.77|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.next_state_in ;
  /* hdlname = "mchip dut next_state_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.79-21.93|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.next_state_out ;
  /* hdlname = "mchip dut next_state_prep" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.47-21.62|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.next_state_prep ;
  /* hdlname = "mchip dut prev_tape_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.45-25.57|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_in ;
  /* hdlname = "mchip dut prev_tape_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.59-25.72|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_out ;
  /* hdlname = "mchip dut prev_tape_reg D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:56.17-56.108|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_reg.D ;
  /* hdlname = "mchip dut prev_tape_reg Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:56.17-56.108|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_reg.Q ;
  /* hdlname = "mchip dut prev_tape_reg clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:56.17-56.108|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_reg.clear ;
  /* hdlname = "mchip dut prev_tape_reg clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:56.17-56.108|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.prev_tape_reg.clock ;
  /* hdlname = "mchip dut read_data" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:23.30-23.39|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.read_data ;
  /* hdlname = "mchip dut reset" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:8.23-8.28|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.reset ;
  /* hdlname = "mchip dut state_addr D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:86.25-86.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.state_addr.D ;
  /* hdlname = "mchip dut state_addr Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:87.25-87.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg [6:0] \mchip.dut.state_addr.Q ;
  /* hdlname = "mchip dut state_addr clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:85.21-85.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.state_addr.clear ;
  /* hdlname = "mchip dut state_addr clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:85.38-85.43|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.state_addr.clock ;
  /* hdlname = "mchip dut state_addr load" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:85.28-85.32|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.state_addr.load ;
  /* hdlname = "mchip dut state_addr up" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:85.34-85.36|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.state_addr.up ;
  /* hdlname = "mchip dut state_addr_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.95-21.108|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.state_addr_in ;
  /* hdlname = "mchip dut state_addr_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:21.110-21.124|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.state_addr_out ;
  /* hdlname = "mchip dut tape_addr D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:86.25-86.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr.D ;
  /* hdlname = "mchip dut tape_addr Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:87.25-87.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg [6:0] \mchip.dut.tape_addr.Q ;
  /* hdlname = "mchip dut tape_addr clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:85.21-85.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr.clear ;
  /* hdlname = "mchip dut tape_addr clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:85.38-85.43|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr.clock ;
  /* hdlname = "mchip dut tape_addr_init D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:43.18-43.109|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr_init.D ;
  /* hdlname = "mchip dut tape_addr_init Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:43.18-43.109|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr_init.Q ;
  /* hdlname = "mchip dut tape_addr_init clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:43.18-43.109|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr_init.clear ;
  /* hdlname = "mchip dut tape_addr_init clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:43.18-43.109|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr_init.clock ;
  /* hdlname = "mchip dut tape_addr_min D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr_min.D ;
  /* hdlname = "mchip dut tape_addr_min Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr_min.Q ;
  /* hdlname = "mchip dut tape_addr_min clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr_min.clear ;
  /* hdlname = "mchip dut tape_addr_min clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr_min.clock ;
  /* hdlname = "mchip dut tape_addr_min en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:67.17-67.19|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_addr_min.en ;
  /* hdlname = "mchip dut tape_addr_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:22.18-22.31|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_addr_out ;
  /* hdlname = "mchip dut tape_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.9-25.16|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_in ;
  /* hdlname = "mchip dut tape_init_addr" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:22.70-22.84|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_init_addr ;
  /* hdlname = "mchip dut tape_min_addr_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:22.33-22.49|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_min_addr_in ;
  /* hdlname = "mchip dut tape_min_addr_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:22.51-22.68|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [6:0] \mchip.dut.tape_min_addr_out ;
  /* hdlname = "mchip dut tape_reg D" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:68.25-68.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg.D ;
  /* hdlname = "mchip dut tape_reg Q" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:69.25-69.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  reg \mchip.dut.tape_reg.Q ;
  /* hdlname = "mchip dut tape_reg clear" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:67.21-67.26|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg.clear ;
  /* hdlname = "mchip dut tape_reg clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:67.28-67.33|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg.clock ;
  /* hdlname = "mchip dut tape_reg en" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:67.17-67.19|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg.en ;
  /* hdlname = "mchip dut tape_reg_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.18-25.29|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg_in ;
  /* hdlname = "mchip dut tape_reg_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:25.31-25.43|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire \mchip.dut.tape_reg_out ;
  /* hdlname = "mchip dut write_data" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:23.18-23.28|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  wire [4:0] \mchip.dut.write_data ;
  /* hdlname = "mchip input_data" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:9.17-9.27" */
  wire [6:0] \mchip.input_data ;
  /* hdlname = "mchip io_in" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:4.24-4.29" */
  /* unused_bits = "8 9 10 11" */
  wire [11:0] \mchip.io_in ;
  /* hdlname = "mchip io_out" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:5.25-5.31" */
  wire [11:0] \mchip.io_out ;
  /* hdlname = "mchip reset" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/chip.sv:7.17-7.22" */
  wire \mchip.reset ;
  /* hdlname = "mchip sync1 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  wire \mchip.sync1.async ;
  /* hdlname = "mchip sync1 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  reg \mchip.sync1.async1 ;
  /* hdlname = "mchip sync1 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  wire \mchip.sync1.clock ;
  /* hdlname = "mchip sync1 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  reg \mchip.sync1.sync ;
  /* hdlname = "mchip sync2 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  wire \mchip.sync2.async ;
  /* hdlname = "mchip sync2 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  reg \mchip.sync2.async1 ;
  /* hdlname = "mchip sync2 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  wire \mchip.sync2.clock ;
  /* hdlname = "mchip sync2 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  reg \mchip.sync2.sync ;
  /* hdlname = "mchip sync3 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  wire \mchip.sync3.async ;
  /* hdlname = "mchip sync3 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  reg \mchip.sync3.async1 ;
  /* hdlname = "mchip sync3 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  wire \mchip.sync3.clock ;
  /* hdlname = "mchip sync3 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  reg \mchip.sync3.sync ;
  /* hdlname = "mchip sync4 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  wire \mchip.sync4.async ;
  /* hdlname = "mchip sync4 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  reg \mchip.sync4.async1 ;
  /* hdlname = "mchip sync4 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  wire \mchip.sync4.clock ;
  /* hdlname = "mchip sync4 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  reg \mchip.sync4.sync ;
  /* hdlname = "mchip sync5 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  wire \mchip.sync5.async ;
  /* hdlname = "mchip sync5 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  reg \mchip.sync5.async1 ;
  /* hdlname = "mchip sync5 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  wire \mchip.sync5.clock ;
  /* hdlname = "mchip sync5 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  reg \mchip.sync5.sync ;
  /* hdlname = "mchip sync6 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  wire \mchip.sync6.async ;
  /* hdlname = "mchip sync6 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  reg \mchip.sync6.async1 ;
  /* hdlname = "mchip sync6 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  wire \mchip.sync6.clock ;
  /* hdlname = "mchip sync6 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  reg \mchip.sync6.sync ;
  /* hdlname = "mchip sync7 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  wire \mchip.sync7.async ;
  /* hdlname = "mchip sync7 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  reg \mchip.sync7.async1 ;
  /* hdlname = "mchip sync7 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  wire \mchip.sync7.clock ;
  /* hdlname = "mchip sync7 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  reg \mchip.sync7.sync ;
  /* hdlname = "mchip sync8 async" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.17-104.22|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  wire \mchip.sync8.async ;
  /* hdlname = "mchip sync8 async1" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:107.9-107.15|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  reg \mchip.sync8.async1 ;
  /* hdlname = "mchip sync8 clock" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:104.24-104.29|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  wire \mchip.sync8.clock ;
  /* hdlname = "mchip sync8 sync" */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:105.17-105.21|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  reg \mchip.sync8.sync ;
  assign _1416_[0] = ~\mchip.dut.input_addr.Q [0];
  assign _0019_ = \mchip.dut.fsm.currState [9] | \mchip.dut.fsm.currState [0];
  assign _1339_ = ~\mchip.sync1.sync ;
  assign _1340_ = \mchip.dut.tape_reg.Q  ^ \mchip.dut.data_reg.Q ;
  assign _1341_ = _1340_ | _1339_;
  assign _1342_ = \mchip.dut.fsm.currState [5] & ~(_1341_);
  assign _1343_ = _1342_ | \mchip.dut.fsm.currState [13];
  assign _1344_ = ~(\mchip.dut.fsm.currState [13] | \mchip.dut.fsm.currState [5]);
  assign _1345_ = _1343_ & ~(_1344_);
  assign _0018_ = _1345_ | \mchip.dut.fsm.currState [0];
  assign _1346_ = \mchip.dut.fsm.currState [9] & ~(\mchip.dut.direction_reg.Q [1]);
  assign _1347_ = ~(_1340_ & \mchip.sync1.sync );
  assign _1348_ = \mchip.dut.fsm.currState [5] & ~(_1347_);
  assign _0020_ = _1346_ & ~(_1348_);
  assign _1349_ = ~\mchip.dut.fsm.currState [10];
  assign _1350_ = \mchip.sync1.sync  & ~(io_in[13]);
  assign _1351_ = _1350_ & ~(_1349_);
  assign _1352_ = _1350_ & \mchip.dut.fsm.currState [2];
  assign _0006_ = _1352_ | _1351_;
  assign _1353_ = ~\mchip.dut.direction_reg.Q [0];
  assign _1354_ = \mchip.dut.direction_reg.Q [1] | ~(\mchip.dut.fsm.currState [9]);
  assign _1355_ = _1353_ & ~(_1354_);
  assign _1356_ = \mchip.dut.direction_reg.Q [0] & ~(_1354_);
  assign _1357_ = _1348_ | _1356_;
  assign _0017_ = _1357_ | _1355_;
  assign _1358_ = ~(\mchip.dut.tape_addr_min.Q [4] ^ \mchip.dut.tape_addr.Q [4]);
  assign _1359_ = \mchip.dut.tape_addr_min.Q [3] ^ \mchip.dut.tape_addr.Q [3];
  assign _1360_ = _1358_ & ~(_1359_);
  assign _1361_ = \mchip.dut.tape_addr.Q [2] | ~(\mchip.dut.tape_addr_min.Q [2]);
  assign _1362_ = \mchip.dut.tape_addr_min.Q [1] | ~(\mchip.dut.tape_addr.Q [1]);
  assign _1363_ = \mchip.dut.tape_addr_min.Q [2] ^ \mchip.dut.tape_addr.Q [2];
  assign _1364_ = _1362_ & ~(_1363_);
  assign _1365_ = _1361_ & ~(_1364_);
  assign _1366_ = _1360_ & ~(_1365_);
  assign _1367_ = \mchip.dut.tape_addr_min.Q [4] & ~(\mchip.dut.tape_addr.Q [4]);
  assign _1368_ = \mchip.dut.tape_addr.Q [3] | ~(\mchip.dut.tape_addr_min.Q [3]);
  assign _1369_ = _1358_ & ~(_1368_);
  assign _1370_ = _1369_ | _1367_;
  assign _1371_ = _1370_ | _1366_;
  assign _1372_ = \mchip.dut.tape_addr_min.Q [5] ^ \mchip.dut.tape_addr.Q [5];
  assign _1373_ = \mchip.dut.tape_addr_min.Q [6] ^ \mchip.dut.tape_addr.Q [6];
  assign _1374_ = _1373_ | _1372_;
  assign _1375_ = _1371_ & ~(_1374_);
  assign _1376_ = \mchip.dut.tape_addr_min.Q [5] & ~(\mchip.dut.tape_addr.Q [5]);
  assign _1377_ = _1376_ & ~(_1373_);
  assign _1378_ = \mchip.dut.tape_addr_min.Q [6] & ~(\mchip.dut.tape_addr.Q [6]);
  assign _1379_ = _1378_ | _1377_;
  assign _1380_ = _1379_ | _1375_;
  assign _1381_ = \mchip.dut.tape_addr_min.Q [1] ^ \mchip.dut.tape_addr.Q [1];
  assign _1382_ = _1381_ | _1363_;
  assign _1383_ = _1360_ & ~(_1382_);
  assign _1384_ = ~\mchip.dut.tape_addr.Q [0];
  assign _1385_ = _1374_ | _1384_;
  assign _1386_ = _1383_ & ~(_1385_);
  assign _1387_ = _1380_ & ~(_1386_);
  assign _1388_ = ~(\mchip.dut.tape_addr.Q [4] & \mchip.dut.tape_addr.Q [5]);
  assign _1389_ = \mchip.dut.tape_addr.Q [0] & \mchip.dut.tape_addr.Q [1];
  assign _1390_ = ~(\mchip.dut.tape_addr.Q [2] & \mchip.dut.tape_addr.Q [3]);
  assign _1391_ = _1389_ & ~(_1390_);
  assign _1392_ = _1388_ | ~(_1391_);
  assign _1393_ = \mchip.dut.tape_addr.Q [6] & ~(_1392_);
  assign _1394_ = _1388_ | ~(\mchip.dut.tape_addr.Q [6]);
  assign _1395_ = _1391_ & ~(_1394_);
  assign _1396_ = _1395_ | _1393_;
  assign _1397_ = _1396_ | _1387_;
  assign _1398_ = _1397_ | io_in[13];
  assign _1399_ = \mchip.dut.fsm.currState [11] & ~(_1398_);
  assign _1400_ = ~\mchip.dut.input_addr.Q [6];
  assign _1401_ = ~(\mchip.dut.input_addr.Q [4] & \mchip.dut.input_addr.Q [5]);
  assign _1402_ = _1401_ | _1400_;
  assign _1403_ = \mchip.dut.input_addr.Q [1] & \mchip.dut.input_addr.Q [0];
  assign _1404_ = \mchip.dut.input_addr.Q [2] & \mchip.dut.input_addr.Q [3];
  assign _1405_ = ~(_1404_ & _1403_);
  assign _1406_ = _1405_ | _1402_;
  assign _1407_ = ~(_1405_ | _1401_);
  assign _1408_ = _1407_ & ~(_1400_);
  assign _1409_ = _1406_ & ~(_1408_);
  assign _1410_ = _1409_ | io_in[13];
  assign _1411_ = \mchip.dut.fsm.currState [1] & ~(_1410_);
  assign _0013_ = _1411_ | _1399_;
  assign _1412_ = ~(io_in[13] | \mchip.sync1.sync );
  assign _1413_ = _1412_ & ~(_1349_);
  assign _1414_ = _1412_ & \mchip.dut.fsm.currState [14];
  assign _1415_ = \mchip.sync2.sync  | io_in[13];
  assign _0177_ = _1415_ | \mchip.sync1.sync ;
  assign _0178_ = \mchip.dut.fsm.currState [6] & ~(_0177_);
  assign _0179_ = _0178_ | _1414_;
  assign _0012_ = _0179_ | _1413_;
  assign _0180_ = io_in[13] | ~(\mchip.sync2.sync );
  assign _0181_ = _0180_ | \mchip.sync1.sync ;
  assign _0182_ = \mchip.dut.fsm.currState [4] & ~(_0181_);
  assign _0183_ = _1412_ & \mchip.dut.fsm.currState [2];
  assign _0008_ = _0183_ | _0182_;
  assign _0184_ = ~(\mchip.dut.fsm.currState [11] | \mchip.dut.fsm.currState [1]);
  assign _0185_ = ~\mchip.dut.fsm.currState [1];
  assign _0186_ = _1409_ | _0185_;
  assign _0187_ = \mchip.dut.fsm.currState [11] & ~(_1397_);
  assign _0188_ = _0186_ & ~(_0187_);
  assign \mchip.dut.StateAddr_ld  = ~(_0188_ | _0184_);
  assign _0014_ = \mchip.dut.StateAddr_ld  | \mchip.dut.fsm.currState [0];
  assign _0189_ = io_in[13] | ~(_1409_);
  assign _0190_ = \mchip.dut.fsm.currState [1] & ~(_0189_);
  assign _0191_ = \mchip.dut.fsm.currState [6] & ~(_0181_);
  assign _0007_ = _0191_ | _0190_;
  assign _0192_ = _0187_ | _1343_;
  assign _0193_ = _0186_ & ~(_0192_);
  assign _0194_ = ~(\mchip.dut.fsm.currState [3] | \mchip.dut.fsm.currState [11]);
  assign _0195_ = ~(_0194_ & _1344_);
  assign _0196_ = _0185_ & ~(_0195_);
  assign _0197_ = _0196_ | _0193_;
  assign _0198_ = \mchip.dut.fsm.currState [3] & ~(\mchip.sync1.sync );
  assign _0199_ = _0198_ | _0187_;
  assign _0200_ = _0186_ & ~(_0199_);
  assign _0201_ = _0200_ | _0196_;
  assign _0202_ = _0201_ & _0197_;
  assign _0203_ = _0202_ | \mchip.dut.fsm.currState [0];
  assign _0023_ = _0203_ | ~(_0197_);
  assign _0204_ = ~\mchip.dut.fsm.currState [5];
  assign _0205_ = _1412_ & ~(_0204_);
  assign _0206_ = \mchip.dut.fsm.currState [9] & ~(io_in[13]);
  assign _0011_ = _0206_ | _0205_;
  assign _0207_ = \mchip.dut.fsm.currState [4] & ~(_0177_);
  assign _0208_ = ~(\mchip.dut.fsm.currState [12] | \mchip.dut.fsm.currState [8]);
  assign _0209_ = _1412_ & ~(_0208_);
  assign _0010_ = _0209_ | _0207_;
  assign _0210_ = ~(_0201_ | _0197_);
  assign _0211_ = _0210_ | ~(_1345_);
  assign _0022_ = _0211_ | _0197_;
  assign _0212_ = \mchip.dut.fsm.currState [13] | \mchip.dut.fsm.currState [9];
  assign _0213_ = _0212_ | _1342_;
  assign _0214_ = _0204_ & ~(_0212_);
  assign _0215_ = _0213_ & ~(_0214_);
  assign _0016_ = _0215_ | \mchip.dut.StateAddr_ld ;
  assign _0216_ = ~\mchip.dut.fsm.currState [3];
  assign _0217_ = _1350_ & ~(_0216_);
  assign _0218_ = \mchip.dut.fsm.currState [13] & ~(io_in[13]);
  assign _0219_ = _1340_ | io_in[13];
  assign _0220_ = _0219_ | _1339_;
  assign _0221_ = \mchip.dut.fsm.currState [5] & ~(_0220_);
  assign _0222_ = _0221_ | _0218_;
  assign _0009_ = _0222_ | _0217_;
  assign _0223_ = \mchip.dut.direction_reg.Q [1] | \mchip.sync1.sync ;
  assign _0224_ = _0223_ | _0216_;
  assign _0225_ = _1353_ & ~(_0224_);
  assign _0226_ = \mchip.dut.direction_reg.Q [0] & ~(_0224_);
  assign _0227_ = \mchip.dut.fsm.currState [2] & \mchip.sync1.sync ;
  assign _0228_ = _0227_ | _0226_;
  assign _0015_ = _0228_ | _0225_;
  assign _0229_ = _0210_ | ~(\mchip.dut.fsm.currState [9]);
  assign _0230_ = _0201_ ^ _0197_;
  assign _0021_ = _0230_ | _0229_;
  assign _0231_ = _1412_ & \mchip.dut.fsm.currState [0];
  assign _0005_ = _0231_ | io_in[13];
  assign _0232_ = ~\mchip.dut.memory.M[127] [0];
  assign _0233_ = ~\mchip.dut.memory.M[126] [0];
  assign _0234_ = ~(\mchip.dut.fsm.currState [4] | \mchip.dut.fsm.currState [6]);
  assign _0235_ = \mchip.sync1.sync  & ~(_0234_);
  assign _0236_ = _0235_ | \mchip.dut.fsm.currState [1];
  assign _0237_ = _1397_ | \mchip.dut.direction_reg.Q [0];
  assign _0238_ = \mchip.dut.fsm.currState [11] & ~(_0237_);
  assign _0239_ = _0238_ | _1348_;
  assign _0240_ = _0239_ | _0236_;
  assign _0241_ = ~(_0234_ & _0185_);
  assign _0242_ = \mchip.dut.fsm.currState [11] | \mchip.dut.fsm.currState [5];
  assign _0243_ = _0242_ | _0241_;
  assign _0244_ = _1349_ & ~(_0243_);
  assign _0245_ = _0240_ & ~(_0244_);
  assign _0246_ = _0245_ ? \mchip.dut.input_addr.Q [0] : _1384_;
  assign _0247_ = \mchip.dut.direction_reg.Q [0] & ~(_1397_);
  assign _0248_ = ~(_0247_ & \mchip.dut.fsm.currState [11]);
  assign _0249_ = _1409_ & ~(_0185_);
  assign _0250_ = _0249_ | _0235_;
  assign _0251_ = _0250_ | ~(_0248_);
  assign _0252_ = _0251_ & ~(_0244_);
  assign _0253_ = _0245_ ? \mchip.dut.tape_addr.Q [0] : \mchip.dut.state_addr.Q [0];
  assign _0254_ = _0252_ ? _0246_ : _0253_;
  assign _0255_ = _0254_ ? _0232_ : _0233_;
  assign _0256_ = \mchip.dut.tape_addr.Q [0] ^ \mchip.dut.tape_addr.Q [1];
  assign _0257_ = _0245_ ? \mchip.dut.input_addr.Q [1] : _0256_;
  assign _0258_ = _0245_ ? \mchip.dut.tape_addr.Q [1] : \mchip.dut.state_addr.Q [1];
  assign _0259_ = _0252_ ? _0257_ : _0258_;
  assign _0260_ = ~\mchip.dut.memory.M[125] [0];
  assign _0261_ = ~\mchip.dut.memory.M[124] [0];
  assign _0262_ = _0254_ ? _0260_ : _0261_;
  assign _0263_ = _0259_ ? _0255_ : _0262_;
  assign _0264_ = ~\mchip.dut.tape_addr.Q [2];
  assign _0265_ = _1389_ ^ _0264_;
  assign _0266_ = _0245_ ? \mchip.dut.input_addr.Q [2] : _0265_;
  assign _0267_ = _0245_ ? \mchip.dut.tape_addr.Q [2] : \mchip.dut.state_addr.Q [2];
  assign _0268_ = _0252_ ? _0266_ : _0267_;
  assign _0269_ = ~\mchip.dut.memory.M[123] [0];
  assign _0270_ = ~\mchip.dut.memory.M[122] [0];
  assign _0271_ = _0254_ ? _0269_ : _0270_;
  assign _0272_ = ~\mchip.dut.memory.M[121] [0];
  assign _0273_ = ~\mchip.dut.memory.M[120] [0];
  assign _0274_ = _0254_ ? _0272_ : _0273_;
  assign _0275_ = _0259_ ? _0271_ : _0274_;
  assign _0276_ = _0268_ ? _0263_ : _0275_;
  assign _0277_ = ~\mchip.dut.tape_addr.Q [3];
  assign _0278_ = _0264_ & ~(_1389_);
  assign _0279_ = _0278_ ^ _0277_;
  assign _0280_ = _0245_ ? \mchip.dut.input_addr.Q [3] : _0279_;
  assign _0281_ = _0245_ ? \mchip.dut.tape_addr.Q [3] : \mchip.dut.state_addr.Q [3];
  assign _0282_ = _0252_ ? _0280_ : _0281_;
  assign _0283_ = ~\mchip.dut.memory.M[119] [0];
  assign _0284_ = ~\mchip.dut.memory.M[118] [0];
  assign _0285_ = _0254_ ? _0283_ : _0284_;
  assign _0286_ = ~\mchip.dut.memory.M[117] [0];
  assign _0287_ = ~\mchip.dut.memory.M[116] [0];
  assign _0288_ = _0254_ ? _0286_ : _0287_;
  assign _0289_ = _0259_ ? _0285_ : _0288_;
  assign _0290_ = ~\mchip.dut.memory.M[115] [0];
  assign _0291_ = ~\mchip.dut.memory.M[114] [0];
  assign _0292_ = _0254_ ? _0290_ : _0291_;
  assign _0293_ = ~\mchip.dut.memory.M[113] [0];
  assign _0294_ = ~\mchip.dut.memory.M[112] [0];
  assign _0295_ = _0254_ ? _0293_ : _0294_;
  assign _0296_ = _0259_ ? _0292_ : _0295_;
  assign _0297_ = _0268_ ? _0289_ : _0296_;
  assign _0298_ = _0282_ ? _0276_ : _0297_;
  assign _0299_ = \mchip.dut.tape_addr.Q [2] | ~(\mchip.dut.tape_addr.Q [3]);
  assign _0300_ = _1389_ & ~(_0299_);
  assign _0301_ = _1390_ & ~(_0300_);
  assign _0302_ = _0301_ ^ \mchip.dut.tape_addr.Q [4];
  assign _0303_ = _0245_ ? \mchip.dut.input_addr.Q [4] : _0302_;
  assign _0304_ = _0245_ ? \mchip.dut.tape_addr.Q [4] : \mchip.dut.state_addr.Q [4];
  assign _0305_ = _0252_ ? _0303_ : _0304_;
  assign _0306_ = ~\mchip.dut.memory.M[111] [0];
  assign _0307_ = ~\mchip.dut.memory.M[110] [0];
  assign _0308_ = _0254_ ? _0306_ : _0307_;
  assign _0309_ = ~\mchip.dut.memory.M[109] [0];
  assign _0310_ = ~\mchip.dut.memory.M[108] [0];
  assign _0311_ = _0254_ ? _0309_ : _0310_;
  assign _0312_ = _0259_ ? _0308_ : _0311_;
  assign _0313_ = ~\mchip.dut.memory.M[107] [0];
  assign _0314_ = ~\mchip.dut.memory.M[106] [0];
  assign _0315_ = _0254_ ? _0313_ : _0314_;
  assign _0316_ = ~\mchip.dut.memory.M[105] [0];
  assign _0317_ = ~\mchip.dut.memory.M[104] [0];
  assign _0318_ = _0254_ ? _0316_ : _0317_;
  assign _0319_ = _0259_ ? _0315_ : _0318_;
  assign _0320_ = _0268_ ? _0312_ : _0319_;
  assign _0321_ = ~\mchip.dut.memory.M[103] [0];
  assign _0322_ = ~\mchip.dut.memory.M[102] [0];
  assign _0323_ = _0254_ ? _0321_ : _0322_;
  assign _0324_ = ~\mchip.dut.memory.M[101] [0];
  assign _0325_ = ~\mchip.dut.memory.M[100] [0];
  assign _0326_ = _0254_ ? _0324_ : _0325_;
  assign _0327_ = _0259_ ? _0323_ : _0326_;
  assign _0328_ = ~\mchip.dut.memory.M[99] [0];
  assign _0329_ = ~\mchip.dut.memory.M[98] [0];
  assign _0330_ = _0254_ ? _0328_ : _0329_;
  assign _0331_ = ~\mchip.dut.memory.M[97] [0];
  assign _0332_ = ~\mchip.dut.memory.M[96] [0];
  assign _0333_ = _0254_ ? _0331_ : _0332_;
  assign _0334_ = _0259_ ? _0330_ : _0333_;
  assign _0335_ = _0268_ ? _0327_ : _0334_;
  assign _0336_ = _0282_ ? _0320_ : _0335_;
  assign _0337_ = _0305_ ? _0298_ : _0336_;
  assign _0338_ = _0301_ & ~(\mchip.dut.tape_addr.Q [4]);
  assign _0339_ = _0338_ ^ \mchip.dut.tape_addr.Q [5];
  assign _0340_ = _0245_ ? \mchip.dut.input_addr.Q [5] : _0339_;
  assign _0341_ = _0245_ ? \mchip.dut.tape_addr.Q [5] : \mchip.dut.state_addr.Q [5];
  assign _0342_ = _0252_ ? _0340_ : _0341_;
  assign _0343_ = ~\mchip.dut.memory.M[95] [0];
  assign _0344_ = ~\mchip.dut.memory.M[94] [0];
  assign _0345_ = _0254_ ? _0343_ : _0344_;
  assign _0346_ = ~\mchip.dut.memory.M[93] [0];
  assign _0347_ = ~\mchip.dut.memory.M[92] [0];
  assign _0348_ = _0254_ ? _0346_ : _0347_;
  assign _0349_ = _0259_ ? _0345_ : _0348_;
  assign _0350_ = ~\mchip.dut.memory.M[91] [0];
  assign _0351_ = ~\mchip.dut.memory.M[90] [0];
  assign _0352_ = _0254_ ? _0350_ : _0351_;
  assign _0353_ = ~\mchip.dut.memory.M[89] [0];
  assign _0354_ = ~\mchip.dut.memory.M[88] [0];
  assign _0355_ = _0254_ ? _0353_ : _0354_;
  assign _0356_ = _0259_ ? _0352_ : _0355_;
  assign _0357_ = _0268_ ? _0349_ : _0356_;
  assign _0358_ = ~\mchip.dut.memory.M[87] [0];
  assign _0359_ = ~\mchip.dut.memory.M[86] [0];
  assign _0360_ = _0254_ ? _0358_ : _0359_;
  assign _0361_ = ~\mchip.dut.memory.M[85] [0];
  assign _0362_ = ~\mchip.dut.memory.M[84] [0];
  assign _0363_ = _0254_ ? _0361_ : _0362_;
  assign _0364_ = _0259_ ? _0360_ : _0363_;
  assign _0365_ = ~\mchip.dut.memory.M[83] [0];
  assign _0366_ = ~\mchip.dut.memory.M[82] [0];
  assign _0367_ = _0254_ ? _0365_ : _0366_;
  assign _0368_ = ~\mchip.dut.memory.M[81] [0];
  assign _0369_ = ~\mchip.dut.memory.M[80] [0];
  assign _0370_ = _0254_ ? _0368_ : _0369_;
  assign _0371_ = _0259_ ? _0367_ : _0370_;
  assign _0372_ = _0268_ ? _0364_ : _0371_;
  assign _0373_ = _0282_ ? _0357_ : _0372_;
  assign _0374_ = ~\mchip.dut.memory.M[79] [0];
  assign _0375_ = ~\mchip.dut.memory.M[78] [0];
  assign _0376_ = _0254_ ? _0374_ : _0375_;
  assign _0377_ = ~\mchip.dut.memory.M[77] [0];
  assign _0378_ = ~\mchip.dut.memory.M[76] [0];
  assign _0379_ = _0254_ ? _0377_ : _0378_;
  assign _0380_ = _0259_ ? _0376_ : _0379_;
  assign _0381_ = ~\mchip.dut.memory.M[75] [0];
  assign _0382_ = ~\mchip.dut.memory.M[74] [0];
  assign _0383_ = _0254_ ? _0381_ : _0382_;
  assign _0384_ = ~\mchip.dut.memory.M[73] [0];
  assign _0385_ = ~\mchip.dut.memory.M[72] [0];
  assign _0386_ = _0254_ ? _0384_ : _0385_;
  assign _0387_ = _0259_ ? _0383_ : _0386_;
  assign _0388_ = _0268_ ? _0380_ : _0387_;
  assign _0389_ = ~\mchip.dut.memory.M[71] [0];
  assign _0390_ = ~\mchip.dut.memory.M[70] [0];
  assign _0391_ = _0254_ ? _0389_ : _0390_;
  assign _0392_ = ~\mchip.dut.memory.M[69] [0];
  assign _0393_ = ~\mchip.dut.memory.M[68] [0];
  assign _0394_ = _0254_ ? _0392_ : _0393_;
  assign _0395_ = _0259_ ? _0391_ : _0394_;
  assign _0396_ = ~\mchip.dut.memory.M[67] [0];
  assign _0397_ = ~\mchip.dut.memory.M[66] [0];
  assign _0398_ = _0254_ ? _0396_ : _0397_;
  assign _0399_ = ~\mchip.dut.memory.M[65] [0];
  assign _0400_ = ~\mchip.dut.memory.M[64] [0];
  assign _0401_ = _0254_ ? _0399_ : _0400_;
  assign _0402_ = _0259_ ? _0398_ : _0401_;
  assign _0403_ = _0268_ ? _0395_ : _0402_;
  assign _0404_ = _0282_ ? _0388_ : _0403_;
  assign _0405_ = _0305_ ? _0373_ : _0404_;
  assign _0406_ = _0342_ ? _0337_ : _0405_;
  assign _0407_ = \mchip.dut.tape_addr.Q [4] | \mchip.dut.tape_addr.Q [5];
  assign _0408_ = _0301_ & ~(_0407_);
  assign _0409_ = _0408_ ^ \mchip.dut.tape_addr.Q [6];
  assign _0410_ = _0245_ ? \mchip.dut.input_addr.Q [6] : _0409_;
  assign _0411_ = _0245_ ? \mchip.dut.tape_addr.Q [6] : \mchip.dut.state_addr.Q [6];
  assign _0412_ = _0252_ ? _0410_ : _0411_;
  assign _0413_ = ~\mchip.dut.memory.M[63] [0];
  assign _0414_ = ~\mchip.dut.memory.M[62] [0];
  assign _0415_ = _0254_ ? _0413_ : _0414_;
  assign _0416_ = ~\mchip.dut.memory.M[61] [0];
  assign _0417_ = ~\mchip.dut.memory.M[60] [0];
  assign _0418_ = _0254_ ? _0416_ : _0417_;
  assign _0419_ = _0259_ ? _0415_ : _0418_;
  assign _0420_ = ~\mchip.dut.memory.M[59] [0];
  assign _0421_ = ~\mchip.dut.memory.M[58] [0];
  assign _0422_ = _0254_ ? _0420_ : _0421_;
  assign _0423_ = ~\mchip.dut.memory.M[57] [0];
  assign _0424_ = ~\mchip.dut.memory.M[56] [0];
  assign _0425_ = _0254_ ? _0423_ : _0424_;
  assign _0426_ = _0259_ ? _0422_ : _0425_;
  assign _0427_ = _0268_ ? _0419_ : _0426_;
  assign _0428_ = ~\mchip.dut.memory.M[55] [0];
  assign _0429_ = ~\mchip.dut.memory.M[54] [0];
  assign _0430_ = _0254_ ? _0428_ : _0429_;
  assign _0431_ = ~\mchip.dut.memory.M[53] [0];
  assign _0432_ = ~\mchip.dut.memory.M[52] [0];
  assign _0433_ = _0254_ ? _0431_ : _0432_;
  assign _0434_ = _0259_ ? _0430_ : _0433_;
  assign _0435_ = ~\mchip.dut.memory.M[51] [0];
  assign _0436_ = ~\mchip.dut.memory.M[50] [0];
  assign _0437_ = _0254_ ? _0435_ : _0436_;
  assign _0438_ = ~\mchip.dut.memory.M[49] [0];
  assign _0439_ = ~\mchip.dut.memory.M[48] [0];
  assign _0440_ = _0254_ ? _0438_ : _0439_;
  assign _0441_ = _0259_ ? _0437_ : _0440_;
  assign _0442_ = _0268_ ? _0434_ : _0441_;
  assign _0443_ = _0282_ ? _0427_ : _0442_;
  assign _0444_ = ~\mchip.dut.memory.M[47] [0];
  assign _0445_ = ~\mchip.dut.memory.M[46] [0];
  assign _0446_ = _0254_ ? _0444_ : _0445_;
  assign _0447_ = ~\mchip.dut.memory.M[45] [0];
  assign _0448_ = ~\mchip.dut.memory.M[44] [0];
  assign _0449_ = _0254_ ? _0447_ : _0448_;
  assign _0450_ = _0259_ ? _0446_ : _0449_;
  assign _0451_ = ~\mchip.dut.memory.M[43] [0];
  assign _0452_ = ~\mchip.dut.memory.M[42] [0];
  assign _0453_ = _0254_ ? _0451_ : _0452_;
  assign _0454_ = ~\mchip.dut.memory.M[41] [0];
  assign _0455_ = ~\mchip.dut.memory.M[40] [0];
  assign _0456_ = _0254_ ? _0454_ : _0455_;
  assign _0457_ = _0259_ ? _0453_ : _0456_;
  assign _0458_ = _0268_ ? _0450_ : _0457_;
  assign _0459_ = ~\mchip.dut.memory.M[39] [0];
  assign _0460_ = ~\mchip.dut.memory.M[38] [0];
  assign _0461_ = _0254_ ? _0459_ : _0460_;
  assign _0462_ = ~\mchip.dut.memory.M[37] [0];
  assign _0463_ = ~\mchip.dut.memory.M[36] [0];
  assign _0464_ = _0254_ ? _0462_ : _0463_;
  assign _0465_ = _0259_ ? _0461_ : _0464_;
  assign _0466_ = ~\mchip.dut.memory.M[35] [0];
  assign _0467_ = ~\mchip.dut.memory.M[34] [0];
  assign _0468_ = _0254_ ? _0466_ : _0467_;
  assign _0469_ = ~\mchip.dut.memory.M[33] [0];
  assign _0470_ = ~\mchip.dut.memory.M[32] [0];
  assign _0471_ = _0254_ ? _0469_ : _0470_;
  assign _0472_ = _0259_ ? _0468_ : _0471_;
  assign _0473_ = _0268_ ? _0465_ : _0472_;
  assign _0474_ = _0282_ ? _0458_ : _0473_;
  assign _0475_ = _0305_ ? _0443_ : _0474_;
  assign _0476_ = ~\mchip.dut.memory.M[31] [0];
  assign _0477_ = ~\mchip.dut.memory.M[30] [0];
  assign _0478_ = _0254_ ? _0476_ : _0477_;
  assign _0479_ = ~\mchip.dut.memory.M[29] [0];
  assign _0480_ = ~\mchip.dut.memory.M[28] [0];
  assign _0481_ = _0254_ ? _0479_ : _0480_;
  assign _0482_ = _0259_ ? _0478_ : _0481_;
  assign _0483_ = ~\mchip.dut.memory.M[27] [0];
  assign _0484_ = ~\mchip.dut.memory.M[26] [0];
  assign _0485_ = _0254_ ? _0483_ : _0484_;
  assign _0486_ = ~\mchip.dut.memory.M[25] [0];
  assign _0487_ = ~\mchip.dut.memory.M[24] [0];
  assign _0488_ = _0254_ ? _0486_ : _0487_;
  assign _0489_ = _0259_ ? _0485_ : _0488_;
  assign _0490_ = _0268_ ? _0482_ : _0489_;
  assign _0491_ = ~\mchip.dut.memory.M[23] [0];
  assign _0492_ = ~\mchip.dut.memory.M[22] [0];
  assign _0493_ = _0254_ ? _0491_ : _0492_;
  assign _0494_ = ~\mchip.dut.memory.M[21] [0];
  assign _0495_ = ~\mchip.dut.memory.M[20] [0];
  assign _0496_ = _0254_ ? _0494_ : _0495_;
  assign _0497_ = _0259_ ? _0493_ : _0496_;
  assign _0498_ = ~\mchip.dut.memory.M[19] [0];
  assign _0499_ = ~\mchip.dut.memory.M[18] [0];
  assign _0500_ = _0254_ ? _0498_ : _0499_;
  assign _0501_ = ~\mchip.dut.memory.M[17] [0];
  assign _0502_ = ~\mchip.dut.memory.M[16] [0];
  assign _0503_ = _0254_ ? _0501_ : _0502_;
  assign _0504_ = _0259_ ? _0500_ : _0503_;
  assign _0505_ = _0268_ ? _0497_ : _0504_;
  assign _0506_ = _0282_ ? _0490_ : _0505_;
  assign _0507_ = ~\mchip.dut.memory.M[15] [0];
  assign _0508_ = ~\mchip.dut.memory.M[14] [0];
  assign _0509_ = _0254_ ? _0507_ : _0508_;
  assign _0510_ = ~\mchip.dut.memory.M[13] [0];
  assign _0511_ = ~\mchip.dut.memory.M[12] [0];
  assign _0512_ = _0254_ ? _0510_ : _0511_;
  assign _0513_ = _0259_ ? _0509_ : _0512_;
  assign _0514_ = ~\mchip.dut.memory.M[11] [0];
  assign _0515_ = ~\mchip.dut.memory.M[10] [0];
  assign _0516_ = _0254_ ? _0514_ : _0515_;
  assign _0517_ = ~\mchip.dut.memory.M[9] [0];
  assign _0518_ = ~\mchip.dut.memory.M[8] [0];
  assign _0519_ = _0254_ ? _0517_ : _0518_;
  assign _0520_ = _0259_ ? _0516_ : _0519_;
  assign _0521_ = _0268_ ? _0513_ : _0520_;
  assign _0522_ = ~\mchip.dut.memory.M[7] [0];
  assign _0523_ = ~\mchip.dut.memory.M[6] [0];
  assign _0524_ = _0254_ ? _0522_ : _0523_;
  assign _0525_ = ~\mchip.dut.memory.M[5] [0];
  assign _0526_ = ~\mchip.dut.memory.M[4] [0];
  assign _0527_ = _0254_ ? _0525_ : _0526_;
  assign _0528_ = _0259_ ? _0524_ : _0527_;
  assign _0529_ = ~\mchip.dut.memory.M[3] [0];
  assign _0530_ = ~\mchip.dut.memory.M[2] [0];
  assign _0531_ = _0254_ ? _0529_ : _0530_;
  assign _0532_ = ~\mchip.dut.memory.M[1] [0];
  assign _0533_ = ~\mchip.dut.memory.M[0] [0];
  assign _0534_ = _0254_ ? _0532_ : _0533_;
  assign _0535_ = _0259_ ? _0531_ : _0534_;
  assign _0536_ = _0268_ ? _0528_ : _0535_;
  assign _0537_ = _0282_ ? _0521_ : _0536_;
  assign _0538_ = _0305_ ? _0506_ : _0537_;
  assign _0539_ = _0342_ ? _0475_ : _0538_;
  assign _0540_ = _0412_ ? _0406_ : _0539_;
  assign \mchip.dut.demux.I [0] = ~_0540_;
  assign _0541_ = _0254_ ? \mchip.dut.memory.M[127] [1] : \mchip.dut.memory.M[126] [1];
  assign _0542_ = _0254_ ? \mchip.dut.memory.M[125] [1] : \mchip.dut.memory.M[124] [1];
  assign _0543_ = _0259_ ? _0541_ : _0542_;
  assign _0544_ = _0254_ ? \mchip.dut.memory.M[123] [1] : \mchip.dut.memory.M[122] [1];
  assign _0545_ = _0254_ ? \mchip.dut.memory.M[121] [1] : \mchip.dut.memory.M[120] [1];
  assign _0546_ = _0259_ ? _0544_ : _0545_;
  assign _0547_ = _0268_ ? _0543_ : _0546_;
  assign _0548_ = _0254_ ? \mchip.dut.memory.M[119] [1] : \mchip.dut.memory.M[118] [1];
  assign _0549_ = _0254_ ? \mchip.dut.memory.M[117] [1] : \mchip.dut.memory.M[116] [1];
  assign _0550_ = _0259_ ? _0548_ : _0549_;
  assign _0551_ = _0254_ ? \mchip.dut.memory.M[115] [1] : \mchip.dut.memory.M[114] [1];
  assign _0552_ = _0254_ ? \mchip.dut.memory.M[113] [1] : \mchip.dut.memory.M[112] [1];
  assign _0553_ = _0259_ ? _0551_ : _0552_;
  assign _0554_ = _0268_ ? _0550_ : _0553_;
  assign _0555_ = _0282_ ? _0547_ : _0554_;
  assign _0556_ = _0254_ ? \mchip.dut.memory.M[111] [1] : \mchip.dut.memory.M[110] [1];
  assign _0557_ = _0254_ ? \mchip.dut.memory.M[109] [1] : \mchip.dut.memory.M[108] [1];
  assign _0558_ = _0259_ ? _0556_ : _0557_;
  assign _0559_ = _0254_ ? \mchip.dut.memory.M[107] [1] : \mchip.dut.memory.M[106] [1];
  assign _0560_ = _0254_ ? \mchip.dut.memory.M[105] [1] : \mchip.dut.memory.M[104] [1];
  assign _0561_ = _0259_ ? _0559_ : _0560_;
  assign _0562_ = _0268_ ? _0558_ : _0561_;
  assign _0563_ = _0254_ ? \mchip.dut.memory.M[103] [1] : \mchip.dut.memory.M[102] [1];
  assign _0564_ = _0254_ ? \mchip.dut.memory.M[101] [1] : \mchip.dut.memory.M[100] [1];
  assign _0565_ = _0259_ ? _0563_ : _0564_;
  assign _0566_ = _0254_ ? \mchip.dut.memory.M[99] [1] : \mchip.dut.memory.M[98] [1];
  assign _0567_ = _0254_ ? \mchip.dut.memory.M[97] [1] : \mchip.dut.memory.M[96] [1];
  assign _0568_ = _0259_ ? _0566_ : _0567_;
  assign _0569_ = _0268_ ? _0565_ : _0568_;
  assign _0570_ = _0282_ ? _0562_ : _0569_;
  assign _0571_ = _0305_ ? _0555_ : _0570_;
  assign _0572_ = _0254_ ? \mchip.dut.memory.M[95] [1] : \mchip.dut.memory.M[94] [1];
  assign _0573_ = _0254_ ? \mchip.dut.memory.M[93] [1] : \mchip.dut.memory.M[92] [1];
  assign _0574_ = _0259_ ? _0572_ : _0573_;
  assign _0575_ = _0254_ ? \mchip.dut.memory.M[91] [1] : \mchip.dut.memory.M[90] [1];
  assign _0576_ = _0254_ ? \mchip.dut.memory.M[89] [1] : \mchip.dut.memory.M[88] [1];
  assign _0577_ = _0259_ ? _0575_ : _0576_;
  assign _0578_ = _0268_ ? _0574_ : _0577_;
  assign _0579_ = _0254_ ? \mchip.dut.memory.M[87] [1] : \mchip.dut.memory.M[86] [1];
  assign _0580_ = _0254_ ? \mchip.dut.memory.M[85] [1] : \mchip.dut.memory.M[84] [1];
  assign _0581_ = _0259_ ? _0579_ : _0580_;
  assign _0582_ = _0254_ ? \mchip.dut.memory.M[83] [1] : \mchip.dut.memory.M[82] [1];
  assign _0583_ = _0254_ ? \mchip.dut.memory.M[81] [1] : \mchip.dut.memory.M[80] [1];
  assign _0584_ = _0259_ ? _0582_ : _0583_;
  assign _0585_ = _0268_ ? _0581_ : _0584_;
  assign _0586_ = _0282_ ? _0578_ : _0585_;
  assign _0587_ = _0254_ ? \mchip.dut.memory.M[79] [1] : \mchip.dut.memory.M[78] [1];
  assign _0588_ = _0254_ ? \mchip.dut.memory.M[77] [1] : \mchip.dut.memory.M[76] [1];
  assign _0589_ = _0259_ ? _0587_ : _0588_;
  assign _0590_ = _0254_ ? \mchip.dut.memory.M[75] [1] : \mchip.dut.memory.M[74] [1];
  assign _0591_ = _0254_ ? \mchip.dut.memory.M[73] [1] : \mchip.dut.memory.M[72] [1];
  assign _0592_ = _0259_ ? _0590_ : _0591_;
  assign _0593_ = _0268_ ? _0589_ : _0592_;
  assign _0594_ = _0254_ ? \mchip.dut.memory.M[71] [1] : \mchip.dut.memory.M[70] [1];
  assign _0595_ = _0254_ ? \mchip.dut.memory.M[69] [1] : \mchip.dut.memory.M[68] [1];
  assign _0596_ = _0259_ ? _0594_ : _0595_;
  assign _0597_ = _0254_ ? \mchip.dut.memory.M[67] [1] : \mchip.dut.memory.M[66] [1];
  assign _0598_ = _0254_ ? \mchip.dut.memory.M[65] [1] : \mchip.dut.memory.M[64] [1];
  assign _0599_ = _0259_ ? _0597_ : _0598_;
  assign _0600_ = _0268_ ? _0596_ : _0599_;
  assign _0601_ = _0282_ ? _0593_ : _0600_;
  assign _0602_ = _0305_ ? _0586_ : _0601_;
  assign _0603_ = _0342_ ? _0571_ : _0602_;
  assign _0604_ = _0254_ ? \mchip.dut.memory.M[63] [1] : \mchip.dut.memory.M[62] [1];
  assign _0605_ = _0254_ ? \mchip.dut.memory.M[61] [1] : \mchip.dut.memory.M[60] [1];
  assign _0606_ = _0259_ ? _0604_ : _0605_;
  assign _0607_ = _0254_ ? \mchip.dut.memory.M[59] [1] : \mchip.dut.memory.M[58] [1];
  assign _0608_ = _0254_ ? \mchip.dut.memory.M[57] [1] : \mchip.dut.memory.M[56] [1];
  assign _0609_ = _0259_ ? _0607_ : _0608_;
  assign _0610_ = _0268_ ? _0606_ : _0609_;
  assign _0611_ = _0254_ ? \mchip.dut.memory.M[55] [1] : \mchip.dut.memory.M[54] [1];
  assign _0612_ = _0254_ ? \mchip.dut.memory.M[53] [1] : \mchip.dut.memory.M[52] [1];
  assign _0613_ = _0259_ ? _0611_ : _0612_;
  assign _0614_ = _0254_ ? \mchip.dut.memory.M[51] [1] : \mchip.dut.memory.M[50] [1];
  assign _0615_ = _0254_ ? \mchip.dut.memory.M[49] [1] : \mchip.dut.memory.M[48] [1];
  assign _0616_ = _0259_ ? _0614_ : _0615_;
  assign _0617_ = _0268_ ? _0613_ : _0616_;
  assign _0618_ = _0282_ ? _0610_ : _0617_;
  assign _0619_ = _0254_ ? \mchip.dut.memory.M[47] [1] : \mchip.dut.memory.M[46] [1];
  assign _0620_ = _0254_ ? \mchip.dut.memory.M[45] [1] : \mchip.dut.memory.M[44] [1];
  assign _0621_ = _0259_ ? _0619_ : _0620_;
  assign _0622_ = _0254_ ? \mchip.dut.memory.M[43] [1] : \mchip.dut.memory.M[42] [1];
  assign _0623_ = _0254_ ? \mchip.dut.memory.M[41] [1] : \mchip.dut.memory.M[40] [1];
  assign _0624_ = _0259_ ? _0622_ : _0623_;
  assign _0625_ = _0268_ ? _0621_ : _0624_;
  assign _0626_ = _0254_ ? \mchip.dut.memory.M[39] [1] : \mchip.dut.memory.M[38] [1];
  assign _0627_ = _0254_ ? \mchip.dut.memory.M[37] [1] : \mchip.dut.memory.M[36] [1];
  assign _0628_ = _0259_ ? _0626_ : _0627_;
  assign _0629_ = _0254_ ? \mchip.dut.memory.M[35] [1] : \mchip.dut.memory.M[34] [1];
  assign _0630_ = _0254_ ? \mchip.dut.memory.M[33] [1] : \mchip.dut.memory.M[32] [1];
  assign _0631_ = _0259_ ? _0629_ : _0630_;
  assign _0632_ = _0268_ ? _0628_ : _0631_;
  assign _0633_ = _0282_ ? _0625_ : _0632_;
  assign _0634_ = _0305_ ? _0618_ : _0633_;
  assign _0635_ = _0254_ ? \mchip.dut.memory.M[31] [1] : \mchip.dut.memory.M[30] [1];
  assign _0636_ = _0254_ ? \mchip.dut.memory.M[29] [1] : \mchip.dut.memory.M[28] [1];
  assign _0637_ = _0259_ ? _0635_ : _0636_;
  assign _0638_ = _0254_ ? \mchip.dut.memory.M[27] [1] : \mchip.dut.memory.M[26] [1];
  assign _0639_ = _0254_ ? \mchip.dut.memory.M[25] [1] : \mchip.dut.memory.M[24] [1];
  assign _0640_ = _0259_ ? _0638_ : _0639_;
  assign _0641_ = _0268_ ? _0637_ : _0640_;
  assign _0642_ = _0254_ ? \mchip.dut.memory.M[23] [1] : \mchip.dut.memory.M[22] [1];
  assign _0643_ = _0254_ ? \mchip.dut.memory.M[21] [1] : \mchip.dut.memory.M[20] [1];
  assign _0644_ = _0259_ ? _0642_ : _0643_;
  assign _0645_ = _0254_ ? \mchip.dut.memory.M[19] [1] : \mchip.dut.memory.M[18] [1];
  assign _0646_ = _0254_ ? \mchip.dut.memory.M[17] [1] : \mchip.dut.memory.M[16] [1];
  assign _0647_ = _0259_ ? _0645_ : _0646_;
  assign _0648_ = _0268_ ? _0644_ : _0647_;
  assign _0649_ = _0282_ ? _0641_ : _0648_;
  assign _0650_ = _0254_ ? \mchip.dut.memory.M[15] [1] : \mchip.dut.memory.M[14] [1];
  assign _0651_ = _0254_ ? \mchip.dut.memory.M[13] [1] : \mchip.dut.memory.M[12] [1];
  assign _0652_ = _0259_ ? _0650_ : _0651_;
  assign _0653_ = _0254_ ? \mchip.dut.memory.M[11] [1] : \mchip.dut.memory.M[10] [1];
  assign _0654_ = _0254_ ? \mchip.dut.memory.M[9] [1] : \mchip.dut.memory.M[8] [1];
  assign _0655_ = _0259_ ? _0653_ : _0654_;
  assign _0656_ = _0268_ ? _0652_ : _0655_;
  assign _0657_ = _0254_ ? \mchip.dut.memory.M[7] [1] : \mchip.dut.memory.M[6] [1];
  assign _0658_ = _0254_ ? \mchip.dut.memory.M[5] [1] : \mchip.dut.memory.M[4] [1];
  assign _0659_ = _0259_ ? _0657_ : _0658_;
  assign _0660_ = _0254_ ? \mchip.dut.memory.M[3] [1] : \mchip.dut.memory.M[2] [1];
  assign _0661_ = _0254_ ? \mchip.dut.memory.M[1] [1] : \mchip.dut.memory.M[0] [1];
  assign _0662_ = _0259_ ? _0660_ : _0661_;
  assign _0663_ = _0268_ ? _0659_ : _0662_;
  assign _0664_ = _0282_ ? _0656_ : _0663_;
  assign _0665_ = _0305_ ? _0649_ : _0664_;
  assign _0666_ = _0342_ ? _0634_ : _0665_;
  assign \mchip.dut.demux.I [1] = _0412_ ? _0603_ : _0666_;
  assign _0667_ = _0254_ ? \mchip.dut.memory.M[127] [2] : \mchip.dut.memory.M[126] [2];
  assign _0668_ = _0254_ ? \mchip.dut.memory.M[125] [2] : \mchip.dut.memory.M[124] [2];
  assign _0669_ = _0259_ ? _0667_ : _0668_;
  assign _0670_ = _0254_ ? \mchip.dut.memory.M[123] [2] : \mchip.dut.memory.M[122] [2];
  assign _0671_ = _0254_ ? \mchip.dut.memory.M[121] [2] : \mchip.dut.memory.M[120] [2];
  assign _0672_ = _0259_ ? _0670_ : _0671_;
  assign _0673_ = _0268_ ? _0669_ : _0672_;
  assign _0674_ = _0254_ ? \mchip.dut.memory.M[119] [2] : \mchip.dut.memory.M[118] [2];
  assign _0675_ = _0254_ ? \mchip.dut.memory.M[117] [2] : \mchip.dut.memory.M[116] [2];
  assign _0676_ = _0259_ ? _0674_ : _0675_;
  assign _0677_ = _0254_ ? \mchip.dut.memory.M[115] [2] : \mchip.dut.memory.M[114] [2];
  assign _0678_ = _0254_ ? \mchip.dut.memory.M[113] [2] : \mchip.dut.memory.M[112] [2];
  assign _0679_ = _0259_ ? _0677_ : _0678_;
  assign _0680_ = _0268_ ? _0676_ : _0679_;
  assign _0681_ = _0282_ ? _0673_ : _0680_;
  assign _0682_ = _0254_ ? \mchip.dut.memory.M[111] [2] : \mchip.dut.memory.M[110] [2];
  assign _0683_ = _0254_ ? \mchip.dut.memory.M[109] [2] : \mchip.dut.memory.M[108] [2];
  assign _0684_ = _0259_ ? _0682_ : _0683_;
  assign _0685_ = _0254_ ? \mchip.dut.memory.M[107] [2] : \mchip.dut.memory.M[106] [2];
  assign _0686_ = _0254_ ? \mchip.dut.memory.M[105] [2] : \mchip.dut.memory.M[104] [2];
  assign _0687_ = _0259_ ? _0685_ : _0686_;
  assign _0688_ = _0268_ ? _0684_ : _0687_;
  assign _0689_ = _0254_ ? \mchip.dut.memory.M[103] [2] : \mchip.dut.memory.M[102] [2];
  assign _0690_ = _0254_ ? \mchip.dut.memory.M[101] [2] : \mchip.dut.memory.M[100] [2];
  assign _0691_ = _0259_ ? _0689_ : _0690_;
  assign _0692_ = _0254_ ? \mchip.dut.memory.M[99] [2] : \mchip.dut.memory.M[98] [2];
  assign _0693_ = _0254_ ? \mchip.dut.memory.M[97] [2] : \mchip.dut.memory.M[96] [2];
  assign _0694_ = _0259_ ? _0692_ : _0693_;
  assign _0695_ = _0268_ ? _0691_ : _0694_;
  assign _0696_ = _0282_ ? _0688_ : _0695_;
  assign _0697_ = _0305_ ? _0681_ : _0696_;
  assign _0698_ = _0254_ ? \mchip.dut.memory.M[95] [2] : \mchip.dut.memory.M[94] [2];
  assign _0699_ = _0254_ ? \mchip.dut.memory.M[93] [2] : \mchip.dut.memory.M[92] [2];
  assign _0700_ = _0259_ ? _0698_ : _0699_;
  assign _0701_ = _0254_ ? \mchip.dut.memory.M[91] [2] : \mchip.dut.memory.M[90] [2];
  assign _0702_ = _0254_ ? \mchip.dut.memory.M[89] [2] : \mchip.dut.memory.M[88] [2];
  assign _0703_ = _0259_ ? _0701_ : _0702_;
  assign _0704_ = _0268_ ? _0700_ : _0703_;
  assign _0705_ = _0254_ ? \mchip.dut.memory.M[87] [2] : \mchip.dut.memory.M[86] [2];
  assign _0706_ = _0254_ ? \mchip.dut.memory.M[85] [2] : \mchip.dut.memory.M[84] [2];
  assign _0707_ = _0259_ ? _0705_ : _0706_;
  assign _0708_ = _0254_ ? \mchip.dut.memory.M[83] [2] : \mchip.dut.memory.M[82] [2];
  assign _0709_ = _0254_ ? \mchip.dut.memory.M[81] [2] : \mchip.dut.memory.M[80] [2];
  assign _0710_ = _0259_ ? _0708_ : _0709_;
  assign _0711_ = _0268_ ? _0707_ : _0710_;
  assign _0712_ = _0282_ ? _0704_ : _0711_;
  assign _0713_ = _0254_ ? \mchip.dut.memory.M[79] [2] : \mchip.dut.memory.M[78] [2];
  assign _0714_ = _0254_ ? \mchip.dut.memory.M[77] [2] : \mchip.dut.memory.M[76] [2];
  assign _0715_ = _0259_ ? _0713_ : _0714_;
  assign _0716_ = _0254_ ? \mchip.dut.memory.M[75] [2] : \mchip.dut.memory.M[74] [2];
  assign _0717_ = _0254_ ? \mchip.dut.memory.M[73] [2] : \mchip.dut.memory.M[72] [2];
  assign _0718_ = _0259_ ? _0716_ : _0717_;
  assign _0719_ = _0268_ ? _0715_ : _0718_;
  assign _0720_ = _0254_ ? \mchip.dut.memory.M[71] [2] : \mchip.dut.memory.M[70] [2];
  assign _0721_ = _0254_ ? \mchip.dut.memory.M[69] [2] : \mchip.dut.memory.M[68] [2];
  assign _0722_ = _0259_ ? _0720_ : _0721_;
  assign _0723_ = _0254_ ? \mchip.dut.memory.M[67] [2] : \mchip.dut.memory.M[66] [2];
  assign _0724_ = _0254_ ? \mchip.dut.memory.M[65] [2] : \mchip.dut.memory.M[64] [2];
  assign _0725_ = _0259_ ? _0723_ : _0724_;
  assign _0726_ = _0268_ ? _0722_ : _0725_;
  assign _0727_ = _0282_ ? _0719_ : _0726_;
  assign _0728_ = _0305_ ? _0712_ : _0727_;
  assign _0729_ = _0342_ ? _0697_ : _0728_;
  assign _0730_ = _0254_ ? \mchip.dut.memory.M[63] [2] : \mchip.dut.memory.M[62] [2];
  assign _0731_ = _0254_ ? \mchip.dut.memory.M[61] [2] : \mchip.dut.memory.M[60] [2];
  assign _0732_ = _0259_ ? _0730_ : _0731_;
  assign _0733_ = _0254_ ? \mchip.dut.memory.M[59] [2] : \mchip.dut.memory.M[58] [2];
  assign _0734_ = _0254_ ? \mchip.dut.memory.M[57] [2] : \mchip.dut.memory.M[56] [2];
  assign _0735_ = _0259_ ? _0733_ : _0734_;
  assign _0736_ = _0268_ ? _0732_ : _0735_;
  assign _0737_ = _0254_ ? \mchip.dut.memory.M[55] [2] : \mchip.dut.memory.M[54] [2];
  assign _0738_ = _0254_ ? \mchip.dut.memory.M[53] [2] : \mchip.dut.memory.M[52] [2];
  assign _0739_ = _0259_ ? _0737_ : _0738_;
  assign _0740_ = _0254_ ? \mchip.dut.memory.M[51] [2] : \mchip.dut.memory.M[50] [2];
  assign _0741_ = _0254_ ? \mchip.dut.memory.M[49] [2] : \mchip.dut.memory.M[48] [2];
  assign _0742_ = _0259_ ? _0740_ : _0741_;
  assign _0743_ = _0268_ ? _0739_ : _0742_;
  assign _0744_ = _0282_ ? _0736_ : _0743_;
  assign _0745_ = _0254_ ? \mchip.dut.memory.M[47] [2] : \mchip.dut.memory.M[46] [2];
  assign _0746_ = _0254_ ? \mchip.dut.memory.M[45] [2] : \mchip.dut.memory.M[44] [2];
  assign _0747_ = _0259_ ? _0745_ : _0746_;
  assign _0748_ = _0254_ ? \mchip.dut.memory.M[43] [2] : \mchip.dut.memory.M[42] [2];
  assign _0749_ = _0254_ ? \mchip.dut.memory.M[41] [2] : \mchip.dut.memory.M[40] [2];
  assign _0750_ = _0259_ ? _0748_ : _0749_;
  assign _0751_ = _0268_ ? _0747_ : _0750_;
  assign _0752_ = _0254_ ? \mchip.dut.memory.M[39] [2] : \mchip.dut.memory.M[38] [2];
  assign _0753_ = _0254_ ? \mchip.dut.memory.M[37] [2] : \mchip.dut.memory.M[36] [2];
  assign _0754_ = _0259_ ? _0752_ : _0753_;
  assign _0755_ = _0254_ ? \mchip.dut.memory.M[35] [2] : \mchip.dut.memory.M[34] [2];
  assign _0756_ = _0254_ ? \mchip.dut.memory.M[33] [2] : \mchip.dut.memory.M[32] [2];
  assign _0757_ = _0259_ ? _0755_ : _0756_;
  assign _0758_ = _0268_ ? _0754_ : _0757_;
  assign _0759_ = _0282_ ? _0751_ : _0758_;
  assign _0760_ = _0305_ ? _0744_ : _0759_;
  assign _0761_ = _0254_ ? \mchip.dut.memory.M[31] [2] : \mchip.dut.memory.M[30] [2];
  assign _0762_ = _0254_ ? \mchip.dut.memory.M[29] [2] : \mchip.dut.memory.M[28] [2];
  assign _0763_ = _0259_ ? _0761_ : _0762_;
  assign _0764_ = _0254_ ? \mchip.dut.memory.M[27] [2] : \mchip.dut.memory.M[26] [2];
  assign _0765_ = _0254_ ? \mchip.dut.memory.M[25] [2] : \mchip.dut.memory.M[24] [2];
  assign _0766_ = _0259_ ? _0764_ : _0765_;
  assign _0767_ = _0268_ ? _0763_ : _0766_;
  assign _0768_ = _0254_ ? \mchip.dut.memory.M[23] [2] : \mchip.dut.memory.M[22] [2];
  assign _0769_ = _0254_ ? \mchip.dut.memory.M[21] [2] : \mchip.dut.memory.M[20] [2];
  assign _0770_ = _0259_ ? _0768_ : _0769_;
  assign _0771_ = _0254_ ? \mchip.dut.memory.M[19] [2] : \mchip.dut.memory.M[18] [2];
  assign _0772_ = _0254_ ? \mchip.dut.memory.M[17] [2] : \mchip.dut.memory.M[16] [2];
  assign _0773_ = _0259_ ? _0771_ : _0772_;
  assign _0774_ = _0268_ ? _0770_ : _0773_;
  assign _0775_ = _0282_ ? _0767_ : _0774_;
  assign _0776_ = _0254_ ? \mchip.dut.memory.M[15] [2] : \mchip.dut.memory.M[14] [2];
  assign _0777_ = _0254_ ? \mchip.dut.memory.M[13] [2] : \mchip.dut.memory.M[12] [2];
  assign _0778_ = _0259_ ? _0776_ : _0777_;
  assign _0779_ = _0254_ ? \mchip.dut.memory.M[11] [2] : \mchip.dut.memory.M[10] [2];
  assign _0780_ = _0254_ ? \mchip.dut.memory.M[9] [2] : \mchip.dut.memory.M[8] [2];
  assign _0781_ = _0259_ ? _0779_ : _0780_;
  assign _0782_ = _0268_ ? _0778_ : _0781_;
  assign _0783_ = _0254_ ? \mchip.dut.memory.M[7] [2] : \mchip.dut.memory.M[6] [2];
  assign _0784_ = _0254_ ? \mchip.dut.memory.M[5] [2] : \mchip.dut.memory.M[4] [2];
  assign _0785_ = _0259_ ? _0783_ : _0784_;
  assign _0786_ = _0254_ ? \mchip.dut.memory.M[3] [2] : \mchip.dut.memory.M[2] [2];
  assign _0787_ = _0254_ ? \mchip.dut.memory.M[1] [2] : \mchip.dut.memory.M[0] [2];
  assign _0788_ = _0259_ ? _0786_ : _0787_;
  assign _0789_ = _0268_ ? _0785_ : _0788_;
  assign _0790_ = _0282_ ? _0782_ : _0789_;
  assign _0791_ = _0305_ ? _0775_ : _0790_;
  assign _0792_ = _0342_ ? _0760_ : _0791_;
  assign \mchip.dut.demux.I [2] = _0412_ ? _0729_ : _0792_;
  assign _0793_ = _0254_ ? \mchip.dut.memory.M[127] [3] : \mchip.dut.memory.M[126] [3];
  assign _0794_ = _0254_ ? \mchip.dut.memory.M[125] [3] : \mchip.dut.memory.M[124] [3];
  assign _0795_ = _0259_ ? _0793_ : _0794_;
  assign _0796_ = _0254_ ? \mchip.dut.memory.M[123] [3] : \mchip.dut.memory.M[122] [3];
  assign _0797_ = _0254_ ? \mchip.dut.memory.M[121] [3] : \mchip.dut.memory.M[120] [3];
  assign _0798_ = _0259_ ? _0796_ : _0797_;
  assign _0799_ = _0268_ ? _0795_ : _0798_;
  assign _0800_ = _0254_ ? \mchip.dut.memory.M[119] [3] : \mchip.dut.memory.M[118] [3];
  assign _0801_ = _0254_ ? \mchip.dut.memory.M[117] [3] : \mchip.dut.memory.M[116] [3];
  assign _0802_ = _0259_ ? _0800_ : _0801_;
  assign _0803_ = _0254_ ? \mchip.dut.memory.M[115] [3] : \mchip.dut.memory.M[114] [3];
  assign _0804_ = _0254_ ? \mchip.dut.memory.M[113] [3] : \mchip.dut.memory.M[112] [3];
  assign _0805_ = _0259_ ? _0803_ : _0804_;
  assign _0806_ = _0268_ ? _0802_ : _0805_;
  assign _0807_ = _0282_ ? _0799_ : _0806_;
  assign _0808_ = _0254_ ? \mchip.dut.memory.M[111] [3] : \mchip.dut.memory.M[110] [3];
  assign _0809_ = _0254_ ? \mchip.dut.memory.M[109] [3] : \mchip.dut.memory.M[108] [3];
  assign _0810_ = _0259_ ? _0808_ : _0809_;
  assign _0811_ = _0254_ ? \mchip.dut.memory.M[107] [3] : \mchip.dut.memory.M[106] [3];
  assign _0812_ = _0254_ ? \mchip.dut.memory.M[105] [3] : \mchip.dut.memory.M[104] [3];
  assign _0813_ = _0259_ ? _0811_ : _0812_;
  assign _0814_ = _0268_ ? _0810_ : _0813_;
  assign _0815_ = _0254_ ? \mchip.dut.memory.M[103] [3] : \mchip.dut.memory.M[102] [3];
  assign _0816_ = _0254_ ? \mchip.dut.memory.M[101] [3] : \mchip.dut.memory.M[100] [3];
  assign _0817_ = _0259_ ? _0815_ : _0816_;
  assign _0818_ = _0254_ ? \mchip.dut.memory.M[99] [3] : \mchip.dut.memory.M[98] [3];
  assign _0819_ = _0254_ ? \mchip.dut.memory.M[97] [3] : \mchip.dut.memory.M[96] [3];
  assign _0820_ = _0259_ ? _0818_ : _0819_;
  assign _0821_ = _0268_ ? _0817_ : _0820_;
  assign _0822_ = _0282_ ? _0814_ : _0821_;
  assign _0823_ = _0305_ ? _0807_ : _0822_;
  assign _0824_ = _0254_ ? \mchip.dut.memory.M[95] [3] : \mchip.dut.memory.M[94] [3];
  assign _0825_ = _0254_ ? \mchip.dut.memory.M[93] [3] : \mchip.dut.memory.M[92] [3];
  assign _0826_ = _0259_ ? _0824_ : _0825_;
  assign _0827_ = _0254_ ? \mchip.dut.memory.M[91] [3] : \mchip.dut.memory.M[90] [3];
  assign _0828_ = _0254_ ? \mchip.dut.memory.M[89] [3] : \mchip.dut.memory.M[88] [3];
  assign _0829_ = _0259_ ? _0827_ : _0828_;
  assign _0830_ = _0268_ ? _0826_ : _0829_;
  assign _0831_ = _0254_ ? \mchip.dut.memory.M[87] [3] : \mchip.dut.memory.M[86] [3];
  assign _0832_ = _0254_ ? \mchip.dut.memory.M[85] [3] : \mchip.dut.memory.M[84] [3];
  assign _0833_ = _0259_ ? _0831_ : _0832_;
  assign _0834_ = _0254_ ? \mchip.dut.memory.M[83] [3] : \mchip.dut.memory.M[82] [3];
  assign _0835_ = _0254_ ? \mchip.dut.memory.M[81] [3] : \mchip.dut.memory.M[80] [3];
  assign _0836_ = _0259_ ? _0834_ : _0835_;
  assign _0837_ = _0268_ ? _0833_ : _0836_;
  assign _0838_ = _0282_ ? _0830_ : _0837_;
  assign _0839_ = _0254_ ? \mchip.dut.memory.M[79] [3] : \mchip.dut.memory.M[78] [3];
  assign _0840_ = _0254_ ? \mchip.dut.memory.M[77] [3] : \mchip.dut.memory.M[76] [3];
  assign _0841_ = _0259_ ? _0839_ : _0840_;
  assign _0842_ = _0254_ ? \mchip.dut.memory.M[75] [3] : \mchip.dut.memory.M[74] [3];
  assign _0843_ = _0254_ ? \mchip.dut.memory.M[73] [3] : \mchip.dut.memory.M[72] [3];
  assign _0844_ = _0259_ ? _0842_ : _0843_;
  assign _0845_ = _0268_ ? _0841_ : _0844_;
  assign _0846_ = _0254_ ? \mchip.dut.memory.M[71] [3] : \mchip.dut.memory.M[70] [3];
  assign _0847_ = _0254_ ? \mchip.dut.memory.M[69] [3] : \mchip.dut.memory.M[68] [3];
  assign _0848_ = _0259_ ? _0846_ : _0847_;
  assign _0849_ = _0254_ ? \mchip.dut.memory.M[67] [3] : \mchip.dut.memory.M[66] [3];
  assign _0850_ = _0254_ ? \mchip.dut.memory.M[65] [3] : \mchip.dut.memory.M[64] [3];
  assign _0851_ = _0259_ ? _0849_ : _0850_;
  assign _0852_ = _0268_ ? _0848_ : _0851_;
  assign _0853_ = _0282_ ? _0845_ : _0852_;
  assign _0854_ = _0305_ ? _0838_ : _0853_;
  assign _0855_ = _0342_ ? _0823_ : _0854_;
  assign _0856_ = _0254_ ? \mchip.dut.memory.M[63] [3] : \mchip.dut.memory.M[62] [3];
  assign _0857_ = _0254_ ? \mchip.dut.memory.M[61] [3] : \mchip.dut.memory.M[60] [3];
  assign _0858_ = _0259_ ? _0856_ : _0857_;
  assign _0859_ = _0254_ ? \mchip.dut.memory.M[59] [3] : \mchip.dut.memory.M[58] [3];
  assign _0860_ = _0254_ ? \mchip.dut.memory.M[57] [3] : \mchip.dut.memory.M[56] [3];
  assign _0861_ = _0259_ ? _0859_ : _0860_;
  assign _0862_ = _0268_ ? _0858_ : _0861_;
  assign _0863_ = _0254_ ? \mchip.dut.memory.M[55] [3] : \mchip.dut.memory.M[54] [3];
  assign _0864_ = _0254_ ? \mchip.dut.memory.M[53] [3] : \mchip.dut.memory.M[52] [3];
  assign _0865_ = _0259_ ? _0863_ : _0864_;
  assign _0866_ = _0254_ ? \mchip.dut.memory.M[51] [3] : \mchip.dut.memory.M[50] [3];
  assign _0867_ = _0254_ ? \mchip.dut.memory.M[49] [3] : \mchip.dut.memory.M[48] [3];
  assign _0868_ = _0259_ ? _0866_ : _0867_;
  assign _0869_ = _0268_ ? _0865_ : _0868_;
  assign _0870_ = _0282_ ? _0862_ : _0869_;
  assign _0871_ = _0254_ ? \mchip.dut.memory.M[47] [3] : \mchip.dut.memory.M[46] [3];
  assign _0872_ = _0254_ ? \mchip.dut.memory.M[45] [3] : \mchip.dut.memory.M[44] [3];
  assign _0873_ = _0259_ ? _0871_ : _0872_;
  assign _0874_ = _0254_ ? \mchip.dut.memory.M[43] [3] : \mchip.dut.memory.M[42] [3];
  assign _0875_ = _0254_ ? \mchip.dut.memory.M[41] [3] : \mchip.dut.memory.M[40] [3];
  assign _0876_ = _0259_ ? _0874_ : _0875_;
  assign _0877_ = _0268_ ? _0873_ : _0876_;
  assign _0878_ = _0254_ ? \mchip.dut.memory.M[39] [3] : \mchip.dut.memory.M[38] [3];
  assign _0879_ = _0254_ ? \mchip.dut.memory.M[37] [3] : \mchip.dut.memory.M[36] [3];
  assign _0880_ = _0259_ ? _0878_ : _0879_;
  assign _0881_ = _0254_ ? \mchip.dut.memory.M[35] [3] : \mchip.dut.memory.M[34] [3];
  assign _0882_ = _0254_ ? \mchip.dut.memory.M[33] [3] : \mchip.dut.memory.M[32] [3];
  assign _0883_ = _0259_ ? _0881_ : _0882_;
  assign _0884_ = _0268_ ? _0880_ : _0883_;
  assign _0885_ = _0282_ ? _0877_ : _0884_;
  assign _0886_ = _0305_ ? _0870_ : _0885_;
  assign _0887_ = _0254_ ? \mchip.dut.memory.M[31] [3] : \mchip.dut.memory.M[30] [3];
  assign _0888_ = _0254_ ? \mchip.dut.memory.M[29] [3] : \mchip.dut.memory.M[28] [3];
  assign _0889_ = _0259_ ? _0887_ : _0888_;
  assign _0890_ = _0254_ ? \mchip.dut.memory.M[27] [3] : \mchip.dut.memory.M[26] [3];
  assign _0891_ = _0254_ ? \mchip.dut.memory.M[25] [3] : \mchip.dut.memory.M[24] [3];
  assign _0892_ = _0259_ ? _0890_ : _0891_;
  assign _0893_ = _0268_ ? _0889_ : _0892_;
  assign _0894_ = _0254_ ? \mchip.dut.memory.M[23] [3] : \mchip.dut.memory.M[22] [3];
  assign _0895_ = _0254_ ? \mchip.dut.memory.M[21] [3] : \mchip.dut.memory.M[20] [3];
  assign _0896_ = _0259_ ? _0894_ : _0895_;
  assign _0897_ = _0254_ ? \mchip.dut.memory.M[19] [3] : \mchip.dut.memory.M[18] [3];
  assign _0898_ = _0254_ ? \mchip.dut.memory.M[17] [3] : \mchip.dut.memory.M[16] [3];
  assign _0899_ = _0259_ ? _0897_ : _0898_;
  assign _0900_ = _0268_ ? _0896_ : _0899_;
  assign _0901_ = _0282_ ? _0893_ : _0900_;
  assign _0902_ = _0254_ ? \mchip.dut.memory.M[15] [3] : \mchip.dut.memory.M[14] [3];
  assign _0903_ = _0254_ ? \mchip.dut.memory.M[13] [3] : \mchip.dut.memory.M[12] [3];
  assign _0904_ = _0259_ ? _0902_ : _0903_;
  assign _0905_ = _0254_ ? \mchip.dut.memory.M[11] [3] : \mchip.dut.memory.M[10] [3];
  assign _0906_ = _0254_ ? \mchip.dut.memory.M[9] [3] : \mchip.dut.memory.M[8] [3];
  assign _0907_ = _0259_ ? _0905_ : _0906_;
  assign _0908_ = _0268_ ? _0904_ : _0907_;
  assign _0909_ = _0254_ ? \mchip.dut.memory.M[7] [3] : \mchip.dut.memory.M[6] [3];
  assign _0910_ = _0254_ ? \mchip.dut.memory.M[5] [3] : \mchip.dut.memory.M[4] [3];
  assign _0911_ = _0259_ ? _0909_ : _0910_;
  assign _0912_ = _0254_ ? \mchip.dut.memory.M[3] [3] : \mchip.dut.memory.M[2] [3];
  assign _0913_ = _0254_ ? \mchip.dut.memory.M[1] [3] : \mchip.dut.memory.M[0] [3];
  assign _0914_ = _0259_ ? _0912_ : _0913_;
  assign _0915_ = _0268_ ? _0911_ : _0914_;
  assign _0916_ = _0282_ ? _0908_ : _0915_;
  assign _0917_ = _0305_ ? _0901_ : _0916_;
  assign _0918_ = _0342_ ? _0886_ : _0917_;
  assign \mchip.dut.demux.I [3] = _0412_ ? _0855_ : _0918_;
  assign _0919_ = _0254_ ? \mchip.dut.memory.M[127] [4] : \mchip.dut.memory.M[126] [4];
  assign _0920_ = _0254_ ? \mchip.dut.memory.M[125] [4] : \mchip.dut.memory.M[124] [4];
  assign _0921_ = _0259_ ? _0919_ : _0920_;
  assign _0922_ = _0254_ ? \mchip.dut.memory.M[123] [4] : \mchip.dut.memory.M[122] [4];
  assign _0923_ = _0254_ ? \mchip.dut.memory.M[121] [4] : \mchip.dut.memory.M[120] [4];
  assign _0924_ = _0259_ ? _0922_ : _0923_;
  assign _0925_ = _0268_ ? _0921_ : _0924_;
  assign _0926_ = _0254_ ? \mchip.dut.memory.M[119] [4] : \mchip.dut.memory.M[118] [4];
  assign _0927_ = _0254_ ? \mchip.dut.memory.M[117] [4] : \mchip.dut.memory.M[116] [4];
  assign _0928_ = _0259_ ? _0926_ : _0927_;
  assign _0929_ = _0254_ ? \mchip.dut.memory.M[115] [4] : \mchip.dut.memory.M[114] [4];
  assign _0930_ = _0254_ ? \mchip.dut.memory.M[113] [4] : \mchip.dut.memory.M[112] [4];
  assign _0931_ = _0259_ ? _0929_ : _0930_;
  assign _0932_ = _0268_ ? _0928_ : _0931_;
  assign _0933_ = _0282_ ? _0925_ : _0932_;
  assign _0934_ = _0254_ ? \mchip.dut.memory.M[111] [4] : \mchip.dut.memory.M[110] [4];
  assign _0935_ = _0254_ ? \mchip.dut.memory.M[109] [4] : \mchip.dut.memory.M[108] [4];
  assign _0936_ = _0259_ ? _0934_ : _0935_;
  assign _0937_ = _0254_ ? \mchip.dut.memory.M[107] [4] : \mchip.dut.memory.M[106] [4];
  assign _0938_ = _0254_ ? \mchip.dut.memory.M[105] [4] : \mchip.dut.memory.M[104] [4];
  assign _0939_ = _0259_ ? _0937_ : _0938_;
  assign _0940_ = _0268_ ? _0936_ : _0939_;
  assign _0941_ = _0254_ ? \mchip.dut.memory.M[103] [4] : \mchip.dut.memory.M[102] [4];
  assign _0942_ = _0254_ ? \mchip.dut.memory.M[101] [4] : \mchip.dut.memory.M[100] [4];
  assign _0943_ = _0259_ ? _0941_ : _0942_;
  assign _0944_ = _0254_ ? \mchip.dut.memory.M[99] [4] : \mchip.dut.memory.M[98] [4];
  assign _0945_ = _0254_ ? \mchip.dut.memory.M[97] [4] : \mchip.dut.memory.M[96] [4];
  assign _0946_ = _0259_ ? _0944_ : _0945_;
  assign _0947_ = _0268_ ? _0943_ : _0946_;
  assign _0948_ = _0282_ ? _0940_ : _0947_;
  assign _0949_ = _0305_ ? _0933_ : _0948_;
  assign _0950_ = _0254_ ? \mchip.dut.memory.M[95] [4] : \mchip.dut.memory.M[94] [4];
  assign _0951_ = _0254_ ? \mchip.dut.memory.M[93] [4] : \mchip.dut.memory.M[92] [4];
  assign _0952_ = _0259_ ? _0950_ : _0951_;
  assign _0953_ = _0254_ ? \mchip.dut.memory.M[91] [4] : \mchip.dut.memory.M[90] [4];
  assign _0954_ = _0254_ ? \mchip.dut.memory.M[89] [4] : \mchip.dut.memory.M[88] [4];
  assign _0955_ = _0259_ ? _0953_ : _0954_;
  assign _0956_ = _0268_ ? _0952_ : _0955_;
  assign _0957_ = _0254_ ? \mchip.dut.memory.M[87] [4] : \mchip.dut.memory.M[86] [4];
  assign _0958_ = _0254_ ? \mchip.dut.memory.M[85] [4] : \mchip.dut.memory.M[84] [4];
  assign _0959_ = _0259_ ? _0957_ : _0958_;
  assign _0960_ = _0254_ ? \mchip.dut.memory.M[83] [4] : \mchip.dut.memory.M[82] [4];
  assign _0961_ = _0254_ ? \mchip.dut.memory.M[81] [4] : \mchip.dut.memory.M[80] [4];
  assign _0962_ = _0259_ ? _0960_ : _0961_;
  assign _0963_ = _0268_ ? _0959_ : _0962_;
  assign _0964_ = _0282_ ? _0956_ : _0963_;
  assign _0965_ = _0254_ ? \mchip.dut.memory.M[79] [4] : \mchip.dut.memory.M[78] [4];
  assign _0966_ = _0254_ ? \mchip.dut.memory.M[77] [4] : \mchip.dut.memory.M[76] [4];
  assign _0967_ = _0259_ ? _0965_ : _0966_;
  assign _0968_ = _0254_ ? \mchip.dut.memory.M[75] [4] : \mchip.dut.memory.M[74] [4];
  assign _0969_ = _0254_ ? \mchip.dut.memory.M[73] [4] : \mchip.dut.memory.M[72] [4];
  assign _0970_ = _0259_ ? _0968_ : _0969_;
  assign _0971_ = _0268_ ? _0967_ : _0970_;
  assign _0972_ = _0254_ ? \mchip.dut.memory.M[71] [4] : \mchip.dut.memory.M[70] [4];
  assign _0973_ = _0254_ ? \mchip.dut.memory.M[69] [4] : \mchip.dut.memory.M[68] [4];
  assign _0974_ = _0259_ ? _0972_ : _0973_;
  assign _0975_ = _0254_ ? \mchip.dut.memory.M[67] [4] : \mchip.dut.memory.M[66] [4];
  assign _0976_ = _0254_ ? \mchip.dut.memory.M[65] [4] : \mchip.dut.memory.M[64] [4];
  assign _0977_ = _0259_ ? _0975_ : _0976_;
  assign _0978_ = _0268_ ? _0974_ : _0977_;
  assign _0979_ = _0282_ ? _0971_ : _0978_;
  assign _0980_ = _0305_ ? _0964_ : _0979_;
  assign _0981_ = _0342_ ? _0949_ : _0980_;
  assign _0982_ = _0254_ ? \mchip.dut.memory.M[63] [4] : \mchip.dut.memory.M[62] [4];
  assign _0983_ = _0254_ ? \mchip.dut.memory.M[61] [4] : \mchip.dut.memory.M[60] [4];
  assign _0984_ = _0259_ ? _0982_ : _0983_;
  assign _0985_ = _0254_ ? \mchip.dut.memory.M[59] [4] : \mchip.dut.memory.M[58] [4];
  assign _0986_ = _0254_ ? \mchip.dut.memory.M[57] [4] : \mchip.dut.memory.M[56] [4];
  assign _0987_ = _0259_ ? _0985_ : _0986_;
  assign _0988_ = _0268_ ? _0984_ : _0987_;
  assign _0989_ = _0254_ ? \mchip.dut.memory.M[55] [4] : \mchip.dut.memory.M[54] [4];
  assign _0990_ = _0254_ ? \mchip.dut.memory.M[53] [4] : \mchip.dut.memory.M[52] [4];
  assign _0991_ = _0259_ ? _0989_ : _0990_;
  assign _0992_ = _0254_ ? \mchip.dut.memory.M[51] [4] : \mchip.dut.memory.M[50] [4];
  assign _0993_ = _0254_ ? \mchip.dut.memory.M[49] [4] : \mchip.dut.memory.M[48] [4];
  assign _0994_ = _0259_ ? _0992_ : _0993_;
  assign _0995_ = _0268_ ? _0991_ : _0994_;
  assign _0996_ = _0282_ ? _0988_ : _0995_;
  assign _0997_ = _0254_ ? \mchip.dut.memory.M[47] [4] : \mchip.dut.memory.M[46] [4];
  assign _0998_ = _0254_ ? \mchip.dut.memory.M[45] [4] : \mchip.dut.memory.M[44] [4];
  assign _0999_ = _0259_ ? _0997_ : _0998_;
  assign _1000_ = _0254_ ? \mchip.dut.memory.M[43] [4] : \mchip.dut.memory.M[42] [4];
  assign _1001_ = _0254_ ? \mchip.dut.memory.M[41] [4] : \mchip.dut.memory.M[40] [4];
  assign _1002_ = _0259_ ? _1000_ : _1001_;
  assign _1003_ = _0268_ ? _0999_ : _1002_;
  assign _1004_ = _0254_ ? \mchip.dut.memory.M[39] [4] : \mchip.dut.memory.M[38] [4];
  assign _1005_ = _0254_ ? \mchip.dut.memory.M[37] [4] : \mchip.dut.memory.M[36] [4];
  assign _1006_ = _0259_ ? _1004_ : _1005_;
  assign _1007_ = _0254_ ? \mchip.dut.memory.M[35] [4] : \mchip.dut.memory.M[34] [4];
  assign _1008_ = _0254_ ? \mchip.dut.memory.M[33] [4] : \mchip.dut.memory.M[32] [4];
  assign _1009_ = _0259_ ? _1007_ : _1008_;
  assign _1010_ = _0268_ ? _1006_ : _1009_;
  assign _1011_ = _0282_ ? _1003_ : _1010_;
  assign _1012_ = _0305_ ? _0996_ : _1011_;
  assign _1013_ = _0254_ ? \mchip.dut.memory.M[31] [4] : \mchip.dut.memory.M[30] [4];
  assign _1014_ = _0254_ ? \mchip.dut.memory.M[29] [4] : \mchip.dut.memory.M[28] [4];
  assign _1015_ = _0259_ ? _1013_ : _1014_;
  assign _1016_ = _0254_ ? \mchip.dut.memory.M[27] [4] : \mchip.dut.memory.M[26] [4];
  assign _1017_ = _0254_ ? \mchip.dut.memory.M[25] [4] : \mchip.dut.memory.M[24] [4];
  assign _1018_ = _0259_ ? _1016_ : _1017_;
  assign _1019_ = _0268_ ? _1015_ : _1018_;
  assign _1020_ = _0254_ ? \mchip.dut.memory.M[23] [4] : \mchip.dut.memory.M[22] [4];
  assign _1021_ = _0254_ ? \mchip.dut.memory.M[21] [4] : \mchip.dut.memory.M[20] [4];
  assign _1022_ = _0259_ ? _1020_ : _1021_;
  assign _1023_ = _0254_ ? \mchip.dut.memory.M[19] [4] : \mchip.dut.memory.M[18] [4];
  assign _1024_ = _0254_ ? \mchip.dut.memory.M[17] [4] : \mchip.dut.memory.M[16] [4];
  assign _1025_ = _0259_ ? _1023_ : _1024_;
  assign _1026_ = _0268_ ? _1022_ : _1025_;
  assign _1027_ = _0282_ ? _1019_ : _1026_;
  assign _1028_ = _0254_ ? \mchip.dut.memory.M[15] [4] : \mchip.dut.memory.M[14] [4];
  assign _1029_ = _0254_ ? \mchip.dut.memory.M[13] [4] : \mchip.dut.memory.M[12] [4];
  assign _1030_ = _0259_ ? _1028_ : _1029_;
  assign _1031_ = _0254_ ? \mchip.dut.memory.M[11] [4] : \mchip.dut.memory.M[10] [4];
  assign _1032_ = _0254_ ? \mchip.dut.memory.M[9] [4] : \mchip.dut.memory.M[8] [4];
  assign _1033_ = _0259_ ? _1031_ : _1032_;
  assign _1034_ = _0268_ ? _1030_ : _1033_;
  assign _1035_ = _0254_ ? \mchip.dut.memory.M[7] [4] : \mchip.dut.memory.M[6] [4];
  assign _1036_ = _0254_ ? \mchip.dut.memory.M[5] [4] : \mchip.dut.memory.M[4] [4];
  assign _1037_ = _0259_ ? _1035_ : _1036_;
  assign _1038_ = _0254_ ? \mchip.dut.memory.M[3] [4] : \mchip.dut.memory.M[2] [4];
  assign _1039_ = _0254_ ? \mchip.dut.memory.M[1] [4] : \mchip.dut.memory.M[0] [4];
  assign _1040_ = _0259_ ? _1038_ : _1039_;
  assign _1041_ = _0268_ ? _1037_ : _1040_;
  assign _1042_ = _0282_ ? _1034_ : _1041_;
  assign _1043_ = _0305_ ? _1027_ : _1042_;
  assign _1044_ = _0342_ ? _1012_ : _1043_;
  assign \mchip.dut.demux.I [4] = _0412_ ? _0981_ : _1044_;
  assign _1045_ = _0210_ & ~(_0540_);
  assign \mchip.dut.tape_reg.D  = \mchip.dut.direction_reg.Q [0] ? \mchip.dut.display_reg.Q [1] : _1045_;
  assign _1046_ = ~\mchip.dut.state_addr.Q [0];
  assign _0035_ = \mchip.dut.StateAddr_ld  ? _1045_ : _1046_;
  assign _1047_ = \mchip.dut.state_addr.Q [1] ^ \mchip.dut.state_addr.Q [0];
  assign _1048_ = ~(_1045_ ^ \mchip.dut.next_state.Q [0]);
  assign _0036_ = \mchip.dut.StateAddr_ld  ? _1048_ : _1047_;
  assign _1049_ = \mchip.dut.state_addr.Q [1] & \mchip.dut.state_addr.Q [0];
  assign _1050_ = _1049_ ^ \mchip.dut.state_addr.Q [2];
  assign _1051_ = _1045_ & ~(\mchip.dut.next_state.Q [0]);
  assign _1052_ = \mchip.dut.next_state.Q [1] ^ \mchip.dut.next_state.Q [0];
  assign _1053_ = _1052_ ^ \mchip.dut.next_state.Q [0];
  assign _1054_ = _1053_ ^ _1051_;
  assign _0037_ = \mchip.dut.StateAddr_ld  ? _1054_ : _1050_;
  assign _1055_ = _1049_ & \mchip.dut.state_addr.Q [2];
  assign _1056_ = _1055_ ^ \mchip.dut.state_addr.Q [3];
  assign _1057_ = _1053_ & _1051_;
  assign _1058_ = \mchip.dut.next_state.Q [0] & ~(\mchip.dut.next_state.Q [1]);
  assign _1059_ = \mchip.dut.next_state.Q [1] & \mchip.dut.next_state.Q [0];
  assign _1060_ = ~(\mchip.dut.next_state.Q [2] ^ \mchip.dut.next_state.Q [1]);
  assign _1061_ = _1060_ ^ _1059_;
  assign _1062_ = _1061_ ^ _1058_;
  assign _1063_ = _1062_ ^ _1057_;
  assign _0038_ = \mchip.dut.StateAddr_ld  ? _1063_ : _1056_;
  assign _1064_ = ~(\mchip.dut.state_addr.Q [3] & \mchip.dut.state_addr.Q [2]);
  assign _1065_ = _1049_ & ~(_1064_);
  assign _1066_ = _1065_ ^ \mchip.dut.state_addr.Q [4];
  assign _1067_ = ~(_1062_ & _1053_);
  assign _1068_ = _1051_ & ~(_1067_);
  assign _1069_ = _1060_ & _1059_;
  assign _1070_ = _1061_ & _1058_;
  assign _1071_ = ~(_1070_ | _1069_);
  assign _1072_ = ~(\mchip.dut.next_state.Q [2] | \mchip.dut.next_state.Q [1]);
  assign _1073_ = ~(\mchip.dut.next_state.Q [3] ^ \mchip.dut.next_state.Q [2]);
  assign _1074_ = ~(_1073_ ^ _1072_);
  assign _1075_ = ~_1074_;
  assign _1076_ = _1075_ ^ _1071_;
  assign _1077_ = _1076_ ^ _1068_;
  assign _0039_ = \mchip.dut.StateAddr_ld  ? _1077_ : _1066_;
  assign _1078_ = _1065_ & \mchip.dut.state_addr.Q [4];
  assign _1079_ = _1078_ ^ \mchip.dut.state_addr.Q [5];
  assign _1080_ = ~_1076_;
  assign _1081_ = _1068_ & ~(_1080_);
  assign _1082_ = _1073_ & ~(_1072_);
  assign _1083_ = _1074_ & _1069_;
  assign _1084_ = _1083_ | _1082_;
  assign _1085_ = ~(_1074_ & _1061_);
  assign _1086_ = _1058_ & ~(_1085_);
  assign _1087_ = _1086_ | _1084_;
  assign _1088_ = ~(\mchip.dut.next_state.Q [3] | \mchip.dut.next_state.Q [2]);
  assign _1089_ = ~(\mchip.dut.next_state.Q [4] ^ \mchip.dut.next_state.Q [3]);
  assign _1090_ = ~(_1089_ ^ _1088_);
  assign _1091_ = _1090_ ^ _1087_;
  assign _1092_ = _1091_ ^ _1081_;
  assign _0040_ = \mchip.dut.StateAddr_ld  ? _1092_ : _1079_;
  assign _1093_ = ~(\mchip.dut.state_addr.Q [5] & \mchip.dut.state_addr.Q [4]);
  assign _1094_ = _1065_ & ~(_1093_);
  assign _1095_ = _1094_ ^ \mchip.dut.state_addr.Q [6];
  assign _1096_ = _1091_ & ~(_1080_);
  assign _1097_ = ~(_1096_ & _1068_);
  assign _1098_ = \mchip.dut.next_state.Q [4] | ~(\mchip.dut.next_state.Q [3]);
  assign _1099_ = _1088_ | ~(_1089_);
  assign _1100_ = _1090_ & _1087_;
  assign _1101_ = _1099_ & ~(_1100_);
  assign _1102_ = _1101_ ^ _1098_;
  assign _1103_ = _1102_ ^ _1097_;
  assign _0041_ = \mchip.dut.StateAddr_ld  ? _1103_ : _1095_;
  assign _0042_ = _0227_ ? \mchip.sync3.sync  : _1384_;
  assign _1104_ = ~(_0225_ ^ \mchip.dut.tape_addr.Q [1]);
  assign _1105_ = _1104_ ^ \mchip.dut.tape_addr.Q [0];
  assign _0043_ = _0227_ ? \mchip.sync4.sync  : _1105_;
  assign _1106_ = \mchip.dut.tape_addr.Q [1] & ~(_0225_);
  assign _1107_ = _1104_ & ~(_1384_);
  assign _1108_ = _1107_ | _1106_;
  assign _1109_ = _0225_ ^ _0264_;
  assign _1110_ = _1109_ ^ _1108_;
  assign _0044_ = _0227_ ? \mchip.sync5.sync  : _1110_;
  assign _1111_ = \mchip.dut.tape_addr.Q [2] & ~(_0225_);
  assign _1112_ = _1109_ & _1108_;
  assign _1113_ = _1112_ | _1111_;
  assign _1114_ = _0225_ ^ _0277_;
  assign _1115_ = _1114_ ^ _1113_;
  assign _0045_ = _0227_ ? \mchip.sync6.sync  : _1115_;
  assign _1116_ = \mchip.dut.tape_addr.Q [3] & ~(_0225_);
  assign _1117_ = _1114_ & _1111_;
  assign _1118_ = _1117_ | _1116_;
  assign _1119_ = ~(_1114_ & _1109_);
  assign _1120_ = _1108_ & ~(_1119_);
  assign _1121_ = _1120_ | _1118_;
  assign _1122_ = ~(_0225_ ^ \mchip.dut.tape_addr.Q [4]);
  assign _1123_ = _1122_ ^ _1121_;
  assign _0046_ = _0227_ ? \mchip.sync7.sync  : _1123_;
  assign _1124_ = \mchip.dut.tape_addr.Q [4] & ~(_0225_);
  assign _1125_ = _1122_ & _1121_;
  assign _1126_ = _1125_ | _1124_;
  assign _1127_ = ~(_0225_ ^ \mchip.dut.tape_addr.Q [5]);
  assign _1128_ = _1127_ ^ _1126_;
  assign _0047_ = _0227_ ? \mchip.sync8.sync  : _1128_;
  assign _1129_ = \mchip.dut.tape_addr.Q [5] & ~(_0225_);
  assign _1130_ = _1127_ & _1124_;
  assign _1131_ = _1130_ | _1129_;
  assign _1132_ = ~(_1127_ & _1122_);
  assign _1133_ = _1121_ & ~(_1132_);
  assign _1134_ = _1133_ | _1131_;
  assign _1135_ = _0225_ ^ \mchip.dut.tape_addr.Q [6];
  assign _1136_ = ~(_1135_ ^ _1134_);
  assign _0048_ = _1136_ & ~(_0227_);
  assign _1137_ = _0197_ & ~(_0201_);
  assign \mchip.dut.demux.Y2 [0] = _1137_ & ~(_0540_);
  assign _1138_ = ~\mchip.dut.display_reg.Q [0];
  assign _1139_ = \mchip.dut.tape_reg.Q  & ~(\mchip.dut.direction_reg.Q [0]);
  assign _1140_ = _1355_ ? _1139_ : \mchip.dut.display_reg.Q [1];
  assign _0024_ = _1348_ ? _1138_ : _1140_;
  assign _0026_ = _1355_ ? \mchip.dut.display_reg.Q [0] : \mchip.dut.display_reg.Q [2];
  assign _0027_ = _1355_ ? \mchip.dut.display_reg.Q [1] : \mchip.dut.display_reg.Q [3];
  assign _0028_ = _1355_ ? \mchip.dut.display_reg.Q [2] : \mchip.dut.display_reg.Q [4];
  assign _0029_ = _1355_ ? \mchip.dut.display_reg.Q [3] : \mchip.dut.display_reg.Q [5];
  assign _0030_ = _1355_ ? \mchip.dut.display_reg.Q [4] : \mchip.dut.display_reg.Q [6];
  assign _0031_ = _1355_ ? \mchip.dut.display_reg.Q [5] : \mchip.dut.display_reg.Q [7];
  assign _0032_ = _1355_ ? \mchip.dut.display_reg.Q [6] : \mchip.dut.display_reg.Q [8];
  assign _0033_ = _1355_ ? \mchip.dut.display_reg.Q [7] : \mchip.dut.display_reg.Q [9];
  assign _0034_ = _1355_ ? \mchip.dut.display_reg.Q [8] : \mchip.dut.display_reg.Q [10];
  assign _0025_ = _1355_ ? \mchip.dut.display_reg.Q [9] : _1139_;
  assign \mchip.dut.memory.data_in [0] = _0235_ ? \mchip.sync3.sync  : \mchip.dut.data_reg.Q ;
  assign \mchip.dut.memory.data_in [1] = _0235_ & \mchip.sync4.sync ;
  assign \mchip.dut.memory.data_in [2] = _0235_ & \mchip.sync5.sync ;
  assign \mchip.dut.memory.data_in [3] = _0235_ & \mchip.sync6.sync ;
  assign \mchip.dut.memory.data_in [4] = _0235_ & \mchip.sync7.sync ;
  assign _1141_ = _0198_ | \mchip.dut.fsm.currState [0];
  assign _1142_ = ~(\mchip.dut.fsm.currState [3] | \mchip.dut.fsm.currState [0]);
  assign \mchip.dut.NextState_en  = _1141_ & ~(_1142_);
  assign _1143_ = _1349_ & ~(_0241_);
  assign \mchip.dut.InputAddr_en  = _0250_ & ~(_1143_);
  assign _1144_ = _0249_ | _1348_;
  assign _1145_ = _1144_ | _0235_;
  assign _1146_ = ~(\mchip.dut.fsm.currState [1] | \mchip.dut.fsm.currState [5]);
  assign _1147_ = ~(_0234_ & _1349_);
  assign _1148_ = _1146_ & ~(_1147_);
  assign _1149_ = _1145_ & ~(_1148_);
  assign _1150_ = ~(_0412_ & _0342_);
  assign _1151_ = _0305_ | _0282_;
  assign _1152_ = _1151_ | _1150_;
  assign _1153_ = ~(_0268_ & _0259_);
  assign _1154_ = _1153_ | _0254_;
  assign _1155_ = _1154_ | _1152_;
  assign _0052_ = _1149_ & ~(_1155_);
  assign _1156_ = ~_0254_;
  assign _1157_ = _0259_ | ~(_0268_);
  assign _1158_ = _1157_ | _1156_;
  assign _1159_ = _1158_ | _1152_;
  assign _0051_ = _1149_ & ~(_1159_);
  assign _1160_ = _1153_ | _1156_;
  assign _1161_ = _1160_ | _1152_;
  assign _0053_ = _1149_ & ~(_1161_);
  assign _1162_ = _0412_ | _0342_;
  assign _1163_ = _1162_ | _1151_;
  assign _1164_ = _0268_ | _0259_;
  assign _1165_ = _1164_ | _0254_;
  assign _1166_ = _1165_ | _1163_;
  assign _0049_ = _1149_ & ~(_1166_);
  assign _1167_ = _1164_ | _1156_;
  assign _1168_ = _1167_ | _1163_;
  assign _0088_ = _1149_ & ~(_1168_);
  assign _1169_ = _0268_ | ~(_0259_);
  assign _1170_ = _1169_ | _0254_;
  assign _1171_ = _1170_ | _1163_;
  assign _0099_ = _1149_ & ~(_1171_);
  assign _1172_ = _1169_ | _1156_;
  assign _1173_ = _1172_ | _1163_;
  assign _0110_ = _1149_ & ~(_1173_);
  assign _1174_ = _1157_ | _0254_;
  assign _1175_ = _1174_ | _1163_;
  assign _0121_ = _1149_ & ~(_1175_);
  assign _1176_ = _1163_ | _1158_;
  assign _0132_ = _1149_ & ~(_1176_);
  assign _1177_ = _1163_ | _1154_;
  assign _0143_ = _1149_ & ~(_1177_);
  assign _1178_ = _1163_ | _1160_;
  assign _0154_ = _1149_ & ~(_1178_);
  assign _1179_ = _0305_ | ~(_0282_);
  assign _1180_ = _1179_ | _1162_;
  assign _1181_ = _1180_ | _1165_;
  assign _0165_ = _1149_ & ~(_1181_);
  assign _1182_ = _1180_ | _1167_;
  assign _0176_ = _1149_ & ~(_1182_);
  assign _1183_ = _1180_ | _1170_;
  assign _0060_ = _1149_ & ~(_1183_);
  assign _1184_ = _1180_ | _1172_;
  assign _0071_ = _1149_ & ~(_1184_);
  assign _1185_ = _1180_ | _1174_;
  assign _0080_ = _1149_ & ~(_1185_);
  assign _1186_ = _1180_ | _1158_;
  assign _0081_ = _1149_ & ~(_1186_);
  assign _1187_ = _1180_ | _1154_;
  assign _0082_ = _1149_ & ~(_1187_);
  assign _1188_ = _1180_ | _1160_;
  assign _0083_ = _1149_ & ~(_1188_);
  assign _1189_ = _0282_ | ~(_0305_);
  assign _1190_ = _1189_ | _1162_;
  assign _1191_ = _1190_ | _1165_;
  assign _0084_ = _1149_ & ~(_1191_);
  assign _1192_ = _1190_ | _1167_;
  assign _0085_ = _1149_ & ~(_1192_);
  assign _1193_ = _1190_ | _1170_;
  assign _0086_ = _1149_ & ~(_1193_);
  assign _1194_ = _1190_ | _1172_;
  assign _0087_ = _1149_ & ~(_1194_);
  assign _1195_ = _1190_ | _1174_;
  assign _0089_ = _1149_ & ~(_1195_);
  assign _1196_ = _1190_ | _1158_;
  assign _0090_ = _1149_ & ~(_1196_);
  assign _1197_ = _1190_ | _1154_;
  assign _0091_ = _1149_ & ~(_1197_);
  assign _1198_ = _1190_ | _1160_;
  assign _0092_ = _1149_ & ~(_1198_);
  assign _1199_ = ~(_0305_ & _0282_);
  assign _1200_ = _1199_ | _1162_;
  assign _1201_ = _1200_ | _1165_;
  assign _0093_ = _1149_ & ~(_1201_);
  assign _1202_ = _1200_ | _1167_;
  assign _0094_ = _1149_ & ~(_1202_);
  assign _1203_ = _1200_ | _1170_;
  assign _0095_ = _1149_ & ~(_1203_);
  assign _1204_ = _1200_ | _1172_;
  assign _0096_ = _1149_ & ~(_1204_);
  assign _1205_ = _1200_ | _1174_;
  assign _0097_ = _1149_ & ~(_1205_);
  assign _1206_ = _1200_ | _1158_;
  assign _0098_ = _1149_ & ~(_1206_);
  assign _1207_ = _1200_ | _1154_;
  assign _0100_ = _1149_ & ~(_1207_);
  assign _1208_ = _1200_ | _1160_;
  assign _0101_ = _1149_ & ~(_1208_);
  assign _1209_ = _0412_ | ~(_0342_);
  assign _1210_ = _1209_ | _1151_;
  assign _1211_ = _1210_ | _1165_;
  assign _0102_ = _1149_ & ~(_1211_);
  assign _1212_ = _1210_ | _1167_;
  assign _0103_ = _1149_ & ~(_1212_);
  assign _1213_ = _1210_ | _1170_;
  assign _0104_ = _1149_ & ~(_1213_);
  assign _1214_ = _1210_ | _1172_;
  assign _0105_ = _1149_ & ~(_1214_);
  assign _1215_ = _1210_ | _1174_;
  assign _0106_ = _1149_ & ~(_1215_);
  assign _1216_ = _1210_ | _1158_;
  assign _0107_ = _1149_ & ~(_1216_);
  assign _1217_ = _1210_ | _1154_;
  assign _0108_ = _1149_ & ~(_1217_);
  assign _1218_ = _1210_ | _1160_;
  assign _0109_ = _1149_ & ~(_1218_);
  assign _1219_ = _1209_ | _1179_;
  assign _1220_ = _1219_ | _1165_;
  assign _0111_ = _1149_ & ~(_1220_);
  assign _1221_ = _1219_ | _1167_;
  assign _0112_ = _1149_ & ~(_1221_);
  assign _1222_ = _1219_ | _1170_;
  assign _0113_ = _1149_ & ~(_1222_);
  assign _1223_ = _1219_ | _1172_;
  assign _0114_ = _1149_ & ~(_1223_);
  assign _1224_ = _1219_ | _1174_;
  assign _0115_ = _1149_ & ~(_1224_);
  assign _1225_ = _1219_ | _1158_;
  assign _0116_ = _1149_ & ~(_1225_);
  assign _1226_ = _1219_ | _1154_;
  assign _0117_ = _1149_ & ~(_1226_);
  assign _1227_ = _1219_ | _1160_;
  assign _0118_ = _1149_ & ~(_1227_);
  assign _1228_ = _1209_ | _1189_;
  assign _1229_ = _1228_ | _1165_;
  assign _0119_ = _1149_ & ~(_1229_);
  assign _1230_ = _1228_ | _1167_;
  assign _0120_ = _1149_ & ~(_1230_);
  assign _1231_ = _1228_ | _1170_;
  assign _0122_ = _1149_ & ~(_1231_);
  assign _1232_ = _1228_ | _1172_;
  assign _0123_ = _1149_ & ~(_1232_);
  assign _1233_ = _1228_ | _1174_;
  assign _0124_ = _1149_ & ~(_1233_);
  assign _1234_ = _1228_ | _1158_;
  assign _0125_ = _1149_ & ~(_1234_);
  assign _1235_ = _1228_ | _1154_;
  assign _0126_ = _1149_ & ~(_1235_);
  assign _1236_ = _1228_ | _1160_;
  assign _0127_ = _1149_ & ~(_1236_);
  assign _1237_ = _1209_ | _1199_;
  assign _1238_ = _1237_ | _1165_;
  assign _0128_ = _1149_ & ~(_1238_);
  assign _1239_ = _1237_ | _1167_;
  assign _0129_ = _1149_ & ~(_1239_);
  assign _1240_ = _1237_ | _1170_;
  assign _0130_ = _1149_ & ~(_1240_);
  assign _1241_ = _1237_ | _1172_;
  assign _0131_ = _1149_ & ~(_1241_);
  assign _1242_ = _1237_ | _1174_;
  assign _0133_ = _1149_ & ~(_1242_);
  assign _1243_ = _1237_ | _1158_;
  assign _0134_ = _1149_ & ~(_1243_);
  assign _1244_ = _1237_ | _1154_;
  assign _0135_ = _1149_ & ~(_1244_);
  assign _1245_ = _1237_ | _1160_;
  assign _0136_ = _1149_ & ~(_1245_);
  assign _1246_ = _0342_ | ~(_0412_);
  assign _1247_ = _1246_ | _1151_;
  assign _1248_ = _1247_ | _1165_;
  assign _0137_ = _1149_ & ~(_1248_);
  assign _1249_ = _1247_ | _1167_;
  assign _0138_ = _1149_ & ~(_1249_);
  assign _1250_ = _1247_ | _1170_;
  assign _0139_ = _1149_ & ~(_1250_);
  assign _1251_ = _1247_ | _1172_;
  assign _0140_ = _1149_ & ~(_1251_);
  assign _1252_ = _1247_ | _1174_;
  assign _0141_ = _1149_ & ~(_1252_);
  assign _1253_ = _1247_ | _1158_;
  assign _0142_ = _1149_ & ~(_1253_);
  assign _1254_ = _1247_ | _1154_;
  assign _0144_ = _1149_ & ~(_1254_);
  assign _1255_ = _1247_ | _1160_;
  assign _0145_ = _1149_ & ~(_1255_);
  assign _1256_ = _1246_ | _1179_;
  assign _1257_ = _1256_ | _1165_;
  assign _0146_ = _1149_ & ~(_1257_);
  assign _1258_ = _1256_ | _1167_;
  assign _0147_ = _1149_ & ~(_1258_);
  assign _1259_ = _1256_ | _1170_;
  assign _0148_ = _1149_ & ~(_1259_);
  assign _1260_ = _1256_ | _1172_;
  assign _0149_ = _1149_ & ~(_1260_);
  assign _1261_ = _1256_ | _1174_;
  assign _0150_ = _1149_ & ~(_1261_);
  assign _1262_ = _1256_ | _1158_;
  assign _0151_ = _1149_ & ~(_1262_);
  assign _1263_ = _1256_ | _1154_;
  assign _0152_ = _1149_ & ~(_1263_);
  assign _1264_ = _1256_ | _1160_;
  assign _0153_ = _1149_ & ~(_1264_);
  assign _1265_ = _1246_ | _1189_;
  assign _1266_ = _1265_ | _1165_;
  assign _0155_ = _1149_ & ~(_1266_);
  assign _1267_ = _1265_ | _1167_;
  assign _0156_ = _1149_ & ~(_1267_);
  assign _1268_ = _1265_ | _1170_;
  assign _0157_ = _1149_ & ~(_1268_);
  assign _1269_ = _1265_ | _1172_;
  assign _0158_ = _1149_ & ~(_1269_);
  assign _1270_ = _1265_ | _1174_;
  assign _0159_ = _1149_ & ~(_1270_);
  assign _1271_ = _1265_ | _1158_;
  assign _0160_ = _1149_ & ~(_1271_);
  assign _1272_ = _1265_ | _1154_;
  assign _0161_ = _1149_ & ~(_1272_);
  assign _1273_ = _1265_ | _1160_;
  assign _0162_ = _1149_ & ~(_1273_);
  assign _1274_ = _1246_ | _1199_;
  assign _1275_ = _1274_ | _1165_;
  assign _0163_ = _1149_ & ~(_1275_);
  assign _1276_ = _1274_ | _1167_;
  assign _0164_ = _1149_ & ~(_1276_);
  assign _1277_ = _1274_ | _1170_;
  assign _0166_ = _1149_ & ~(_1277_);
  assign _1278_ = _1274_ | _1172_;
  assign _0167_ = _1149_ & ~(_1278_);
  assign _1279_ = _1274_ | _1174_;
  assign _0168_ = _1149_ & ~(_1279_);
  assign _1280_ = _1274_ | _1158_;
  assign _0169_ = _1149_ & ~(_1280_);
  assign _1281_ = _1274_ | _1154_;
  assign _0170_ = _1149_ & ~(_1281_);
  assign _1282_ = _1274_ | _1160_;
  assign _0171_ = _1149_ & ~(_1282_);
  assign _1283_ = _1165_ | _1152_;
  assign _0172_ = _1149_ & ~(_1283_);
  assign _1284_ = _1167_ | _1152_;
  assign _0173_ = _1149_ & ~(_1284_);
  assign _1285_ = _1170_ | _1152_;
  assign _0174_ = _1149_ & ~(_1285_);
  assign _1286_ = _1172_ | _1152_;
  assign _0175_ = _1149_ & ~(_1286_);
  assign _1287_ = _1174_ | _1152_;
  assign _0050_ = _1149_ & ~(_1287_);
  assign _1288_ = _1179_ | _1150_;
  assign _1289_ = _1288_ | _1165_;
  assign _0054_ = _1149_ & ~(_1289_);
  assign _1290_ = _1288_ | _1167_;
  assign _0055_ = _1149_ & ~(_1290_);
  assign _1291_ = _1288_ | _1170_;
  assign _0056_ = _1149_ & ~(_1291_);
  assign _1292_ = _1288_ | _1172_;
  assign _0057_ = _1149_ & ~(_1292_);
  assign _1293_ = _1288_ | _1174_;
  assign _0058_ = _1149_ & ~(_1293_);
  assign _1294_ = _1288_ | _1158_;
  assign _0059_ = _1149_ & ~(_1294_);
  assign _1295_ = _1288_ | _1154_;
  assign _0061_ = _1149_ & ~(_1295_);
  assign _1296_ = _1288_ | _1160_;
  assign _0062_ = _1149_ & ~(_1296_);
  assign _1297_ = _1189_ | _1150_;
  assign _1298_ = _1297_ | _1165_;
  assign _0063_ = _1149_ & ~(_1298_);
  assign _1299_ = _1297_ | _1167_;
  assign _0064_ = _1149_ & ~(_1299_);
  assign _1300_ = _1297_ | _1170_;
  assign _0065_ = _1149_ & ~(_1300_);
  assign _1301_ = _1297_ | _1172_;
  assign _0066_ = _1149_ & ~(_1301_);
  assign _1302_ = _1297_ | _1174_;
  assign _0067_ = _1149_ & ~(_1302_);
  assign _1303_ = _1297_ | _1158_;
  assign _0068_ = _1149_ & ~(_1303_);
  assign _1304_ = _1297_ | _1154_;
  assign _0069_ = _1149_ & ~(_1304_);
  assign _1305_ = _1297_ | _1160_;
  assign _0070_ = _1149_ & ~(_1305_);
  assign _1306_ = _1199_ | _1150_;
  assign _1307_ = _1306_ | _1165_;
  assign _0072_ = _1149_ & ~(_1307_);
  assign _1308_ = _1306_ | _1167_;
  assign _0073_ = _1149_ & ~(_1308_);
  assign _1309_ = _1306_ | _1170_;
  assign _0074_ = _1149_ & ~(_1309_);
  assign _1310_ = _1306_ | _1172_;
  assign _0075_ = _1149_ & ~(_1310_);
  assign _1311_ = _1306_ | _1174_;
  assign _0076_ = _1149_ & ~(_1311_);
  assign _1312_ = _1306_ | _1158_;
  assign _0077_ = _1149_ & ~(_1312_);
  assign _1313_ = _1306_ | _1154_;
  assign _0078_ = _1149_ & ~(_1313_);
  assign _1314_ = _1306_ | _1160_;
  assign _0079_ = _1149_ & ~(_1314_);
  assign _1315_ = ~(\mchip.dut.fsm.currState [14] | \mchip.dut.fsm.currState [6]);
  assign _0004_ = _1350_ & ~(_1315_);
  assign _1316_ = io_in[13] | ~(_1340_);
  assign _1317_ = _1316_ | _1339_;
  assign _0003_ = \mchip.dut.fsm.currState [5] & ~(_1317_);
  assign _1318_ = ~(\mchip.dut.fsm.currState [12] | \mchip.dut.fsm.currState [4]);
  assign _0002_ = _1350_ & ~(_1318_);
  assign _0001_ = _1412_ & ~(_0216_);
  assign _1319_ = ~(\mchip.dut.fsm.currState [8] | \mchip.dut.fsm.currState [0]);
  assign _0000_ = _1350_ & ~(_1319_);
  assign \mchip.dut.Compute_done  = _1397_ | \mchip.dut.direction_reg.Q [1];
  assign _1320_ = _1403_ & \mchip.dut.input_addr.Q [2];
  assign _1416_[3] = _1320_ ^ \mchip.dut.input_addr.Q [3];
  assign _1416_[4] = ~(_1405_ ^ \mchip.dut.input_addr.Q [4]);
  assign _1321_ = \mchip.dut.input_addr.Q [4] & ~(_1405_);
  assign _1416_[5] = _1321_ ^ \mchip.dut.input_addr.Q [5];
  assign _1416_[6] = _1407_ ^ \mchip.dut.input_addr.Q [6];
  assign _1416_[1] = \mchip.dut.input_addr.Q [1] ^ \mchip.dut.input_addr.Q [0];
  assign _1416_[2] = _1403_ ^ \mchip.dut.input_addr.Q [2];
  assign _1322_ = \mchip.sync4.sync  & \mchip.sync3.sync ;
  assign _1323_ = \mchip.sync5.sync  ^ \mchip.sync4.sync ;
  assign \mchip.dut.tape_addr_min.D [3] = _1323_ ^ _1322_;
  assign _1324_ = \mchip.sync5.sync  & \mchip.sync4.sync ;
  assign _1325_ = _1323_ & _1322_;
  assign _1326_ = _1325_ | _1324_;
  assign _1327_ = \mchip.sync6.sync  ^ \mchip.sync5.sync ;
  assign \mchip.dut.tape_addr_min.D [4] = _1327_ ^ _1326_;
  assign _1328_ = \mchip.sync6.sync  & \mchip.sync5.sync ;
  assign _1329_ = _1327_ & _1324_;
  assign _1330_ = _1329_ | _1328_;
  assign _1331_ = ~(_1327_ & _1323_);
  assign _1332_ = _1322_ & ~(_1331_);
  assign _1333_ = _1332_ | _1330_;
  assign _1334_ = \mchip.sync7.sync  ^ \mchip.sync6.sync ;
  assign \mchip.dut.tape_addr_min.D [5] = _1334_ ^ _1333_;
  assign _1335_ = \mchip.sync7.sync  & \mchip.sync6.sync ;
  assign _1336_ = _1334_ & _1333_;
  assign _1337_ = _1336_ | _1335_;
  assign _1338_ = \mchip.sync8.sync  ^ \mchip.sync7.sync ;
  assign \mchip.dut.tape_addr_min.D [6] = _1338_ ^ _1337_;
  assign \mchip.dut.tape_addr_min.D [2] = \mchip.sync4.sync  ^ \mchip.sync3.sync ;
  reg \mchip.dut.tape_addr_min.Q_reg[1] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[1]  <= \mchip.sync3.sync ;
  assign \mchip.dut.tape_addr_min.Q [1] = \mchip.dut.tape_addr_min.Q_reg[1] ;
  reg \mchip.dut.tape_addr_min.Q_reg[2] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[2]  <= \mchip.dut.tape_addr_min.D [2];
  assign \mchip.dut.tape_addr_min.Q [2] = \mchip.dut.tape_addr_min.Q_reg[2] ;
  reg \mchip.dut.tape_addr_min.Q_reg[3] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[3]  <= \mchip.dut.tape_addr_min.D [3];
  assign \mchip.dut.tape_addr_min.Q [3] = \mchip.dut.tape_addr_min.Q_reg[3] ;
  reg \mchip.dut.tape_addr_min.Q_reg[4] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[4]  <= \mchip.dut.tape_addr_min.D [4];
  assign \mchip.dut.tape_addr_min.Q [4] = \mchip.dut.tape_addr_min.Q_reg[4] ;
  reg \mchip.dut.tape_addr_min.Q_reg[5] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[5]  <= \mchip.dut.tape_addr_min.D [5];
  assign \mchip.dut.tape_addr_min.Q [5] = \mchip.dut.tape_addr_min.Q_reg[5] ;
  reg \mchip.dut.tape_addr_min.Q_reg[6] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:44.18-44.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.tape_addr_min.Q_reg[6]  <= \mchip.dut.tape_addr_min.D [6];
  assign \mchip.dut.tape_addr_min.Q [6] = \mchip.dut.tape_addr_min.Q_reg[6] ;
  always @(posedge io_in[12])
    if (_0082_) \mchip.dut.memory.M[14] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0082_) \mchip.dut.memory.M[14] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0082_) \mchip.dut.memory.M[14] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0082_) \mchip.dut.memory.M[14] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0082_) \mchip.dut.memory.M[14] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0081_) \mchip.dut.memory.M[13] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0081_) \mchip.dut.memory.M[13] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0081_) \mchip.dut.memory.M[13] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0081_) \mchip.dut.memory.M[13] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0081_) \mchip.dut.memory.M[13] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0118_) \mchip.dut.memory.M[47] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0118_) \mchip.dut.memory.M[47] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0118_) \mchip.dut.memory.M[47] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0118_) \mchip.dut.memory.M[47] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0118_) \mchip.dut.memory.M[47] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0117_) \mchip.dut.memory.M[46] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0117_) \mchip.dut.memory.M[46] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0117_) \mchip.dut.memory.M[46] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0117_) \mchip.dut.memory.M[46] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0117_) \mchip.dut.memory.M[46] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0116_) \mchip.dut.memory.M[45] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0116_) \mchip.dut.memory.M[45] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0116_) \mchip.dut.memory.M[45] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0116_) \mchip.dut.memory.M[45] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0116_) \mchip.dut.memory.M[45] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0115_) \mchip.dut.memory.M[44] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0115_) \mchip.dut.memory.M[44] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0115_) \mchip.dut.memory.M[44] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0115_) \mchip.dut.memory.M[44] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0115_) \mchip.dut.memory.M[44] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0114_) \mchip.dut.memory.M[43] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0114_) \mchip.dut.memory.M[43] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0114_) \mchip.dut.memory.M[43] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0114_) \mchip.dut.memory.M[43] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0114_) \mchip.dut.memory.M[43] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0113_) \mchip.dut.memory.M[42] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0113_) \mchip.dut.memory.M[42] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0113_) \mchip.dut.memory.M[42] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0113_) \mchip.dut.memory.M[42] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0113_) \mchip.dut.memory.M[42] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0112_) \mchip.dut.memory.M[41] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0112_) \mchip.dut.memory.M[41] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0112_) \mchip.dut.memory.M[41] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0112_) \mchip.dut.memory.M[41] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0112_) \mchip.dut.memory.M[41] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0111_) \mchip.dut.memory.M[40] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0111_) \mchip.dut.memory.M[40] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0111_) \mchip.dut.memory.M[40] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0111_) \mchip.dut.memory.M[40] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0111_) \mchip.dut.memory.M[40] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0110_) \mchip.dut.memory.M[3] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0110_) \mchip.dut.memory.M[3] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0110_) \mchip.dut.memory.M[3] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0110_) \mchip.dut.memory.M[3] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0110_) \mchip.dut.memory.M[3] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0108_) \mchip.dut.memory.M[38] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0108_) \mchip.dut.memory.M[38] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0108_) \mchip.dut.memory.M[38] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0108_) \mchip.dut.memory.M[38] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0108_) \mchip.dut.memory.M[38] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0107_) \mchip.dut.memory.M[37] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0107_) \mchip.dut.memory.M[37] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0107_) \mchip.dut.memory.M[37] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0107_) \mchip.dut.memory.M[37] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0107_) \mchip.dut.memory.M[37] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0106_) \mchip.dut.memory.M[36] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0106_) \mchip.dut.memory.M[36] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0106_) \mchip.dut.memory.M[36] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0106_) \mchip.dut.memory.M[36] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0106_) \mchip.dut.memory.M[36] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0105_) \mchip.dut.memory.M[35] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0105_) \mchip.dut.memory.M[35] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0105_) \mchip.dut.memory.M[35] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0105_) \mchip.dut.memory.M[35] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0105_) \mchip.dut.memory.M[35] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0104_) \mchip.dut.memory.M[34] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0104_) \mchip.dut.memory.M[34] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0104_) \mchip.dut.memory.M[34] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0104_) \mchip.dut.memory.M[34] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0104_) \mchip.dut.memory.M[34] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0103_) \mchip.dut.memory.M[33] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0103_) \mchip.dut.memory.M[33] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0103_) \mchip.dut.memory.M[33] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0103_) \mchip.dut.memory.M[33] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0103_) \mchip.dut.memory.M[33] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0102_) \mchip.dut.memory.M[32] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0102_) \mchip.dut.memory.M[32] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0102_) \mchip.dut.memory.M[32] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0102_) \mchip.dut.memory.M[32] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0102_) \mchip.dut.memory.M[32] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0101_) \mchip.dut.memory.M[31] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0101_) \mchip.dut.memory.M[31] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0101_) \mchip.dut.memory.M[31] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0101_) \mchip.dut.memory.M[31] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0101_) \mchip.dut.memory.M[31] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0100_) \mchip.dut.memory.M[30] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0100_) \mchip.dut.memory.M[30] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0100_) \mchip.dut.memory.M[30] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0100_) \mchip.dut.memory.M[30] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0100_) \mchip.dut.memory.M[30] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0099_) \mchip.dut.memory.M[2] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0099_) \mchip.dut.memory.M[2] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0099_) \mchip.dut.memory.M[2] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0099_) \mchip.dut.memory.M[2] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0099_) \mchip.dut.memory.M[2] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0097_) \mchip.dut.memory.M[28] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0097_) \mchip.dut.memory.M[28] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0097_) \mchip.dut.memory.M[28] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0097_) \mchip.dut.memory.M[28] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0097_) \mchip.dut.memory.M[28] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0096_) \mchip.dut.memory.M[27] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0096_) \mchip.dut.memory.M[27] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0096_) \mchip.dut.memory.M[27] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0096_) \mchip.dut.memory.M[27] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0096_) \mchip.dut.memory.M[27] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0095_) \mchip.dut.memory.M[26] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0095_) \mchip.dut.memory.M[26] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0095_) \mchip.dut.memory.M[26] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0095_) \mchip.dut.memory.M[26] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0095_) \mchip.dut.memory.M[26] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0094_) \mchip.dut.memory.M[25] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0094_) \mchip.dut.memory.M[25] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0094_) \mchip.dut.memory.M[25] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0094_) \mchip.dut.memory.M[25] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0094_) \mchip.dut.memory.M[25] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0093_) \mchip.dut.memory.M[24] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0093_) \mchip.dut.memory.M[24] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0093_) \mchip.dut.memory.M[24] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0093_) \mchip.dut.memory.M[24] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0093_) \mchip.dut.memory.M[24] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0092_) \mchip.dut.memory.M[23] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0092_) \mchip.dut.memory.M[23] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0092_) \mchip.dut.memory.M[23] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0092_) \mchip.dut.memory.M[23] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0092_) \mchip.dut.memory.M[23] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0091_) \mchip.dut.memory.M[22] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0091_) \mchip.dut.memory.M[22] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0091_) \mchip.dut.memory.M[22] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0091_) \mchip.dut.memory.M[22] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0091_) \mchip.dut.memory.M[22] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0090_) \mchip.dut.memory.M[21] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0090_) \mchip.dut.memory.M[21] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0090_) \mchip.dut.memory.M[21] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0090_) \mchip.dut.memory.M[21] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0090_) \mchip.dut.memory.M[21] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0089_) \mchip.dut.memory.M[20] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0089_) \mchip.dut.memory.M[20] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0089_) \mchip.dut.memory.M[20] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0089_) \mchip.dut.memory.M[20] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0089_) \mchip.dut.memory.M[20] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0088_) \mchip.dut.memory.M[1] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0088_) \mchip.dut.memory.M[1] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0088_) \mchip.dut.memory.M[1] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0088_) \mchip.dut.memory.M[1] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0088_) \mchip.dut.memory.M[1] [4] <= \mchip.dut.memory.data_in [4];
  reg \mchip.dut.next_state.Q_reg[1] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.NextState_en )
      if (_0023_) \mchip.dut.next_state.Q_reg[1]  <= 1'h0;
      else \mchip.dut.next_state.Q_reg[1]  <= \mchip.dut.demux.I [1];
  assign \mchip.dut.next_state.Q [1] = \mchip.dut.next_state.Q_reg[1] ;
  reg \mchip.dut.next_state.Q_reg[2] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.NextState_en )
      if (_0023_) \mchip.dut.next_state.Q_reg[2]  <= 1'h0;
      else \mchip.dut.next_state.Q_reg[2]  <= \mchip.dut.demux.I [2];
  assign \mchip.dut.next_state.Q [2] = \mchip.dut.next_state.Q_reg[2] ;
  reg \mchip.dut.next_state.Q_reg[3] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.NextState_en )
      if (_0023_) \mchip.dut.next_state.Q_reg[3]  <= 1'h0;
      else \mchip.dut.next_state.Q_reg[3]  <= \mchip.dut.demux.I [3];
  assign \mchip.dut.next_state.Q [3] = \mchip.dut.next_state.Q_reg[3] ;
  reg \mchip.dut.next_state.Q_reg[4] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.NextState_en )
      if (_0023_) \mchip.dut.next_state.Q_reg[4]  <= 1'h0;
      else \mchip.dut.next_state.Q_reg[4]  <= \mchip.dut.demux.I [4];
  assign \mchip.dut.next_state.Q [4] = \mchip.dut.next_state.Q_reg[4] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [1] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [1] <= _0026_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [2] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [2] <= _0027_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [3] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [3] <= _0028_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [4] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [4] <= _0029_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [5] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [5] <= _0030_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [6] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [6] <= _0031_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [7] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [7] <= _0032_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [8] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [8] <= _0033_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [9] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [9] <= _0034_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [10] <= 1'h0;
    else if (_0020_) \mchip.dut.display_reg.Q [10] <= _0025_;
  always @(posedge io_in[12])
    if (_0083_) \mchip.dut.memory.M[15] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0083_) \mchip.dut.memory.M[15] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0083_) \mchip.dut.memory.M[15] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0083_) \mchip.dut.memory.M[15] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0083_) \mchip.dut.memory.M[15] [4] <= \mchip.dut.memory.data_in [4];
  reg \mchip.dut.fsm.currState_reg[0] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[0]  <= _0005_;
  assign \mchip.dut.fsm.currState [0] = \mchip.dut.fsm.currState_reg[0] ;
  reg \mchip.dut.fsm.currState_reg[1] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[1]  <= _0007_;
  assign \mchip.dut.fsm.currState [1] = \mchip.dut.fsm.currState_reg[1] ;
  reg \mchip.dut.fsm.currState_reg[2] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[2]  <= _0008_;
  assign \mchip.dut.fsm.currState [2] = \mchip.dut.fsm.currState_reg[2] ;
  reg \mchip.dut.fsm.currState_reg[3] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[3]  <= _0009_;
  assign \mchip.dut.fsm.currState [3] = \mchip.dut.fsm.currState_reg[3] ;
  reg \mchip.dut.fsm.currState_reg[4] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[4]  <= _0010_;
  assign \mchip.dut.fsm.currState [4] = \mchip.dut.fsm.currState_reg[4] ;
  reg \mchip.dut.fsm.currState_reg[5] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[5]  <= _0011_;
  assign \mchip.dut.fsm.currState [5] = \mchip.dut.fsm.currState_reg[5] ;
  reg \mchip.dut.fsm.currState_reg[6] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[6]  <= _0012_;
  assign \mchip.dut.fsm.currState [6] = \mchip.dut.fsm.currState_reg[6] ;
  reg \mchip.dut.fsm.currState_reg[8] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[8]  <= _0000_;
  assign \mchip.dut.fsm.currState [8] = \mchip.dut.fsm.currState_reg[8] ;
  reg \mchip.dut.fsm.currState_reg[9] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[9]  <= _0013_;
  assign \mchip.dut.fsm.currState [9] = \mchip.dut.fsm.currState_reg[9] ;
  reg \mchip.dut.fsm.currState_reg[10] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[10]  <= _0006_;
  assign \mchip.dut.fsm.currState [10] = \mchip.dut.fsm.currState_reg[10] ;
  reg \mchip.dut.fsm.currState_reg[11] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[11]  <= _0001_;
  assign \mchip.dut.fsm.currState [11] = \mchip.dut.fsm.currState_reg[11] ;
  reg \mchip.dut.fsm.currState_reg[12] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[12]  <= _0002_;
  assign \mchip.dut.fsm.currState [12] = \mchip.dut.fsm.currState_reg[12] ;
  reg \mchip.dut.fsm.currState_reg[13] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[13]  <= _0003_;
  assign \mchip.dut.fsm.currState [13] = \mchip.dut.fsm.currState_reg[13] ;
  reg \mchip.dut.fsm.currState_reg[14] ;
  always @(posedge io_in[12])
    \mchip.dut.fsm.currState_reg[14]  <= _0004_;
  assign \mchip.dut.fsm.currState [14] = \mchip.dut.fsm.currState_reg[14] ;
  always @(posedge io_in[12])
    if (_0120_) \mchip.dut.memory.M[49] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0120_) \mchip.dut.memory.M[49] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0120_) \mchip.dut.memory.M[49] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0120_) \mchip.dut.memory.M[49] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0120_) \mchip.dut.memory.M[49] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0078_) \mchip.dut.memory.M[126] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0078_) \mchip.dut.memory.M[126] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0078_) \mchip.dut.memory.M[126] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0078_) \mchip.dut.memory.M[126] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0078_) \mchip.dut.memory.M[126] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0077_) \mchip.dut.memory.M[125] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0077_) \mchip.dut.memory.M[125] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0077_) \mchip.dut.memory.M[125] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0077_) \mchip.dut.memory.M[125] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0077_) \mchip.dut.memory.M[125] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0131_) \mchip.dut.memory.M[59] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0131_) \mchip.dut.memory.M[59] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0131_) \mchip.dut.memory.M[59] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0131_) \mchip.dut.memory.M[59] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0131_) \mchip.dut.memory.M[59] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0076_) \mchip.dut.memory.M[124] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0076_) \mchip.dut.memory.M[124] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0076_) \mchip.dut.memory.M[124] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0076_) \mchip.dut.memory.M[124] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0076_) \mchip.dut.memory.M[124] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0075_) \mchip.dut.memory.M[123] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0075_) \mchip.dut.memory.M[123] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0075_) \mchip.dut.memory.M[123] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0075_) \mchip.dut.memory.M[123] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0075_) \mchip.dut.memory.M[123] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0074_) \mchip.dut.memory.M[122] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0074_) \mchip.dut.memory.M[122] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0074_) \mchip.dut.memory.M[122] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0074_) \mchip.dut.memory.M[122] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0074_) \mchip.dut.memory.M[122] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0073_) \mchip.dut.memory.M[121] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0073_) \mchip.dut.memory.M[121] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0073_) \mchip.dut.memory.M[121] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0073_) \mchip.dut.memory.M[121] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0073_) \mchip.dut.memory.M[121] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0072_) \mchip.dut.memory.M[120] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0072_) \mchip.dut.memory.M[120] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0072_) \mchip.dut.memory.M[120] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0072_) \mchip.dut.memory.M[120] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0072_) \mchip.dut.memory.M[120] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0071_) \mchip.dut.memory.M[11] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0071_) \mchip.dut.memory.M[11] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0071_) \mchip.dut.memory.M[11] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0071_) \mchip.dut.memory.M[11] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0071_) \mchip.dut.memory.M[11] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0153_) \mchip.dut.memory.M[79] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0153_) \mchip.dut.memory.M[79] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0153_) \mchip.dut.memory.M[79] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0153_) \mchip.dut.memory.M[79] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0153_) \mchip.dut.memory.M[79] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0069_) \mchip.dut.memory.M[118] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0069_) \mchip.dut.memory.M[118] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0069_) \mchip.dut.memory.M[118] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0069_) \mchip.dut.memory.M[118] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0069_) \mchip.dut.memory.M[118] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0068_) \mchip.dut.memory.M[117] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0068_) \mchip.dut.memory.M[117] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0068_) \mchip.dut.memory.M[117] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0068_) \mchip.dut.memory.M[117] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0068_) \mchip.dut.memory.M[117] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0142_) \mchip.dut.memory.M[69] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0142_) \mchip.dut.memory.M[69] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0142_) \mchip.dut.memory.M[69] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0142_) \mchip.dut.memory.M[69] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0142_) \mchip.dut.memory.M[69] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0067_) \mchip.dut.memory.M[116] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0067_) \mchip.dut.memory.M[116] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0067_) \mchip.dut.memory.M[116] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0067_) \mchip.dut.memory.M[116] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0067_) \mchip.dut.memory.M[116] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0080_) \mchip.dut.memory.M[12] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0080_) \mchip.dut.memory.M[12] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0080_) \mchip.dut.memory.M[12] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0080_) \mchip.dut.memory.M[12] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0080_) \mchip.dut.memory.M[12] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0066_) \mchip.dut.memory.M[115] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0066_) \mchip.dut.memory.M[115] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0066_) \mchip.dut.memory.M[115] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0066_) \mchip.dut.memory.M[115] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0066_) \mchip.dut.memory.M[115] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0065_) \mchip.dut.memory.M[114] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0065_) \mchip.dut.memory.M[114] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0065_) \mchip.dut.memory.M[114] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0065_) \mchip.dut.memory.M[114] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0065_) \mchip.dut.memory.M[114] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0109_) \mchip.dut.memory.M[39] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0109_) \mchip.dut.memory.M[39] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0109_) \mchip.dut.memory.M[39] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0109_) \mchip.dut.memory.M[39] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0109_) \mchip.dut.memory.M[39] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0064_) \mchip.dut.memory.M[113] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0064_) \mchip.dut.memory.M[113] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0064_) \mchip.dut.memory.M[113] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0064_) \mchip.dut.memory.M[113] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0064_) \mchip.dut.memory.M[113] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0063_) \mchip.dut.memory.M[112] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0063_) \mchip.dut.memory.M[112] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0063_) \mchip.dut.memory.M[112] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0063_) \mchip.dut.memory.M[112] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0063_) \mchip.dut.memory.M[112] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0062_) \mchip.dut.memory.M[111] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0062_) \mchip.dut.memory.M[111] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0062_) \mchip.dut.memory.M[111] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0062_) \mchip.dut.memory.M[111] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0062_) \mchip.dut.memory.M[111] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0061_) \mchip.dut.memory.M[110] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0061_) \mchip.dut.memory.M[110] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0061_) \mchip.dut.memory.M[110] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0061_) \mchip.dut.memory.M[110] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0061_) \mchip.dut.memory.M[110] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0060_) \mchip.dut.memory.M[10] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0060_) \mchip.dut.memory.M[10] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0060_) \mchip.dut.memory.M[10] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0060_) \mchip.dut.memory.M[10] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0060_) \mchip.dut.memory.M[10] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0058_) \mchip.dut.memory.M[108] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0058_) \mchip.dut.memory.M[108] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0058_) \mchip.dut.memory.M[108] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0058_) \mchip.dut.memory.M[108] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0058_) \mchip.dut.memory.M[108] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0085_) \mchip.dut.memory.M[17] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0085_) \mchip.dut.memory.M[17] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0085_) \mchip.dut.memory.M[17] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0085_) \mchip.dut.memory.M[17] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0085_) \mchip.dut.memory.M[17] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0084_) \mchip.dut.memory.M[16] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0084_) \mchip.dut.memory.M[16] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0084_) \mchip.dut.memory.M[16] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0084_) \mchip.dut.memory.M[16] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0084_) \mchip.dut.memory.M[16] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0079_) \mchip.dut.memory.M[127] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0079_) \mchip.dut.memory.M[127] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0079_) \mchip.dut.memory.M[127] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0079_) \mchip.dut.memory.M[127] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0079_) \mchip.dut.memory.M[127] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0098_) \mchip.dut.memory.M[29] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0098_) \mchip.dut.memory.M[29] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0098_) \mchip.dut.memory.M[29] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0098_) \mchip.dut.memory.M[29] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0098_) \mchip.dut.memory.M[29] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0057_) \mchip.dut.memory.M[107] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0057_) \mchip.dut.memory.M[107] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0057_) \mchip.dut.memory.M[107] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0057_) \mchip.dut.memory.M[107] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0057_) \mchip.dut.memory.M[107] [4] <= \mchip.dut.memory.data_in [4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [0] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [0] <= _1416_[0];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [1] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [1] <= _1416_[1];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [2] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [2] <= _1416_[2];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [3] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [3] <= _1416_[3];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [4] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [4] <= _1416_[4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [5] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [5] <= _1416_[5];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:29.17-29.119|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.input_addr.Q [6] <= 1'h0;
    else if (\mchip.dut.InputAddr_en ) \mchip.dut.input_addr.Q [6] <= _1416_[6];
  always @(posedge io_in[12])
    if (_0146_) \mchip.dut.memory.M[72] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0146_) \mchip.dut.memory.M[72] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0146_) \mchip.dut.memory.M[72] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0146_) \mchip.dut.memory.M[72] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0146_) \mchip.dut.memory.M[72] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0147_) \mchip.dut.memory.M[73] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0147_) \mchip.dut.memory.M[73] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0147_) \mchip.dut.memory.M[73] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0147_) \mchip.dut.memory.M[73] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0147_) \mchip.dut.memory.M[73] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0148_) \mchip.dut.memory.M[74] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0148_) \mchip.dut.memory.M[74] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0148_) \mchip.dut.memory.M[74] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0148_) \mchip.dut.memory.M[74] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0148_) \mchip.dut.memory.M[74] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0149_) \mchip.dut.memory.M[75] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0149_) \mchip.dut.memory.M[75] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0149_) \mchip.dut.memory.M[75] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0149_) \mchip.dut.memory.M[75] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0149_) \mchip.dut.memory.M[75] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0150_) \mchip.dut.memory.M[76] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0150_) \mchip.dut.memory.M[76] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0150_) \mchip.dut.memory.M[76] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0150_) \mchip.dut.memory.M[76] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0150_) \mchip.dut.memory.M[76] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0119_) \mchip.dut.memory.M[48] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0119_) \mchip.dut.memory.M[48] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0119_) \mchip.dut.memory.M[48] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0119_) \mchip.dut.memory.M[48] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0119_) \mchip.dut.memory.M[48] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0151_) \mchip.dut.memory.M[77] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0151_) \mchip.dut.memory.M[77] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0151_) \mchip.dut.memory.M[77] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0151_) \mchip.dut.memory.M[77] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0151_) \mchip.dut.memory.M[77] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0152_) \mchip.dut.memory.M[78] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0152_) \mchip.dut.memory.M[78] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0152_) \mchip.dut.memory.M[78] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0152_) \mchip.dut.memory.M[78] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0152_) \mchip.dut.memory.M[78] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0154_) \mchip.dut.memory.M[7] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0154_) \mchip.dut.memory.M[7] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0154_) \mchip.dut.memory.M[7] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0154_) \mchip.dut.memory.M[7] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0154_) \mchip.dut.memory.M[7] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0155_) \mchip.dut.memory.M[80] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0155_) \mchip.dut.memory.M[80] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0155_) \mchip.dut.memory.M[80] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0155_) \mchip.dut.memory.M[80] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0155_) \mchip.dut.memory.M[80] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0156_) \mchip.dut.memory.M[81] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0156_) \mchip.dut.memory.M[81] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0156_) \mchip.dut.memory.M[81] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0156_) \mchip.dut.memory.M[81] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0156_) \mchip.dut.memory.M[81] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0157_) \mchip.dut.memory.M[82] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0157_) \mchip.dut.memory.M[82] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0157_) \mchip.dut.memory.M[82] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0157_) \mchip.dut.memory.M[82] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0157_) \mchip.dut.memory.M[82] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0158_) \mchip.dut.memory.M[83] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0158_) \mchip.dut.memory.M[83] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0158_) \mchip.dut.memory.M[83] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0158_) \mchip.dut.memory.M[83] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0158_) \mchip.dut.memory.M[83] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0159_) \mchip.dut.memory.M[84] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0159_) \mchip.dut.memory.M[84] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0159_) \mchip.dut.memory.M[84] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0159_) \mchip.dut.memory.M[84] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0159_) \mchip.dut.memory.M[84] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0160_) \mchip.dut.memory.M[85] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0160_) \mchip.dut.memory.M[85] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0160_) \mchip.dut.memory.M[85] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0160_) \mchip.dut.memory.M[85] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0160_) \mchip.dut.memory.M[85] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0161_) \mchip.dut.memory.M[86] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0161_) \mchip.dut.memory.M[86] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0161_) \mchip.dut.memory.M[86] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0161_) \mchip.dut.memory.M[86] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0161_) \mchip.dut.memory.M[86] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0162_) \mchip.dut.memory.M[87] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0162_) \mchip.dut.memory.M[87] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0162_) \mchip.dut.memory.M[87] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0162_) \mchip.dut.memory.M[87] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0162_) \mchip.dut.memory.M[87] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0163_) \mchip.dut.memory.M[88] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0163_) \mchip.dut.memory.M[88] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0163_) \mchip.dut.memory.M[88] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0163_) \mchip.dut.memory.M[88] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0163_) \mchip.dut.memory.M[88] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0070_) \mchip.dut.memory.M[119] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0070_) \mchip.dut.memory.M[119] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0070_) \mchip.dut.memory.M[119] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0070_) \mchip.dut.memory.M[119] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0070_) \mchip.dut.memory.M[119] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0130_) \mchip.dut.memory.M[58] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0130_) \mchip.dut.memory.M[58] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0130_) \mchip.dut.memory.M[58] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0130_) \mchip.dut.memory.M[58] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0130_) \mchip.dut.memory.M[58] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0165_) \mchip.dut.memory.M[8] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0165_) \mchip.dut.memory.M[8] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0165_) \mchip.dut.memory.M[8] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0165_) \mchip.dut.memory.M[8] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0165_) \mchip.dut.memory.M[8] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0122_) \mchip.dut.memory.M[50] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0122_) \mchip.dut.memory.M[50] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0122_) \mchip.dut.memory.M[50] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0122_) \mchip.dut.memory.M[50] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0122_) \mchip.dut.memory.M[50] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0132_) \mchip.dut.memory.M[5] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0132_) \mchip.dut.memory.M[5] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0132_) \mchip.dut.memory.M[5] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0132_) \mchip.dut.memory.M[5] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0132_) \mchip.dut.memory.M[5] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0123_) \mchip.dut.memory.M[51] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0123_) \mchip.dut.memory.M[51] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0123_) \mchip.dut.memory.M[51] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0123_) \mchip.dut.memory.M[51] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0123_) \mchip.dut.memory.M[51] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0166_) \mchip.dut.memory.M[90] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0166_) \mchip.dut.memory.M[90] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0166_) \mchip.dut.memory.M[90] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0166_) \mchip.dut.memory.M[90] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0166_) \mchip.dut.memory.M[90] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0133_) \mchip.dut.memory.M[60] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0133_) \mchip.dut.memory.M[60] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0133_) \mchip.dut.memory.M[60] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0133_) \mchip.dut.memory.M[60] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0133_) \mchip.dut.memory.M[60] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0176_) \mchip.dut.memory.M[9] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0176_) \mchip.dut.memory.M[9] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0176_) \mchip.dut.memory.M[9] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0176_) \mchip.dut.memory.M[9] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0176_) \mchip.dut.memory.M[9] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0124_) \mchip.dut.memory.M[52] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0124_) \mchip.dut.memory.M[52] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0124_) \mchip.dut.memory.M[52] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0124_) \mchip.dut.memory.M[52] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0124_) \mchip.dut.memory.M[52] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0134_) \mchip.dut.memory.M[61] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0134_) \mchip.dut.memory.M[61] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0134_) \mchip.dut.memory.M[61] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0134_) \mchip.dut.memory.M[61] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0134_) \mchip.dut.memory.M[61] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0167_) \mchip.dut.memory.M[91] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0167_) \mchip.dut.memory.M[91] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0167_) \mchip.dut.memory.M[91] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0167_) \mchip.dut.memory.M[91] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0167_) \mchip.dut.memory.M[91] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0135_) \mchip.dut.memory.M[62] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0135_) \mchip.dut.memory.M[62] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0135_) \mchip.dut.memory.M[62] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0135_) \mchip.dut.memory.M[62] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0135_) \mchip.dut.memory.M[62] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0125_) \mchip.dut.memory.M[53] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0125_) \mchip.dut.memory.M[53] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0125_) \mchip.dut.memory.M[53] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0125_) \mchip.dut.memory.M[53] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0125_) \mchip.dut.memory.M[53] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0168_) \mchip.dut.memory.M[92] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0168_) \mchip.dut.memory.M[92] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0168_) \mchip.dut.memory.M[92] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0168_) \mchip.dut.memory.M[92] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0168_) \mchip.dut.memory.M[92] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0136_) \mchip.dut.memory.M[63] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0136_) \mchip.dut.memory.M[63] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0136_) \mchip.dut.memory.M[63] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0136_) \mchip.dut.memory.M[63] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0136_) \mchip.dut.memory.M[63] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0169_) \mchip.dut.memory.M[93] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0169_) \mchip.dut.memory.M[93] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0169_) \mchip.dut.memory.M[93] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0169_) \mchip.dut.memory.M[93] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0169_) \mchip.dut.memory.M[93] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0137_) \mchip.dut.memory.M[64] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0137_) \mchip.dut.memory.M[64] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0137_) \mchip.dut.memory.M[64] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0137_) \mchip.dut.memory.M[64] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0137_) \mchip.dut.memory.M[64] [4] <= \mchip.dut.memory.data_in [4];
  reg \mchip.dut.next_state.Q_reg[0] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:39.18-39.109|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.NextState_en )
      if (\mchip.dut.fsm.currState [0]) \mchip.dut.next_state.Q_reg[0]  <= 1'h1;
      else \mchip.dut.next_state.Q_reg[0]  <= \mchip.dut.demux.Y2 [0];
  assign \mchip.dut.next_state.Q [0] = \mchip.dut.next_state.Q_reg[0] ;
  always @(posedge io_in[12])
    if (_0170_) \mchip.dut.memory.M[94] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0170_) \mchip.dut.memory.M[94] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0170_) \mchip.dut.memory.M[94] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0170_) \mchip.dut.memory.M[94] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0170_) \mchip.dut.memory.M[94] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0138_) \mchip.dut.memory.M[65] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0138_) \mchip.dut.memory.M[65] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0138_) \mchip.dut.memory.M[65] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0138_) \mchip.dut.memory.M[65] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0138_) \mchip.dut.memory.M[65] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0171_) \mchip.dut.memory.M[95] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0171_) \mchip.dut.memory.M[95] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0171_) \mchip.dut.memory.M[95] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0171_) \mchip.dut.memory.M[95] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0171_) \mchip.dut.memory.M[95] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0139_) \mchip.dut.memory.M[66] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0139_) \mchip.dut.memory.M[66] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0139_) \mchip.dut.memory.M[66] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0139_) \mchip.dut.memory.M[66] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0139_) \mchip.dut.memory.M[66] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0172_) \mchip.dut.memory.M[96] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0172_) \mchip.dut.memory.M[96] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0172_) \mchip.dut.memory.M[96] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0172_) \mchip.dut.memory.M[96] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0172_) \mchip.dut.memory.M[96] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0140_) \mchip.dut.memory.M[67] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0140_) \mchip.dut.memory.M[67] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0140_) \mchip.dut.memory.M[67] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0140_) \mchip.dut.memory.M[67] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0140_) \mchip.dut.memory.M[67] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0121_) \mchip.dut.memory.M[4] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0121_) \mchip.dut.memory.M[4] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0121_) \mchip.dut.memory.M[4] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0121_) \mchip.dut.memory.M[4] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0121_) \mchip.dut.memory.M[4] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0141_) \mchip.dut.memory.M[68] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0141_) \mchip.dut.memory.M[68] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0141_) \mchip.dut.memory.M[68] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0141_) \mchip.dut.memory.M[68] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0141_) \mchip.dut.memory.M[68] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0173_) \mchip.dut.memory.M[97] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0173_) \mchip.dut.memory.M[97] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0173_) \mchip.dut.memory.M[97] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0173_) \mchip.dut.memory.M[97] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0173_) \mchip.dut.memory.M[97] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0143_) \mchip.dut.memory.M[6] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0143_) \mchip.dut.memory.M[6] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0143_) \mchip.dut.memory.M[6] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0143_) \mchip.dut.memory.M[6] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0143_) \mchip.dut.memory.M[6] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0086_) \mchip.dut.memory.M[18] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0086_) \mchip.dut.memory.M[18] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0086_) \mchip.dut.memory.M[18] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0086_) \mchip.dut.memory.M[18] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0086_) \mchip.dut.memory.M[18] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0144_) \mchip.dut.memory.M[70] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0144_) \mchip.dut.memory.M[70] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0144_) \mchip.dut.memory.M[70] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0144_) \mchip.dut.memory.M[70] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0144_) \mchip.dut.memory.M[70] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0145_) \mchip.dut.memory.M[71] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0145_) \mchip.dut.memory.M[71] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0145_) \mchip.dut.memory.M[71] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0145_) \mchip.dut.memory.M[71] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0145_) \mchip.dut.memory.M[71] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0174_) \mchip.dut.memory.M[98] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0174_) \mchip.dut.memory.M[98] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0174_) \mchip.dut.memory.M[98] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0174_) \mchip.dut.memory.M[98] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0174_) \mchip.dut.memory.M[98] [4] <= \mchip.dut.memory.data_in [4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:61.17-61.100|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0019_)
      if (_0021_) \mchip.dut.data_reg.Q  <= 1'h0;
      else \mchip.dut.data_reg.Q  <= \mchip.dut.demux.I [0];
  always @(posedge io_in[12])
    if (_0087_) \mchip.dut.memory.M[19] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0087_) \mchip.dut.memory.M[19] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0087_) \mchip.dut.memory.M[19] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0087_) \mchip.dut.memory.M[19] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0087_) \mchip.dut.memory.M[19] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0049_) \mchip.dut.memory.M[0] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0049_) \mchip.dut.memory.M[0] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0049_) \mchip.dut.memory.M[0] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0049_) \mchip.dut.memory.M[0] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0049_) \mchip.dut.memory.M[0] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0050_) \mchip.dut.memory.M[100] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0050_) \mchip.dut.memory.M[100] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0050_) \mchip.dut.memory.M[100] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0050_) \mchip.dut.memory.M[100] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0050_) \mchip.dut.memory.M[100] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0126_) \mchip.dut.memory.M[54] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0126_) \mchip.dut.memory.M[54] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0126_) \mchip.dut.memory.M[54] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0126_) \mchip.dut.memory.M[54] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0126_) \mchip.dut.memory.M[54] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0051_) \mchip.dut.memory.M[101] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0051_) \mchip.dut.memory.M[101] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0051_) \mchip.dut.memory.M[101] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0051_) \mchip.dut.memory.M[101] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0051_) \mchip.dut.memory.M[101] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0127_) \mchip.dut.memory.M[55] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0127_) \mchip.dut.memory.M[55] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0127_) \mchip.dut.memory.M[55] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0127_) \mchip.dut.memory.M[55] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0127_) \mchip.dut.memory.M[55] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0128_) \mchip.dut.memory.M[56] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0128_) \mchip.dut.memory.M[56] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0128_) \mchip.dut.memory.M[56] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0128_) \mchip.dut.memory.M[56] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0128_) \mchip.dut.memory.M[56] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0052_) \mchip.dut.memory.M[102] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0052_) \mchip.dut.memory.M[102] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0052_) \mchip.dut.memory.M[102] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0052_) \mchip.dut.memory.M[102] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0052_) \mchip.dut.memory.M[102] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0129_) \mchip.dut.memory.M[57] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0129_) \mchip.dut.memory.M[57] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0129_) \mchip.dut.memory.M[57] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0129_) \mchip.dut.memory.M[57] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0129_) \mchip.dut.memory.M[57] [4] <= \mchip.dut.memory.data_in [4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:53.17-53.100|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0014_)
      if (!\mchip.dut.StateAddr_ld ) \mchip.dut.tape_reg.Q  <= 1'h0;
      else \mchip.dut.tape_reg.Q  <= \mchip.dut.tape_reg.D ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [0] <= _0035_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [1] <= _0036_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [2] <= _0037_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [3] <= _0038_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [4] <= _0039_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [5] <= _0040_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:41.17-41.140|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0016_) \mchip.dut.state_addr.Q [6] <= _0041_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.dut.memory.M[109] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0059_) \mchip.dut.memory.M[109] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0059_) \mchip.dut.memory.M[109] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0059_) \mchip.dut.memory.M[109] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0059_) \mchip.dut.memory.M[109] [4] <= \mchip.dut.memory.data_in [4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [0] <= _0042_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [1] <= _0043_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [2] <= _0044_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [3] <= _0045_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [4] <= _0046_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [5] <= _0047_;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:42.17-42.134|d23_zhiyingm_turing/src/library.sv:89.3-98.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0015_) \mchip.dut.tape_addr.Q [6] <= _0048_;
  always @(posedge io_in[12])
    if (_0053_) \mchip.dut.memory.M[103] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0053_) \mchip.dut.memory.M[103] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0053_) \mchip.dut.memory.M[103] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0053_) \mchip.dut.memory.M[103] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0053_) \mchip.dut.memory.M[103] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0054_) \mchip.dut.memory.M[104] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0054_) \mchip.dut.memory.M[104] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0054_) \mchip.dut.memory.M[104] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0054_) \mchip.dut.memory.M[104] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0054_) \mchip.dut.memory.M[104] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0055_) \mchip.dut.memory.M[105] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0055_) \mchip.dut.memory.M[105] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0055_) \mchip.dut.memory.M[105] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0055_) \mchip.dut.memory.M[105] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0055_) \mchip.dut.memory.M[105] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0056_) \mchip.dut.memory.M[106] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0056_) \mchip.dut.memory.M[106] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0056_) \mchip.dut.memory.M[106] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0056_) \mchip.dut.memory.M[106] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0056_) \mchip.dut.memory.M[106] [4] <= \mchip.dut.memory.data_in [4];
  always @(posedge io_in[12])
    if (_0175_) \mchip.dut.memory.M[99] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0175_) \mchip.dut.memory.M[99] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0175_) \mchip.dut.memory.M[99] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0175_) \mchip.dut.memory.M[99] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0175_) \mchip.dut.memory.M[99] [4] <= \mchip.dut.memory.data_in [4];
  reg \mchip.dut.direction_reg.Q_reg[0] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0018_)
      if (_0022_) \mchip.dut.direction_reg.Q_reg[0]  <= 1'h0;
      else \mchip.dut.direction_reg.Q_reg[0]  <= \mchip.dut.demux.I [0];
  assign \mchip.dut.direction_reg.Q [0] = \mchip.dut.direction_reg.Q_reg[0] ;
  reg \mchip.dut.direction_reg.Q_reg[1] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:64.18-64.110|d23_zhiyingm_turing/src/library.sv:71.3-76.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (_0018_)
      if (_0022_) \mchip.dut.direction_reg.Q_reg[1]  <= 1'h0;
      else \mchip.dut.direction_reg.Q_reg[1]  <= \mchip.dut.demux.I [1];
  assign \mchip.dut.direction_reg.Q [1] = \mchip.dut.direction_reg.Q_reg[1] ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/TuringMachine.sv:59.37-59.167|d23_zhiyingm_turing/src/library.sv:123.3-132.6|d23_zhiyingm_turing/src/chip.sv:21.29-22.86" */
  always @(posedge io_in[12])
    if (\mchip.dut.fsm.currState [0]) \mchip.dut.display_reg.Q [0] <= 1'h0;
    else if (_0017_) \mchip.dut.display_reg.Q [0] <= _0024_;
  always @(posedge io_in[12])
    if (_0164_) \mchip.dut.memory.M[89] [0] <= \mchip.dut.memory.data_in [0];
  always @(posedge io_in[12])
    if (_0164_) \mchip.dut.memory.M[89] [1] <= \mchip.dut.memory.data_in [1];
  always @(posedge io_in[12])
    if (_0164_) \mchip.dut.memory.M[89] [2] <= \mchip.dut.memory.data_in [2];
  always @(posedge io_in[12])
    if (_0164_) \mchip.dut.memory.M[89] [3] <= \mchip.dut.memory.data_in [3];
  always @(posedge io_in[12])
    if (_0164_) \mchip.dut.memory.M[89] [4] <= \mchip.dut.memory.data_in [4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  always @(posedge io_in[12])
    \mchip.sync8.async1  <= io_in[7];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  always @(posedge io_in[12])
    \mchip.sync7.async1  <= io_in[6];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  always @(posedge io_in[12])
    \mchip.sync6.async1  <= io_in[5];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  always @(posedge io_in[12])
    \mchip.sync5.async1  <= io_in[4];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  always @(posedge io_in[12])
    \mchip.sync4.async1  <= io_in[3];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  always @(posedge io_in[12])
    \mchip.sync3.async1  <= io_in[2];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  always @(posedge io_in[12])
    \mchip.sync2.async1  <= io_in[0];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:109.3-110.21|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  always @(posedge io_in[12])
    \mchip.sync1.async1  <= io_in[1];
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:19.18-19.72" */
  always @(posedge io_in[12])
    \mchip.sync8.sync  <= \mchip.sync8.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:18.18-18.72" */
  always @(posedge io_in[12])
    \mchip.sync7.sync  <= \mchip.sync7.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:17.18-17.72" */
  always @(posedge io_in[12])
    \mchip.sync6.sync  <= \mchip.sync6.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:16.18-16.72" */
  always @(posedge io_in[12])
    \mchip.sync5.sync  <= \mchip.sync5.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:15.18-15.72" */
  always @(posedge io_in[12])
    \mchip.sync4.sync  <= \mchip.sync4.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:14.18-14.72" */
  always @(posedge io_in[12])
    \mchip.sync3.sync  <= \mchip.sync3.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:13.18-13.63" */
  always @(posedge io_in[12])
    \mchip.sync2.sync  <= \mchip.sync2.async1 ;
  /* \always_ff  = 32'd1 */
  /* src = "d23_zhiyingm_turing/src/toplevel_chip.v:9.13-14.6|d23_zhiyingm_turing/src/library.sv:112.3-113.20|d23_zhiyingm_turing/src/chip.sv:12.18-12.63" */
  always @(posedge io_in[12])
    \mchip.sync1.sync  <= \mchip.sync1.async1 ;
  assign io_out = { 2'h0, \mchip.dut.display_reg.Q , \mchip.dut.Compute_done  };
  assign \mchip.Done  = \mchip.sync2.sync ;
  assign \mchip.Next  = \mchip.sync1.sync ;
  assign \mchip.clock  = io_in[12];
  assign \mchip.dut.DataReg_en  = \mchip.dut.fsm.currState [9];
  assign \mchip.dut.Done  = \mchip.sync2.sync ;
  assign \mchip.dut.Halt  = \mchip.dut.direction_reg.Q [1];
  assign \mchip.dut.Init  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.Left  = \mchip.dut.direction_reg.Q [0];
  assign \mchip.dut.Next  = \mchip.sync1.sync ;
  assign \mchip.dut.Read_en  = 1'h1;
  assign \mchip.dut.TapeReg_en  = \mchip.dut.StateAddr_ld ;
  assign \mchip.dut.Tape_start  = 1'h1;
  assign \mchip.dut.clock  = io_in[12];
  assign \mchip.dut.data_reg.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.data_reg.clock  = io_in[12];
  assign \mchip.dut.data_reg.en  = \mchip.dut.fsm.currState [9];
  assign \mchip.dut.data_reg_out  = \mchip.dut.data_reg.Q ;
  assign \mchip.dut.demux.Y0  = 5'h00;
  assign \mchip.dut.demux.Y1  = 5'h00;
  assign \mchip.dut.demux.Y2 [4:1] = 4'h0;
  assign \mchip.dut.demux.Y3  = 5'h00;
  assign \mchip.dut.direction_in  = 2'h0;
  assign \mchip.dut.direction_out  = \mchip.dut.direction_reg.Q [1:0];
  assign \mchip.dut.direction_reg.D  = 7'h00;
  assign \mchip.dut.direction_reg.Q [6:2] = 5'h00;
  assign \mchip.dut.direction_reg.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.direction_reg.clock  = io_in[12];
  assign \mchip.dut.display_out  = \mchip.dut.display_reg.Q ;
  assign \mchip.dut.display_reg.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.display_reg.clock  = io_in[12];
  assign \mchip.dut.fsm.DataReg_en  = \mchip.dut.fsm.currState [9];
  assign \mchip.dut.fsm.Done  = \mchip.sync2.sync ;
  assign \mchip.dut.fsm.Halt  = \mchip.dut.direction_reg.Q [1];
  assign \mchip.dut.fsm.Init  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.fsm.InputAddr_en  = \mchip.dut.InputAddr_en ;
  assign \mchip.dut.fsm.Left  = \mchip.dut.direction_reg.Q [0];
  assign \mchip.dut.fsm.Next  = \mchip.sync1.sync ;
  assign \mchip.dut.fsm.NextState_en  = \mchip.dut.NextState_en ;
  assign \mchip.dut.fsm.Read_en  = 1'h1;
  assign \mchip.dut.fsm.StateAddr_ld  = \mchip.dut.StateAddr_ld ;
  assign \mchip.dut.fsm.TapeReg_en  = \mchip.dut.StateAddr_ld ;
  assign \mchip.dut.fsm.Tape_start  = 1'h1;
  assign \mchip.dut.fsm.clock  = io_in[12];
  assign \mchip.dut.fsm.currState [7] = 1'h0;
  assign \mchip.dut.fsm.reset  = io_in[13];
  assign \mchip.dut.input_addr.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.input_addr.clock  = io_in[12];
  assign \mchip.dut.input_addr.en  = \mchip.dut.InputAddr_en ;
  assign \mchip.dut.input_addr.load  = 1'h0;
  assign \mchip.dut.input_addr.up  = 1'h1;
  assign \mchip.dut.input_addr_out  = \mchip.dut.input_addr.Q ;
  assign \mchip.dut.input_data  = { 1'h0, \mchip.sync8.sync , \mchip.sync7.sync , \mchip.sync6.sync , \mchip.sync5.sync , \mchip.sync4.sync , \mchip.sync3.sync  };
  assign \mchip.dut.memory.clock  = io_in[12];
  assign \mchip.dut.memory.data_out  = \mchip.dut.demux.I ;
  assign \mchip.dut.memory.re  = 1'h1;
  assign \mchip.dut.mux_display.I0  = { 6'h00, \mchip.dut.tape_reg.Q  };
  assign \mchip.dut.mux_display.I1  = 7'h00;
  assign \mchip.dut.mux_display.S  = \mchip.dut.direction_reg.Q [0];
  assign \mchip.dut.mux_display.Y  = 7'h00;
  assign \mchip.dut.mux_input_calculate.I0  = { 4'h0, \mchip.dut.data_reg.Q  };
  assign \mchip.dut.mux_input_calculate.I1  = { \mchip.sync7.sync , \mchip.sync6.sync , \mchip.sync5.sync , \mchip.sync4.sync , \mchip.sync3.sync  };
  assign \mchip.dut.mux_input_calculate.Y  = \mchip.dut.memory.data_in ;
  assign \mchip.dut.mux_next_state.I0  = { 6'h00, \mchip.dut.demux.Y2 [0] };
  assign \mchip.dut.mux_next_state.I1  = 7'h01;
  assign \mchip.dut.mux_next_state.S  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.mux_next_state.Y  = 7'h00;
  assign \mchip.dut.mux_prev_tape.I0  = 1'h0;
  assign \mchip.dut.mux_prev_tape.I1  = 1'h0;
  assign \mchip.dut.mux_prev_tape.Y  = 1'h0;
  assign \mchip.dut.mux_state_tape_addr.I0  = \mchip.dut.state_addr.Q ;
  assign \mchip.dut.mux_state_tape_addr.I1  = \mchip.dut.tape_addr.Q ;
  assign \mchip.dut.mux_state_tape_addr.I3  = \mchip.dut.input_addr.Q ;
  assign \mchip.dut.mux_tape_reg.I0  = 1'h0;
  assign \mchip.dut.mux_tape_reg.I1  = \mchip.dut.display_reg.Q [1];
  assign \mchip.dut.mux_tape_reg.S  = \mchip.dut.direction_reg.Q [0];
  assign \mchip.dut.mux_tape_reg.Y  = \mchip.dut.tape_reg.D ;
  assign \mchip.dut.next_state.D  = 7'h00;
  assign \mchip.dut.next_state.Q [6:5] = 2'h0;
  assign \mchip.dut.next_state.clear  = 1'h0;
  assign \mchip.dut.next_state.clock  = io_in[12];
  assign \mchip.dut.next_state.en  = \mchip.dut.NextState_en ;
  assign \mchip.dut.next_state_in  = 7'h00;
  assign \mchip.dut.next_state_out  = { 2'h0, \mchip.dut.next_state.Q [4:0] };
  assign \mchip.dut.next_state_prep  = { 6'h00, \mchip.dut.demux.Y2 [0] };
  assign \mchip.dut.prev_tape_in  = 1'h0;
  assign \mchip.dut.prev_tape_out  = 1'h0;
  assign \mchip.dut.prev_tape_reg.D  = 1'h0;
  assign \mchip.dut.prev_tape_reg.Q  = 1'h0;
  assign \mchip.dut.prev_tape_reg.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.prev_tape_reg.clock  = io_in[12];
  assign \mchip.dut.read_data  = \mchip.dut.demux.I ;
  assign \mchip.dut.reset  = io_in[13];
  assign \mchip.dut.state_addr.D  = 7'h00;
  assign \mchip.dut.state_addr.clear  = 1'h0;
  assign \mchip.dut.state_addr.clock  = io_in[12];
  assign \mchip.dut.state_addr.load  = \mchip.dut.StateAddr_ld ;
  assign \mchip.dut.state_addr.up  = 1'h1;
  assign \mchip.dut.state_addr_in  = 7'h00;
  assign \mchip.dut.state_addr_out  = \mchip.dut.state_addr.Q ;
  assign \mchip.dut.tape_addr.D  = { 1'h0, \mchip.sync8.sync , \mchip.sync7.sync , \mchip.sync6.sync , \mchip.sync5.sync , \mchip.sync4.sync , \mchip.sync3.sync  };
  assign \mchip.dut.tape_addr.clear  = 1'h0;
  assign \mchip.dut.tape_addr.clock  = io_in[12];
  assign \mchip.dut.tape_addr_init.D  = { 1'h0, \mchip.sync8.sync , \mchip.sync7.sync , \mchip.sync6.sync , \mchip.sync5.sync , \mchip.sync4.sync , \mchip.sync3.sync  };
  assign \mchip.dut.tape_addr_init.Q  = 7'h00;
  assign \mchip.dut.tape_addr_init.clear  = 1'h0;
  assign \mchip.dut.tape_addr_init.clock  = io_in[12];
  assign \mchip.dut.tape_addr_min.D [1:0] = { \mchip.sync3.sync , 1'h1 };
  assign \mchip.dut.tape_addr_min.Q [0] = 1'h1;
  assign \mchip.dut.tape_addr_min.clear  = 1'h0;
  assign \mchip.dut.tape_addr_min.clock  = io_in[12];
  assign \mchip.dut.tape_addr_min.en  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.tape_addr_out  = \mchip.dut.tape_addr.Q ;
  assign \mchip.dut.tape_in  = 1'h0;
  assign \mchip.dut.tape_init_addr  = 7'h00;
  assign \mchip.dut.tape_min_addr_in  = { \mchip.dut.tape_addr_min.D [6:2], \mchip.sync3.sync , 1'h1 };
  assign \mchip.dut.tape_min_addr_out  = { \mchip.dut.tape_addr_min.Q [6:1], 1'h1 };
  assign \mchip.dut.tape_reg.clear  = \mchip.dut.fsm.currState [0];
  assign \mchip.dut.tape_reg.clock  = io_in[12];
  assign \mchip.dut.tape_reg.en  = \mchip.dut.StateAddr_ld ;
  assign \mchip.dut.tape_reg_in  = \mchip.dut.tape_reg.D ;
  assign \mchip.dut.tape_reg_out  = \mchip.dut.tape_reg.Q ;
  assign \mchip.dut.write_data  = \mchip.dut.memory.data_in ;
  assign \mchip.input_data  = { 1'h0, \mchip.sync8.sync , \mchip.sync7.sync , \mchip.sync6.sync , \mchip.sync5.sync , \mchip.sync4.sync , \mchip.sync3.sync  };
  assign \mchip.io_in  = io_in[11:0];
  assign \mchip.io_out  = { \mchip.dut.display_reg.Q , \mchip.dut.Compute_done  };
  assign \mchip.reset  = io_in[13];
  assign \mchip.sync1.async  = io_in[1];
  assign \mchip.sync1.clock  = io_in[12];
  assign \mchip.sync2.async  = io_in[0];
  assign \mchip.sync2.clock  = io_in[12];
  assign \mchip.sync3.async  = io_in[2];
  assign \mchip.sync3.clock  = io_in[12];
  assign \mchip.sync4.async  = io_in[3];
  assign \mchip.sync4.clock  = io_in[12];
  assign \mchip.sync5.async  = io_in[4];
  assign \mchip.sync5.clock  = io_in[12];
  assign \mchip.sync6.async  = io_in[5];
  assign \mchip.sync6.clock  = io_in[12];
  assign \mchip.sync7.async  = io_in[6];
  assign \mchip.sync7.clock  = io_in[12];
  assign \mchip.sync8.async  = io_in[7];
  assign \mchip.sync8.clock  = io_in[12];
endmodule