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When loading firmware via Mailbox from SOC, My test waits for ready_for_fw indication, locks Mailbox, Loads CMD, DLEN and DATAOUT, triggers Mailbox execute. It then waits for mailbox successful status to clears the Execute to complete the mailbox flow as mentioned in the integration spec. I do see the flow complete and see the eady_for_runtime bit set as expected. However, during this whole flow, "mailbox_flow_done" bit was never asserted/"mailbox_flow_done" field of CPTRA_FLOW_STATUS csr was never set by Risc-V.
Questions:
There is no clear mention of when to expect the "mailbox_flow_done" bit to be set during the Firmware loading thru mailbox process. Ive looked in the Integration and Hardware spec. Please point me to any documentation if you can.
I do see the mailbox_data_avail and other fields in CPTRA_FLOW_STATUS triggered as expected. Is there any delay or additional steps to trigger the "mailbox_flow_done"? Please let me know.
Hi,
When loading firmware via Mailbox from SOC, My test waits for ready_for_fw indication, locks Mailbox, Loads CMD, DLEN and DATAOUT, triggers Mailbox execute. It then waits for mailbox successful status to clears the Execute to complete the mailbox flow as mentioned in the integration spec. I do see the flow complete and see the eady_for_runtime bit set as expected. However, during this whole flow, "mailbox_flow_done" bit was never asserted/"mailbox_flow_done" field of CPTRA_FLOW_STATUS csr was never set by Risc-V.
Questions:
https://github.com/chipsalliance/caliptra-rtl/blob/main/docs/CaliptraIntegrationSpecification.md#mailbox
Thanks
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