From 73695327315e4b1f72796665555870894ba84923 Mon Sep 17 00:00:00 2001 From: nand2mario Date: Fri, 5 Apr 2024 10:50:28 +0800 Subject: [PATCH] fix nano build --- src/dpram.v | 6 +- src/nestang_top.sv | 20 +++-- src/tang_nano_20k/gowin_pll_nes.ipc | 7 +- src/tang_nano_20k/gowin_pll_nes.mod | 9 ++- src/tang_nano_20k/gowin_pll_nes.v | 40 ++++++---- src/tang_nano_20k/nestang.cst | 115 +++++++++++++++++----------- src/tang_nano_20k/nestang.sdc | 4 +- src/tang_primer_25k/nestang.cst | 29 ++++--- 8 files changed, 140 insertions(+), 90 deletions(-) diff --git a/src/dpram.v b/src/dpram.v index a61a109..6f97d72 100644 --- a/src/dpram.v +++ b/src/dpram.v @@ -22,15 +22,17 @@ localparam SIZE = 1 << widthad_a; reg [width_a-1:0] mem [0:SIZE-1]; always @(posedge clock_a) begin - q_a <= mem[address_a]; if (wren_a) mem[address_a] <= data_a; + else + q_a <= mem[address_a]; end always @(posedge clock_b) begin - q_b <= mem[address_b]; if (wren_b) mem[address_b] <= data_b; + else + q_b <= mem[address_b]; end endmodule \ No newline at end of file diff --git a/src/nestang_top.sv b/src/nestang_top.sv index ccaa669..3cffd26 100644 --- a/src/nestang_top.sv +++ b/src/nestang_top.sv @@ -69,12 +69,12 @@ module nestang_top ( // NES gamepad `ifdef NANO - output NES_gamepad_data_clock, - output NES_gampepad_data_latch, - input NES_gampead_serial_data, - output NES_gamepad_data_clock2, - output NES_gampepad_data_latch2, - input NES_gampead_serial_data2, + // output NES_gamepad_data_clock, + // output NES_gampepad_data_latch, + // input NES_gampead_serial_data, + // output NES_gamepad_data_clock2, + // output NES_gampepad_data_latch2, + // input NES_gampead_serial_data2, `endif // HDMI TX @@ -206,7 +206,7 @@ gowin_pll_nes pll_nes (.clkin(sys_clk), .clkout0(clk), .clkout1(fclk), .clkout2( // sys_clk 27Mhz wire clk27 = sys_clk; // Nano20K: native 27Mhz system clock wire clk_sdram; -gowin_pll_nes pll_nes(.clkin(sys_clk), ..clkoutd3(clk), clkout(fclk), .clkoutp(clk_sdram)); +gowin_pll_nes pll_nes(.clkin(sys_clk), .clkoutd3(clk), .clkout(fclk), .clkoutp(clk_sdram)); `endif // PRIMER // USB clock 12Mhz @@ -218,18 +218,16 @@ gowin_pll_nes pll_nes(.clkin(sys_clk), ..clkoutd3(clk), clkout(fclk), .clkoutp(c // HDMI domain clocks wire hclk; // 720p pixel clock: 74.25 Mhz wire hclk5; // 5x pixel clock: 371.25 Mhz -wire pll_lock; gowin_pll_hdmi pll_hdmi ( .clkin(clk27), - .clkout(hclk5), - .lock(pll_lock) + .clkout(hclk5) ); CLKDIV #(.DIV_MODE(5)) div5 ( .CLKOUT(hclk), .HCLKIN(hclk5), - .RESETN(sys_resetn & pll_lock), + .RESETN(sys_resetn), .CALIB(1'b0) ); diff --git a/src/tang_nano_20k/gowin_pll_nes.ipc b/src/tang_nano_20k/gowin_pll_nes.ipc index 1a86ca6..1256140 100644 --- a/src/tang_nano_20k/gowin_pll_nes.ipc +++ b/src/tang_nano_20k/gowin_pll_nes.ipc @@ -12,14 +12,17 @@ CLKFB_SOURCE=0 CLKIN_FREQ=27 CLKOUTD=false CLKOUTD3_SOURCE_CLKOUT=true -CLKOUTP=false +CLKOUTP=true CLKOUT_BYPASS=false CLKOUT_DIVIDE_DYN=true CLKOUT_FREQ=64.8 CLKOUT_TOLERANCE=0 -DYNAMIC=true +DYNAMIC=false LANG=0 LOCK_EN=false MODE_GENERAL=true PLL_PWD=false RESET_PLL=false +CLKOUTP_BYPASS=false +CLKOUTP_DUTY_CYCLE=6 +CLKOUTP_PHASE=10 diff --git a/src/tang_nano_20k/gowin_pll_nes.mod b/src/tang_nano_20k/gowin_pll_nes.mod index 05a4e4b..44dc2c8 100644 --- a/src/tang_nano_20k/gowin_pll_nes.mod +++ b/src/tang_nano_20k/gowin_pll_nes.mod @@ -7,7 +7,7 @@ -mod_name gowin_pll_nes -file_name gowin_pll_nes --path /home/zf/share/fpga/nestang/src/tang_nano_20k/ +-path D:/Gowin/dev/nestang/src/tang_nano_20k/ -type PLL -rPll true -file_type vlg @@ -18,16 +18,17 @@ -fbdiv_sel 12 -dyn_odiv_sel false -odiv_sel 8 --dyn_da_en true +-dyn_da_en false -rst_sig false -rst_sig_p false -fclkin 27 -clkfb_sel 0 -en_lock false -clkout_bypass false --clkout_ft_dir 1 --en_clkoutp false +-en_clkoutp true -clkoutp_bypass false +-psda_sel 10 +-dutyda_sel 8 -en_clkoutd false -clkoutd_bypass false -en_clkoutd3 true diff --git a/src/tang_nano_20k/gowin_pll_nes.v b/src/tang_nano_20k/gowin_pll_nes.v index 6ff1937..a94a68e 100644 --- a/src/tang_nano_20k/gowin_pll_nes.v +++ b/src/tang_nano_20k/gowin_pll_nes.v @@ -1,24 +1,34 @@ +//Copyright (C)2014-2023 Gowin Semiconductor Corporation. +//All rights reserved. +//File Title: IP file +//Tool Version: V1.9.9 (64-bit) +//Part Number: GW2AR-LV18QN88C8/I7 +//Device: GW2AR-18 +//Device Version: C +//Created Time: Fri Apr 5 10:42:16 2024 -// 27Mhz in, 64.8Mhz / 21.6Mhz out -module gowin_pll_nes (clkout, clkoutd3, clkoutp, clkin); +module gowin_pll_nes (clkout, clkoutp, clkoutd3, clkin); -output clkout, clkoutd3, clkoutp; +output clkout; +output clkoutp; +output clkoutd3; input clkin; -wire lock; -wire reset = 0; +wire lock_o; wire clkoutd_o; +wire gw_vcc; wire gw_gnd; +assign gw_vcc = 1'b1; assign gw_gnd = 1'b0; rPLL rpll_inst ( .CLKOUT(clkout), - .LOCK(lock), + .LOCK(lock_o), .CLKOUTP(clkoutp), .CLKOUTD(clkoutd_o), .CLKOUTD3(clkoutd3), - .RESET(reset), + .RESET(gw_gnd), .RESET_P(gw_gnd), .CLKIN(clkin), .CLKFB(gw_gnd), @@ -27,19 +37,17 @@ rPLL rpll_inst ( .ODSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}), .PSDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}), .DUTYDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}), - .FDLY({gw_gnd,gw_gnd,gw_gnd,gw_gnd}) + .FDLY({gw_vcc,gw_vcc,gw_vcc,gw_vcc}) ); -// 27 -> 64.8 Mhz / 21.6 Mhz (target 21.477 Mhz) defparam rpll_inst.FCLKIN = "27"; -defparam rpll_inst.IDIV_SEL = 4; -defparam rpll_inst.FBDIV_SEL = 11; -defparam rpll_inst.ODIV_SEL = 8; - defparam rpll_inst.DYN_IDIV_SEL = "false"; +defparam rpll_inst.IDIV_SEL = 4; defparam rpll_inst.DYN_FBDIV_SEL = "false"; +defparam rpll_inst.FBDIV_SEL = 11; defparam rpll_inst.DYN_ODIV_SEL = "false"; -defparam rpll_inst.PSDA_SEL = "1000"; +defparam rpll_inst.ODIV_SEL = 8; +defparam rpll_inst.PSDA_SEL = "1010"; defparam rpll_inst.DYN_DA_EN = "false"; defparam rpll_inst.DUTYDA_SEL = "1000"; defparam rpll_inst.CLKOUT_FT_DIR = 1'b1; @@ -53,6 +61,6 @@ defparam rpll_inst.CLKOUTD_BYPASS = "false"; defparam rpll_inst.DYN_SDIV_SEL = 2; defparam rpll_inst.CLKOUTD_SRC = "CLKOUT"; defparam rpll_inst.CLKOUTD3_SRC = "CLKOUT"; -defparam rpll_inst.DEVICE = "GW2AR-18"; +defparam rpll_inst.DEVICE = "GW2AR-18C"; -endmodule //Gowin_rPLL +endmodule //gowin_pll_nes diff --git a/src/tang_nano_20k/nestang.cst b/src/tang_nano_20k/nestang.cst index 927ccb9..bb61659 100644 --- a/src/tang_nano_20k/nestang.cst +++ b/src/tang_nano_20k/nestang.cst @@ -7,6 +7,34 @@ //Device Version: C //Created Time: Mon 01 22 09:37:57 2024 +IO_LOC "sys_clk" 4; +IO_PORT "sys_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3; +IO_LOC "reset2" 48; +IO_PORT "reset2" PULL_MODE=DOWN BANK_VCCIO=3.3; +IO_LOC "s1" 88; +IO_PORT "s1" PULL_MODE=NONE BANK_VCCIO=3.3; + +// UART +IO_LOC "UART_TXD" 69; +IO_PORT "UART_TXD" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "UART_RXD" 70; +IO_PORT "UART_RXD" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; + +// SPI flash +IO_LOC "flash_spi_cs_n" 60; +IO_PORT "flash_spi_cs_n" IO_TYPE=LVCMOS33 PULL_MODE=NONE; +IO_LOC "flash_spi_wp_n" 57; +IO_PORT "flash_spi_wp_n" IO_TYPE=LVCMOS33 PULL_MODE=NONE; +IO_LOC "flash_spi_hold_n" 63; +IO_PORT "flash_spi_hold_n" IO_TYPE=LVCMOS33 PULL_MODE=NONE; +IO_LOC "flash_spi_miso" 62; // MSPI_DO +IO_PORT "flash_spi_miso" IO_TYPE=LVCMOS33 PULL_MODE=NONE; +IO_LOC "flash_spi_mosi" 61; // MSPI_DI +IO_PORT "flash_spi_mosi" IO_TYPE=LVCMOS33 PULL_MODE=NONE; +IO_LOC "flash_spi_clk" 59; +IO_PORT "flash_spi_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE; + +// HDMI IO_LOC "tmds_d_p[0]" 35,36; IO_PORT "tmds_d_p[0]" PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; IO_LOC "tmds_d_p[1]" 37,38; @@ -15,40 +43,59 @@ IO_LOC "tmds_d_p[2]" 39,40; IO_PORT "tmds_d_p[2]" PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; IO_LOC "tmds_clk_p" 33,34; IO_PORT "tmds_clk_p" PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "NES_gampepad_data_latch2" 29; -IO_PORT "NES_gampepad_data_latch2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; -IO_LOC "NES_gamepad_data_clock2" 26; -IO_PORT "NES_gamepad_data_clock2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; -IO_LOC "NES_gampepad_data_latch" 28; -IO_PORT "NES_gampepad_data_latch" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; -IO_LOC "NES_gamepad_data_clock" 27; -IO_PORT "NES_gamepad_data_clock" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; -IO_LOC "joystick_cs2" 72; -IO_PORT "joystick_cs2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "joystick_mosi2" 53; -IO_PORT "joystick_mosi2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "joystick_clk2" 52; -IO_PORT "joystick_clk2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +// IO_LOC "NES_gampepad_data_latch2" 29; +// IO_PORT "NES_gampepad_data_latch2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; +// IO_LOC "NES_gamepad_data_clock2" 26; +// IO_PORT "NES_gamepad_data_clock2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; +// IO_LOC "NES_gampepad_data_latch" 28; +// IO_PORT "NES_gampepad_data_latch" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; +// IO_LOC "NES_gamepad_data_clock" 27; +// IO_PORT "NES_gamepad_data_clock" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=24 BANK_VCCIO=3.3; +// IO_LOC "NES_gampead_serial_data2" 30; +// IO_PORT "NES_gampead_serial_data2" IO_TYPE=LVCMOS33 PULL_MODE=NONE PCI_CLAMP=OFF BANK_VCCIO=3.3; +// IO_LOC "NES_gampead_serial_data" 25; +// IO_PORT "NES_gampead_serial_data" IO_TYPE=LVCMOS33 PULL_MODE=NONE PCI_CLAMP=OFF BANK_VCCIO=3.3; + +// Controllers +IO_LOC "joystick_clk" 17; +IO_PORT "joystick_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; IO_LOC "joystick_cs" 18; IO_PORT "joystick_cs" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; IO_LOC "joystick_mosi" 20; IO_PORT "joystick_mosi" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "joystick_clk" 17; -IO_PORT "joystick_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "sd_dat3" 81; -IO_PORT "sd_dat3" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "sd_dat2" 80; -IO_PORT "sd_dat2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "sd_dat1" 85; -IO_PORT "sd_dat1" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "joystick_miso" 19; +IO_PORT "joystick_miso" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; + +IO_LOC "joystick_clk2" 52; +IO_PORT "joystick_clk2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "joystick_cs2" 72; +IO_PORT "joystick_cs2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "joystick_mosi2" 53; +IO_PORT "joystick_mosi2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "joystick_miso2" 71; +IO_PORT "joystick_miso2" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; + +// SD Card IO_LOC "sd_clk" 83; IO_PORT "sd_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "sd_cmd" 82; +IO_PORT "sd_cmd" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "sd_dat0" 84; +IO_PORT "sd_dat0" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3; +IO_LOC "sd_dat1" 85; +IO_PORT "sd_dat1" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "sd_dat2" 80; +IO_PORT "sd_dat2" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; +IO_LOC "sd_dat3" 81; +IO_PORT "sd_dat3" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; + +// LED IO_LOC "led[1]" 16; IO_PORT "led[1]" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3; IO_LOC "led[0]" 15; IO_PORT "led[0]" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "UART_TXD" 69; -IO_PORT "UART_TXD" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3; + +// USB IO_LOC "usbdp2" 56; IO_PORT "usbdp2" IO_TYPE=LVCMOS33 PULL_MODE=DOWN DRIVE=8 BANK_VCCIO=3.3; IO_LOC "usbdm2" 54; @@ -57,23 +104,3 @@ IO_LOC "usbdp" 42; IO_PORT "usbdp" IO_TYPE=LVCMOS33 PULL_MODE=DOWN DRIVE=8 BANK_VCCIO=3.3; IO_LOC "usbdm" 41; IO_PORT "usbdm" IO_TYPE=LVCMOS33 PULL_MODE=DOWN DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "sd_cmd" 82; -IO_PORT "sd_cmd" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3; -IO_LOC "NES_gampead_serial_data2" 30; -IO_PORT "NES_gampead_serial_data2" IO_TYPE=LVCMOS33 PULL_MODE=NONE PCI_CLAMP=OFF BANK_VCCIO=3.3; -IO_LOC "NES_gampead_serial_data" 25; -IO_PORT "NES_gampead_serial_data" IO_TYPE=LVCMOS33 PULL_MODE=NONE PCI_CLAMP=OFF BANK_VCCIO=3.3; -IO_LOC "joystick_miso2" 71; -IO_PORT "joystick_miso2" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; -IO_LOC "joystick_miso" 19; -IO_PORT "joystick_miso" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; -IO_LOC "sd_dat0" 84; -IO_PORT "sd_dat0" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3; -IO_LOC "UART_RXD" 70; -IO_PORT "UART_RXD" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3; -IO_LOC "reset2" 48; -IO_PORT "reset2" PULL_MODE=DOWN BANK_VCCIO=3.3; -IO_LOC "s1" 88; -IO_PORT "s1" PULL_MODE=NONE BANK_VCCIO=3.3; -IO_LOC "sys_clk" 4; -IO_PORT "sys_clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3; diff --git a/src/tang_nano_20k/nestang.sdc b/src/tang_nano_20k/nestang.sdc index 06c40de..0fdf876 100644 --- a/src/tang_nano_20k/nestang.sdc +++ b/src/tang_nano_20k/nestang.sdc @@ -1,13 +1,13 @@ // NES clocks -create_clock -name clk -period 37.04 [get_nets {sys_clk}] // 27 Mhz +create_clock -name clk -period 37.04 [get_nets {sys_clk}] // 27 Mhz //create_generated_clock -name clk -source [get_nets {fclk}] -master_clock pclk -divide_by 3 [get_nets {clk}] // 32.25 Mhz // USB clock //create_clock -name clk_usb -period 83.33 [get_nets {clk_usb}] // 12 Mhz // HDMI clocks -create_clock -name clk_p5 -period 2.6936 [get_nets {clk_p5}] // 371.25 Mhz +create_clock -name hclk5 -period 2.6936 [get_nets {hclk5}] // 371.25 Mhz //create_generated_clock -name clk_p -source [get_nets {clk_p}] -master_clock clk_p5 -divide_by 5 [get_nets {clk_p}] // 74.25 Mhz: 720p pixel clock //set_clock_groups -asynchronous -group [get_clocks {pclk} get_clocks{clk}] -group [get_clocks {clk_p5} get_clocks{clk_p}] diff --git a/src/tang_primer_25k/nestang.cst b/src/tang_primer_25k/nestang.cst index f6a8776..8ce0f7f 100644 --- a/src/tang_primer_25k/nestang.cst +++ b/src/tang_primer_25k/nestang.cst @@ -33,21 +33,32 @@ IO_PORT "tmds_d_p[2]" PULL_MODE=NONE IO_TYPE=LVCMOS33D; IO_LOC "tmds_d_n[2]" G5; IO_PORT "tmds_d_n[2]" PULL_MODE=NONE IO_TYPE=LVCMOS33D; -// SDCard (middle PMOD) -// A11/D2 E11/CMD K11/D0 L5/NC GND 3V3 -// A10/D3 E10/CLK L11/D1 K5/NC GND 3V3 -IO_LOC "sd_clk" D10; +// SDCard +IO_LOC "sd_clk" C11; IO_PORT "sd_clk" PULL_MODE=NONE IO_TYPE=LVCMOS33; IO_LOC "sd_cmd" D11; // MOSI IO_PORT "sd_cmd" PULL_MODE=NONE IO_TYPE=LVCMOS33; -IO_LOC "sd_dat0" B11; // MISO -IO_PORT "sd_dat0" PULL_MODE=NONE IO_TYPE=LVCMOS33; -IO_LOC "sd_dat1" B10; // 1 +IO_LOC "sd_dat0" B11; // MISO or SD card DO, needs pull-up +IO_PORT "sd_dat0" PULL_MODE=UP IO_TYPE=LVCMOS33; +IO_LOC "sd_dat1" G10; // 1 IO_PORT "sd_dat1" PULL_MODE=NONE IO_TYPE=LVCMOS33; -IO_LOC "sd_dat2" G11; // 1 +IO_LOC "sd_dat2" D10; // 1 IO_PORT "sd_dat2" PULL_MODE=NONE IO_TYPE=LVCMOS33; -IO_LOC "sd_dat3" G10; // 1 +IO_LOC "sd_dat3" G11; // 1 IO_PORT "sd_dat3" PULL_MODE=NONE IO_TYPE=LVCMOS33; +// old MUSELab SDCARD 1.0 +// IO_LOC "sd_clk" D10; +// IO_PORT "sd_clk" PULL_MODE=NONE IO_TYPE=LVCMOS33; +// IO_LOC "sd_cmd" D11; // MOSI +// IO_PORT "sd_cmd" PULL_MODE=NONE IO_TYPE=LVCMOS33; +// IO_LOC "sd_dat0" B11; // MISO or SD card DO, needs pull-up +// IO_PORT "sd_dat0" PULL_MODE=UP IO_TYPE=LVCMOS33; +// IO_LOC "sd_dat1" B10; // 1 +// IO_PORT "sd_dat1" PULL_MODE=NONE IO_TYPE=LVCMOS33; +// IO_LOC "sd_dat2" G11; // 1 +// IO_PORT "sd_dat2" PULL_MODE=NONE IO_TYPE=LVCMOS33; +// IO_LOC "sd_dat3" G10; // 1 +// IO_PORT "sd_dat3" PULL_MODE=NONE IO_TYPE=LVCMOS33; // UART through USB-C port IO_LOC "UART_RXD" B3; // the primer25k example is reversed