From f1d7dce736f255a4e25612fc8db8131f3c1e989a Mon Sep 17 00:00:00 2001 From: Nishant Date: Fri, 15 Jul 2022 19:37:40 +0000 Subject: [PATCH 01/14] Structure test directory and add level-zero-opt-tool --- .../Transforms/memref-alloc-to-gpu-alloc.mlir | 21 ++++ mlir/tools/CMakeLists.txt | 1 + mlir/tools/level-zero-opt/CMakeLists.txt | 58 +++++++++ mlir/tools/level-zero-opt/main.cpp | 27 ++++ mlir/tools/level-zero-opt/rewrite-wrapper.cpp | 115 ++++++++++++++++++ 5 files changed, 222 insertions(+) create mode 100644 mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir create mode 100644 mlir/tools/level-zero-opt/CMakeLists.txt create mode 100644 mlir/tools/level-zero-opt/main.cpp create mode 100644 mlir/tools/level-zero-opt/rewrite-wrapper.cpp diff --git a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir new file mode 100644 index 000000000..9dfacfa41 --- /dev/null +++ b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir @@ -0,0 +1,21 @@ +func.func @main() { + %c8 = arith.constant 8 : index + %c1 = arith.constant 1 : index + // CHECK: func.func @main() + %0 = memref.alloc() : memref<8xf32> + %1 = memref.alloc() : memref<8xf32> + %2 = memref.alloc() : memref<8xf32> + // CHECK: %memref = gpu.alloc () : memref<8xf32> + // CHECK: %memref_0 = gpu.alloc () : memref<8xf32> + // CHECK: %memref_1 = gpu.alloc () : memref<8xf32> + gpu.launch blocks(%arg0, %arg1, %arg2) in (%arg6 = %c8, %arg7 = %c1, %arg8 = %c1) threads(%arg3, %arg4, %arg5) in (%arg9 = %c1, %arg10 = %c1, %arg11 = %c1) { + %7 = gpu.block_id x + %8 = memref.load %0[%7] : memref<8xf32> + %9 = memref.load %1[%7] : memref<8xf32> + %10 = arith.addf %8, %9 : f32 + memref.store %10, %2[%7] : memref<8xf32> + gpu.terminator + } + %6 = memref.cast %2 : memref<8xf32> to memref<*xf32> + return +} diff --git a/mlir/tools/CMakeLists.txt b/mlir/tools/CMakeLists.txt index ea20925d0..6e7a0b988 100644 --- a/mlir/tools/CMakeLists.txt +++ b/mlir/tools/CMakeLists.txt @@ -13,4 +13,5 @@ # limitations under the License. add_subdirectory(level_zero_runner) +add_subdirectory(level-zero-opt) diff --git a/mlir/tools/level-zero-opt/CMakeLists.txt b/mlir/tools/level-zero-opt/CMakeLists.txt new file mode 100644 index 000000000..693d5eb30 --- /dev/null +++ b/mlir/tools/level-zero-opt/CMakeLists.txt @@ -0,0 +1,58 @@ +# Copyright 2022 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +project(level-zero-opt LANGUAGES CXX C) + +find_package(LLVM REQUIRED CONFIG) +find_package(MLIR REQUIRED CONFIG) + +list(APPEND CMAKE_MODULE_PATH "${MLIR_CMAKE_DIR}") +list(APPEND CMAKE_MODULE_PATH "${LLVM_CMAKE_DIR}") +include(AddLLVM) +include(AddMLIR) +include(HandleLLVMOptions) + +get_property(dialect_libs GLOBAL PROPERTY MLIR_DIALECT_LIBS) +get_property(conversion_libs GLOBAL PROPERTY MLIR_CONVERSION_LIBS) + +set(SOURCES_LIST + main.cpp + rewrite-wrapper.cpp + ) +set(HEADERS_LIST + ) + +add_executable(${PROJECT_NAME} ${SOURCES_LIST} ${HEADERS_LIST}) + +apply_llvm_compile_flags(${PROJECT_NAME}) + +target_link_libraries(${PROJECT_NAME} PRIVATE + mlir-extensions + ${dialect_libs} + ${conversion_libs} + MLIROptLib + MLIRPass + MLIRSupport + ) + +target_include_directories(${PROJECT_NAME} PRIVATE + ${LLVM_INCLUDE_DIRS} + ${MLIR_INCLUDE_DIRS} + ) + +set(CMAKE_INSTALL_BINDIR ./tools/level-zero-opt) + +install(TARGETS level-zero-opt + PERMISSIONS OWNER_WRITE OWNER_READ OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE + ) diff --git a/mlir/tools/level-zero-opt/main.cpp b/mlir/tools/level-zero-opt/main.cpp new file mode 100644 index 000000000..100813222 --- /dev/null +++ b/mlir/tools/level-zero-opt/main.cpp @@ -0,0 +1,27 @@ +// Copyright 2021 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include +#include +#include + +int main(int argc, char **argv) { + mlir::registerAllPasses(); + mlir::DialectRegistry registry; + mlir::registerAllDialects(registry); + return mlir::failed(MlirOptMain(argc, argv, + "L0 modular optimizer driver\n", registry, + /*preloadDialectsInContext=*/false)); +} diff --git a/mlir/tools/level-zero-opt/rewrite-wrapper.cpp b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp new file mode 100644 index 000000000..4977ab8de --- /dev/null +++ b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp @@ -0,0 +1,115 @@ +// Copyright 2021 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include +#include +#include +#include + +#include +#include + +#include "mlir/Dialect/GPU/Transforms/Passes.h" +#include "mlir-extensions/Conversion/gpu_to_gpu_runtime.hpp" +#include "mlir-extensions/Conversion/gpu_runtime_to_llvm.hpp" +#include "mlir-extensions/Transforms/rewrite_wrapper.hpp" + +namespace { +template +struct RewriteWrapper : plier::RewriteWrapperPass, + Op, void, Rewrite> {}; + +template struct PassWrapper : public T { + PassWrapper(mlir::StringRef arg, mlir::StringRef desc) + : argument(arg), description(desc) {} + + mlir::StringRef getArgument() const final { return argument; } + mlir::StringRef getDescription() const final { return description; } + +private: + mlir::StringRef argument; + mlir::StringRef description; +}; + +template +struct PassRegistrationWrapper + : public mlir::PassRegistration> { + PassRegistrationWrapper(mlir::StringRef arg, mlir::StringRef desc) + : mlir::PassRegistration>([arg, desc]() { + return std::make_unique>(arg, desc); + }) {} +}; + +static mlir::PassPipelineRegistration<> ParallelLoopToGpu( + "parallel-loop-to-gpu", "Maps scf parallel loop to gpu", + [](mlir::OpPassManager &pm) { + pm.addNestedPass(gpu_runtime::createParallelLoopGPUMappingPass()); + }); + +static mlir::PassPipelineRegistration<> InsertGpuAlloc( + "insert-gpu-alloc", "Converts memref alloc to gpu alloc", + [](mlir::OpPassManager &pm) { + pm.addNestedPass(gpu_runtime::createInsertGPUAllocsPass()); + }); + +static mlir::PassPipelineRegistration<> UnstrideMemrefPass( + "unstride-memref", "Used to flatten 2D to 1D", + [](mlir::OpPassManager &pm) { + pm.addNestedPass(gpu_runtime::createUnstrideMemrefsPass()); + }); + +static mlir::PassPipelineRegistration<> AbiAttrsPass( + "abi-attrs", "Create AbiAttrs Pass", + [](mlir::OpPassManager &pm) { + pm.addNestedPass( + gpu_runtime::createAbiAttrsPass()); + }); + +static mlir::PassPipelineRegistration<> SetSpirvCapabalities( + "set-spirv-capablilities", "Sets Spirv capabilities", + [](mlir::OpPassManager &pm) { + pm.addPass(gpu_runtime::createGPUToSpirvPass()); + }); + +static mlir::PassPipelineRegistration<> GpuToSpirv( + "gpu-to-spirv", "Converts Gpu to spirv module", + [](mlir::OpPassManager &pm) { + pm.addPass(gpu_runtime::createGPUToSpirvPass()); + }); + +static mlir::PassPipelineRegistration<> SerializeSpirv( + "serialize-spirv", "Serializes the spir-v binary", + [](mlir::OpPassManager &pm) { + pm.addPass(gpu_runtime::createSerializeSPIRVPass()); + }); + + static mlir::PassPipelineRegistration<> GpuToGpuRuntime( + "gpu-to-gpu-runtime", "Converts Gpu ops to gpu runteim", + [](mlir::OpPassManager &pm) { + pm.addNestedPass(gpu_runtime::createGPUExPass()); + }); + + static mlir::PassPipelineRegistration<> EnumerateEvents( + "enumerate-events", "Adds event dependency", + [](mlir::OpPassManager &pm) { + pm.addPass(gpu_runtime::createEnumerateEventsPass()); + }); + + static mlir::PassPipelineRegistration<> GpuToLlvm( + "convert-gpu-to-llvm", "Converts Gpu runtime dialect to llvm runtime calls", + [](mlir::OpPassManager &pm) { + pm.addPass(gpu_runtime::createGPUToLLVMPass()); + }); +} // namespace From c30b812e03f1d416cc027fb17012c6419ddae001 Mon Sep 17 00:00:00 2001 From: Nishant Date: Fri, 15 Jul 2022 23:11:52 +0000 Subject: [PATCH 02/14] Add pass level test cases --- mlir/test/Conversion/gpu-to-spirv.mlir | 58 +++++++++++++++++++ .../Transforms/memref-alloc-to-gpu-alloc.mlir | 2 + mlir/test/lit.cfg.py | 6 +- 3 files changed, 64 insertions(+), 2 deletions(-) create mode 100644 mlir/test/Conversion/gpu-to-spirv.mlir diff --git a/mlir/test/Conversion/gpu-to-spirv.mlir b/mlir/test/Conversion/gpu-to-spirv.mlir new file mode 100644 index 000000000..b05042f09 --- /dev/null +++ b/mlir/test/Conversion/gpu-to-spirv.mlir @@ -0,0 +1,58 @@ +// RUN: level-zero-opt --gpu-to-spirv %s | FileCheck %s + +module attributes {gpu.container_module, spv.target_env = #spv.target_env<#spv.vce, #spv.resource_limits<>>} { + func.func @main() { + %c8 = arith.constant 8 : index + %c1 = arith.constant 1 : index + %cst = arith.constant 2.200000e+00 : f32 + %cst_0 = arith.constant 1.100000e+00 : f32 + %cst_1 = arith.constant 0.000000e+00 : f32 + %memref = gpu.alloc () {gpu.alloc_shared} : memref<8xf32> + %memref_2 = gpu.alloc () {gpu.alloc_shared} : memref<8xf32> + %memref_3 = gpu.alloc () {gpu.alloc_shared} : memref<8xf32> + %0 = memref.cast %memref : memref<8xf32> to memref + %1 = memref.cast %memref_2 : memref<8xf32> to memref + %2 = memref.cast %memref_3 : memref<8xf32> to memref + call @fillResource1DFloat(%0, %cst_0) : (memref, f32) -> () + call @fillResource1DFloat(%1, %cst) : (memref, f32) -> () + call @fillResource1DFloat(%2, %cst_1) : (memref, f32) -> () + gpu.launch_func @main_kernel::@main_kernel blocks in (%c8, %c1, %c1) threads in (%c1, %c1, %c1) args(%memref : memref<8xf32>, %memref_2 : memref<8xf32>, %memref_3 : memref<8xf32>) + %3 = memref.cast %memref_3 : memref<8xf32> to memref<*xf32> + call @printMemrefF32(%3) : (memref<*xf32>) -> () + return + } + gpu.module @main_kernel { + gpu.func @main_kernel(%arg0: memref<8xf32>, %arg1: memref<8xf32>, %arg2: memref<8xf32>) kernel attributes {spv.entry_point_abi = #spv.entry_point_abi<>} { + cf.br ^bb1 + ^bb1: // pred: ^bb0 + %0 = gpu.block_id x + %1 = memref.load %arg0[%0] : memref<8xf32> + %2 = memref.load %arg1[%0] : memref<8xf32> + %3 = arith.addf %1, %2 : f32 + memref.store %3, %arg2[%0] : memref<8xf32> + gpu.return + } + + // CHECK: spv.module @__spv__main_kernel Physical64 OpenCL { + // CHECK: spv.GlobalVariable @__builtin_var_WorkgroupId__ built_in("WorkgroupId") : !spv.ptr, Input> + // CHECK: spv.func @main_kernel(%arg0: !spv.ptr, %arg1: !spv.ptr, %arg2: !spv.ptr) "None" attributes {spv.entry_point_abi = #spv.entry_point_abi<>, workgroup_attributions = 0 : i64} { + // CHECK: spv.Branch ^bb1 + // CHECK: ^bb1: // pred: ^bb0 + // CHECK: %__builtin_var_WorkgroupId___addr = spv.mlir.addressof @__builtin_var_WorkgroupId__ : !spv.ptr, Input> + // CHECK: %0 = spv.Load "Input" %__builtin_var_WorkgroupId___addr : vector<3xi64> + // CHECK: %1 = spv.CompositeExtract %0[0 : i32] : vector<3xi64> + // CHECK: %2 = spv.InBoundsPtrAccessChain %arg0[%1] : !spv.ptr, i64 + // CHECK: %3 = spv.Load "CrossWorkgroup" %2 ["Aligned", 4] : f32 + // CHECK: %4 = spv.InBoundsPtrAccessChain %arg1[%1] : !spv.ptr, i64 + // CHECK: %5 = spv.Load "CrossWorkgroup" %4 ["Aligned", 4] : f32 + // CHECK: %6 = spv.FAdd %3, %5 : f32 + // CHECK: %7 = spv.InBoundsPtrAccessChain %arg2[%1] : !spv.ptr, i64 + // CHECK: spv.Store "CrossWorkgroup" %7, %6 ["Aligned", 4] : f32 + // CHECK: spv.Return + // CHECK: } + // CHECK: } + + } + func.func private @fillResource1DFloat(memref, f32) + func.func private @printMemrefF32(memref<*xf32>) +} \ No newline at end of file diff --git a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir index 9dfacfa41..1e4c39f83 100644 --- a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir +++ b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir @@ -1,3 +1,5 @@ +// RUN: level-zero-opt --insert-gpu-alloc %s | FileCheck %s + func.func @main() { %c8 = arith.constant 8 : index %c1 = arith.constant 1 : index diff --git a/mlir/test/lit.cfg.py b/mlir/test/lit.cfg.py index 21eab1b42..f72f59b38 100644 --- a/mlir/test/lit.cfg.py +++ b/mlir/test/lit.cfg.py @@ -49,13 +49,15 @@ # test_exec_root: The root path where tests should be run. config.test_exec_root = os.path.join(config.imex_obj_root, 'mlir', 'test') config.imex_tools_dir = os.path.join(config.imex_obj_root, 'mlir', 'tools', 'level_zero_runner') +config.imex_level_zero_opt_dir = os.path.join(config.imex_obj_root, 'mlir', 'tools', 'level-zero-opt') # Tweak the PATH to include the tools dir. llvm_config.with_environment('PATH', config.llvm_tools_dir, append_path=True) -tool_dirs = [config.imex_tools_dir, config.llvm_tools_dir] +tool_dirs = [config.imex_tools_dir, config.llvm_tools_dir, config.imex_level_zero_opt_dir] tools = [ - 'level_zero_runner' + 'level_zero_runner', + 'level-zero-opt' ] llvm_config.add_tool_substitutions(tools, tool_dirs) From 460b82e2c6e99d6c905e5373484ce3723c4a78d1 Mon Sep 17 00:00:00 2001 From: Nishant Date: Tue, 19 Jul 2022 22:57:59 +0000 Subject: [PATCH 03/14] Remove redundant code --- mlir/tools/level-zero-opt/rewrite-wrapper.cpp | 28 +------------------ 1 file changed, 1 insertion(+), 27 deletions(-) diff --git a/mlir/tools/level-zero-opt/rewrite-wrapper.cpp b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp index 4977ab8de..c924d0f95 100644 --- a/mlir/tools/level-zero-opt/rewrite-wrapper.cpp +++ b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp @@ -26,32 +26,6 @@ #include "mlir-extensions/Conversion/gpu_runtime_to_llvm.hpp" #include "mlir-extensions/Transforms/rewrite_wrapper.hpp" -namespace { -template -struct RewriteWrapper : plier::RewriteWrapperPass, - Op, void, Rewrite> {}; - -template struct PassWrapper : public T { - PassWrapper(mlir::StringRef arg, mlir::StringRef desc) - : argument(arg), description(desc) {} - - mlir::StringRef getArgument() const final { return argument; } - mlir::StringRef getDescription() const final { return description; } - -private: - mlir::StringRef argument; - mlir::StringRef description; -}; - -template -struct PassRegistrationWrapper - : public mlir::PassRegistration> { - PassRegistrationWrapper(mlir::StringRef arg, mlir::StringRef desc) - : mlir::PassRegistration>([arg, desc]() { - return std::make_unique>(arg, desc); - }) {} -}; - static mlir::PassPipelineRegistration<> ParallelLoopToGpu( "parallel-loop-to-gpu", "Maps scf parallel loop to gpu", [](mlir::OpPassManager &pm) { @@ -112,4 +86,4 @@ static mlir::PassPipelineRegistration<> SerializeSpirv( [](mlir::OpPassManager &pm) { pm.addPass(gpu_runtime::createGPUToLLVMPass()); }); -} // namespace + From afe9f04ff8454997bd9bfc0f824bac433d788c6a Mon Sep 17 00:00:00 2001 From: Nishant Date: Wed, 20 Jul 2022 20:22:48 +0000 Subject: [PATCH 04/14] Address PR feedback --- mlir/test/Conversion/gpu-to-spirv.mlir | 20 +++++++++---------- mlir/tools/level-zero-opt/main.cpp | 2 +- mlir/tools/level-zero-opt/rewrite-wrapper.cpp | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/mlir/test/Conversion/gpu-to-spirv.mlir b/mlir/test/Conversion/gpu-to-spirv.mlir index b05042f09..576e6ddee 100644 --- a/mlir/test/Conversion/gpu-to-spirv.mlir +++ b/mlir/test/Conversion/gpu-to-spirv.mlir @@ -39,15 +39,15 @@ module attributes {gpu.container_module, spv.target_env = #spv.target_env<#spv.v // CHECK: spv.Branch ^bb1 // CHECK: ^bb1: // pred: ^bb0 // CHECK: %__builtin_var_WorkgroupId___addr = spv.mlir.addressof @__builtin_var_WorkgroupId__ : !spv.ptr, Input> - // CHECK: %0 = spv.Load "Input" %__builtin_var_WorkgroupId___addr : vector<3xi64> - // CHECK: %1 = spv.CompositeExtract %0[0 : i32] : vector<3xi64> - // CHECK: %2 = spv.InBoundsPtrAccessChain %arg0[%1] : !spv.ptr, i64 - // CHECK: %3 = spv.Load "CrossWorkgroup" %2 ["Aligned", 4] : f32 - // CHECK: %4 = spv.InBoundsPtrAccessChain %arg1[%1] : !spv.ptr, i64 - // CHECK: %5 = spv.Load "CrossWorkgroup" %4 ["Aligned", 4] : f32 - // CHECK: %6 = spv.FAdd %3, %5 : f32 - // CHECK: %7 = spv.InBoundsPtrAccessChain %arg2[%1] : !spv.ptr, i64 - // CHECK: spv.Store "CrossWorkgroup" %7, %6 ["Aligned", 4] : f32 + // CHECK: %[[VAR0:.*]] = spv.Load "Input" %__builtin_var_WorkgroupId___addr : vector<3xi64> + // CHECK: %[[VAR1:.*]] = spv.CompositeExtract %[[VAR0:.*]][0 : i32] : vector<3xi64> + // CHECK: %[[VAR2:.*]] = spv.InBoundsPtrAccessChain %arg0[%[[VAR1:.*]]] : !spv.ptr, i64 + // CHECK: %[[VAR3:.*]] = spv.Load "CrossWorkgroup" %[[VAR2:.*]] ["Aligned", 4] : f32 + // CHECK: %[[VAR4:.*]] = spv.InBoundsPtrAccessChain %arg1[%[[VAR1:.*]]] : !spv.ptr, i64 + // CHECK: %[[VAR5:.*]] = spv.Load "CrossWorkgroup" %[[VAR4:.*]] ["Aligned", 4] : f32 + // CHECK: %[[VAR6:.*]] = spv.FAdd %[[VAR3:.*]], %[[VAR5:.*]] : f32 + // CHECK: %[[VAR7:.*]] = spv.InBoundsPtrAccessChain %arg2[%[[VAR1:.*]]] : !spv.ptr, i64 + // CHECK: spv.Store "CrossWorkgroup" %[[VAR7:.*]], %[[VAR6:.*]] ["Aligned", 4] : f32 // CHECK: spv.Return // CHECK: } // CHECK: } @@ -55,4 +55,4 @@ module attributes {gpu.container_module, spv.target_env = #spv.target_env<#spv.v } func.func private @fillResource1DFloat(memref, f32) func.func private @printMemrefF32(memref<*xf32>) -} \ No newline at end of file +} diff --git a/mlir/tools/level-zero-opt/main.cpp b/mlir/tools/level-zero-opt/main.cpp index 100813222..15399c3b2 100644 --- a/mlir/tools/level-zero-opt/main.cpp +++ b/mlir/tools/level-zero-opt/main.cpp @@ -1,4 +1,4 @@ -// Copyright 2021 Intel Corporation +// Copyright 2022 Intel Corporation // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. diff --git a/mlir/tools/level-zero-opt/rewrite-wrapper.cpp b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp index c924d0f95..0585a5bd7 100644 --- a/mlir/tools/level-zero-opt/rewrite-wrapper.cpp +++ b/mlir/tools/level-zero-opt/rewrite-wrapper.cpp @@ -1,4 +1,4 @@ -// Copyright 2021 Intel Corporation +// Copyright 2022 Intel Corporation // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. From 644ba8204449c9e014c9f6c326ee8ae5a1dc4e05 Mon Sep 17 00:00:00 2001 From: Nishant Date: Thu, 28 Jul 2022 18:17:19 +0000 Subject: [PATCH 05/14] Disable e2e tests and enable tests in CI --- .github/workflows/build.yml | 8 ++++++++ mlir/test/L0_RUNNER/lit.local.cfg | 1 + 2 files changed, 9 insertions(+) create mode 100644 mlir/test/L0_RUNNER/lit.local.cfg diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index ad6648674..368b34fbb 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -149,6 +149,7 @@ jobs: -DLLVM_ENABLE_ASSERTIONS=ON \ -DLLVM_ENABLE_RTTI=ON \ -DLLVM_USE_LINKER=gold \ + -DLLVM_INSTALL_UTILS=ON \ -DCMAKE_INSTALL_PREFIX=/home/runner/work/llvm-mlir/_mlir_install || exit 1 cmake --build . -j ${np} || exit 1 cmake --install . || exit 1 @@ -169,3 +170,10 @@ jobs: --imex-enable-igpu \ --imex-enable-tests \ --imex-tbb-dir /${TBB_PATH}/lib/cmake/tbb + + - name: Run IMEX core test cases + shell: bash -l {0} + + run: | + cd _build || exit 1 + cmake --build . --target check-l0-runner || exit 1 \ No newline at end of file diff --git a/mlir/test/L0_RUNNER/lit.local.cfg b/mlir/test/L0_RUNNER/lit.local.cfg new file mode 100644 index 000000000..059ca10b0 --- /dev/null +++ b/mlir/test/L0_RUNNER/lit.local.cfg @@ -0,0 +1 @@ +config.unsupported = True \ No newline at end of file From 741d6cf9f8a375961916892046d666fb2b369b97 Mon Sep 17 00:00:00 2001 From: lchang552 Date: Thu, 28 Jul 2022 20:53:36 +0000 Subject: [PATCH 06/14] enable core tests CI disable GPU related --- .github/workflows/build.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index d23d91d75..7573ac767 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -149,10 +149,12 @@ jobs: -DLLVM_ENABLE_ASSERTIONS=ON \ -DLLVM_ENABLE_RTTI=ON \ -DLLVM_USE_LINKER=gold \ - -DLLVM_INSTALL_UTILS=ON \ -DCMAKE_INSTALL_PREFIX=/home/runner/work/llvm-mlir/_mlir_install || exit 1 cmake --build . -j ${np} || exit 1 cmake --install . || exit 1 + cp bin/FileCheck ../../test-install/bin/ + cp bin/count ../../test-install/bin/ + cp bin/not ../../test-install/bin/ popd - name: Build IMEX From b662ca62e4588838ac23a9071def61e290326b28 Mon Sep 17 00:00:00 2001 From: lchang552 Date: Thu, 28 Jul 2022 21:02:36 +0000 Subject: [PATCH 07/14] reset cache --- .github/workflows/build.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 7573ac767..d0456dfb9 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -76,7 +76,7 @@ jobs: id: cache-llvm-mlir uses: actions/cache@v3 env: - CACHE_NUMBER: 0 # Increase to reset cache + CACHE_NUMBER: 1 # Increase to reset cache with: path: | /home/runner/work/llvm-mlir/_mlir_install/** From d2779ded15aaa2a8bca5cd3da00537426eb2b1bc Mon Sep 17 00:00:00 2001 From: lchang552 Date: Thu, 28 Jul 2022 21:22:29 +0000 Subject: [PATCH 08/14] fix copy path --- .github/workflows/build.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index d0456dfb9..6c651e878 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -152,9 +152,9 @@ jobs: -DCMAKE_INSTALL_PREFIX=/home/runner/work/llvm-mlir/_mlir_install || exit 1 cmake --build . -j ${np} || exit 1 cmake --install . || exit 1 - cp bin/FileCheck ../../test-install/bin/ - cp bin/count ../../test-install/bin/ - cp bin/not ../../test-install/bin/ + cp bin/FileCheck /home/runner/work/llvm-mlir/_mlir_install/test-install/bin/ + cp bin/count /home/runner/work/llvm-mlir/_mlir_install/test-install/bin/ + cp bin/not /home/runner/work/llvm-mlir/_mlir_install/test-install/bin/ popd - name: Build IMEX From 12b8098c12993847cda6f3fb78444d5890cc11ff Mon Sep 17 00:00:00 2001 From: lchang552 Date: Thu, 28 Jul 2022 21:23:51 +0000 Subject: [PATCH 09/14] fix copy path --- .github/workflows/build.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index d0456dfb9..4f9b26d8c 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -152,9 +152,9 @@ jobs: -DCMAKE_INSTALL_PREFIX=/home/runner/work/llvm-mlir/_mlir_install || exit 1 cmake --build . -j ${np} || exit 1 cmake --install . || exit 1 - cp bin/FileCheck ../../test-install/bin/ - cp bin/count ../../test-install/bin/ - cp bin/not ../../test-install/bin/ + cp bin/FileCheck /home/runner/work/llvm-mlir/_mlir_install/bin/ + cp bin/count /home/runner/work/llvm-mlir/_mlir_install/bin/ + cp bin/not /home/runner/work/llvm-mlir/_mlir_install/bin/ popd - name: Build IMEX From 1e7c04bc4dcd70beb02fce676351b54ea21d6488 Mon Sep 17 00:00:00 2001 From: lchang552 Date: Fri, 29 Jul 2022 18:30:52 +0000 Subject: [PATCH 10/14] address review, change back CI llvm cache number --- .github/workflows/build.yml | 2 +- mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir | 11 ++++++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 4f9b26d8c..ef8857aac 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -76,7 +76,7 @@ jobs: id: cache-llvm-mlir uses: actions/cache@v3 env: - CACHE_NUMBER: 1 # Increase to reset cache + CACHE_NUMBER: 0 # Increase to reset cache with: path: | /home/runner/work/llvm-mlir/_mlir_install/** diff --git a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir index 1e4c39f83..d852d27ba 100644 --- a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir +++ b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir @@ -7,16 +7,21 @@ func.func @main() { %0 = memref.alloc() : memref<8xf32> %1 = memref.alloc() : memref<8xf32> %2 = memref.alloc() : memref<8xf32> - // CHECK: %memref = gpu.alloc () : memref<8xf32> - // CHECK: %memref_0 = gpu.alloc () : memref<8xf32> - // CHECK: %memref_1 = gpu.alloc () : memref<8xf32> + // CHECK: %[[MEMREF0:.*]]= gpu.alloc () : memref<8xf32> + // CHECK: %[[MEMREF1:.*]]= gpu.alloc () : memref<8xf32> + // CHECK: %[[MEMREF2:.*]]= gpu.alloc () : memref<8xf32> gpu.launch blocks(%arg0, %arg1, %arg2) in (%arg6 = %c8, %arg7 = %c1, %arg8 = %c1) threads(%arg3, %arg4, %arg5) in (%arg9 = %c1, %arg10 = %c1, %arg11 = %c1) { + // CHECK: gpu.launch {{.*}} %7 = gpu.block_id x %8 = memref.load %0[%7] : memref<8xf32> %9 = memref.load %1[%7] : memref<8xf32> + + // CHECK: [[VAR0:.*]] = memref.load %[[MEMREF0:.*]][%1] : memref<8xf32> + // CHECK: [[VAR1:.*]] = memref.load %[[MEMREF1:.*]][%1] : memref<8xf32> %10 = arith.addf %8, %9 : f32 memref.store %10, %2[%7] : memref<8xf32> gpu.terminator + // CHECK: gpu.terminator } %6 = memref.cast %2 : memref<8xf32> to memref<*xf32> return From dd5e9beab285f5c9ab430c614fbcf6487a80c50a Mon Sep 17 00:00:00 2001 From: lchang552 Date: Fri, 29 Jul 2022 18:38:04 +0000 Subject: [PATCH 11/14] cache number --- .github/workflows/build.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index ef8857aac..4f9b26d8c 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -76,7 +76,7 @@ jobs: id: cache-llvm-mlir uses: actions/cache@v3 env: - CACHE_NUMBER: 0 # Increase to reset cache + CACHE_NUMBER: 1 # Increase to reset cache with: path: | /home/runner/work/llvm-mlir/_mlir_install/** From 0b473a206df343c3b5a93f220deb1436e0e05bae Mon Sep 17 00:00:00 2001 From: lchang552 Date: Fri, 29 Jul 2022 18:39:50 +0000 Subject: [PATCH 12/14] address review #2 --- mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir index d852d27ba..8bf7c50f9 100644 --- a/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir +++ b/mlir/test/Transforms/memref-alloc-to-gpu-alloc.mlir @@ -13,11 +13,12 @@ func.func @main() { gpu.launch blocks(%arg0, %arg1, %arg2) in (%arg6 = %c8, %arg7 = %c1, %arg8 = %c1) threads(%arg3, %arg4, %arg5) in (%arg9 = %c1, %arg10 = %c1, %arg11 = %c1) { // CHECK: gpu.launch {{.*}} %7 = gpu.block_id x + // CHECK: [[VAR0:.*]] = gpu.block_id x %8 = memref.load %0[%7] : memref<8xf32> %9 = memref.load %1[%7] : memref<8xf32> - // CHECK: [[VAR0:.*]] = memref.load %[[MEMREF0:.*]][%1] : memref<8xf32> - // CHECK: [[VAR1:.*]] = memref.load %[[MEMREF1:.*]][%1] : memref<8xf32> + // CHECK: [[VAR1:.*]] = memref.load %[[MEMREF0:.*]][[[VAR0:.*]]] : memref<8xf32> + // CHECK: [[VAR2:.*]] = memref.load %[[MEMREF1:.*]][[[VAR0:.*]]] : memref<8xf32> %10 = arith.addf %8, %9 : f32 memref.store %10, %2[%7] : memref<8xf32> gpu.terminator From 0cf4a09115f53346ed3abbcaf1a76d425b0f5bf7 Mon Sep 17 00:00:00 2001 From: lchang552 Date: Fri, 29 Jul 2022 19:11:50 +0000 Subject: [PATCH 13/14] try to intall lit using conda --- .github/workflows/build.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 4f9b26d8c..714e25313 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -50,6 +50,7 @@ jobs: - name: Install CMake and Ninja run: | conda install cmake ninja + conda install -c conda-forge lit - name: Checkout repo uses: actions/checkout@v2 From daad47dbaecd189cc419bef4b8721a0180de2559 Mon Sep 17 00:00:00 2001 From: lchang552 Date: Fri, 29 Jul 2022 20:46:26 +0000 Subject: [PATCH 14/14] update build script --- .github/workflows/build.yml | 9 ++++++--- scripts/build_locally.py | 11 +++++++++++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 714e25313..a82b669cc 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -49,8 +49,7 @@ jobs: - name: Install CMake and Ninja run: | - conda install cmake ninja - conda install -c conda-forge lit + conda install cmake ninja conda-forge::lit - name: Checkout repo uses: actions/checkout@v2 @@ -162,6 +161,8 @@ jobs: shell: bash -l {0} run: | + external_lit=`which lit` + echo ${external_lit} # make the llvm-mlir working dir mkdir -p /home/runner/work/tmpdir export TBB_PATH=/home/runner/work/tbb/oneapi-tbb-${TBB_VER} @@ -172,7 +173,9 @@ jobs: --llvm-install /home/runner/work/llvm-mlir/_mlir_install \ --imex-enable-igpu \ --imex-enable-tests \ - --imex-tbb-dir /${TBB_PATH}/lib/cmake/tbb + --imex-tbb-dir /${TBB_PATH}/lib/cmake/tbb \ + --external-lit ${external_lit} + - name: Run IMEX core test cases shell: bash -l {0} diff --git a/scripts/build_locally.py b/scripts/build_locally.py index 962c67d2c..14c69bf7c 100644 --- a/scripts/build_locally.py +++ b/scripts/build_locally.py @@ -310,6 +310,7 @@ def _build_imex( enable_numba_fe=False, with_tbb=None, enable_numba_hotfix=False, + external_lit=None, ): """Builds Intel MLIR extensions (IMEX). @@ -400,6 +401,9 @@ def _build_imex( cmake_config_args.append("-DIMEX_ENABLE_TBB_SUPPORT=ON") else: warnings.warn("Provided TBB directory path does not exist.") + + if external_lit is not None: + cmake_config_args.append("-DLLVM_EXTERNAL_LIT=" + external_lit) build_dir = os.path.abspath(build_dir) # Configure @@ -513,6 +517,12 @@ def _build_imex( action="store_true", help="Removes any existing build directory when building IMEX", ) + imex_builder.add_argument( + "--external-lit", + type=str, + help="Path to a lit executable", + dest="external_lit", + ) args = parser.parse_args() @@ -629,6 +639,7 @@ def _build_imex( enable_igpu=args.imex_enable_igpu, with_tbb=g_tbb_dir, enable_tests=args.imex_enable_tests, + external_lit=args.external_lit, ) # TODO