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CPU timing fixes #21

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CPU timing fixes #21

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maxim-zhao
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Timings taken from MAME, can be found in other places (clrhome, etc).
Fixes are all to DD/ED/FD prefixes.

  • ED: bump some 4 to 8 (can;t do 2 bytes in 4 cycles), filling in gaps (can't do anything in 0 cycles)
  • DD/FD: timings seem to have been MSX timings (with M1 waits) plus lots of gaps

Fixes #20

@maxim-zhao maxim-zhao changed the title CPU timing fixes CPU timing fixes #20 Mar 24, 2016
@maxim-zhao maxim-zhao changed the title CPU timing fixes #20 CPU timing fixes Mar 24, 2016
@@ -360,11 +360,11 @@ static byte CyclesED[256] =
12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9, // 40-4F
12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9, // 50-5F
12,12,15,20, 8,14, 8,18,12,12,15,20, 8,14, 8,18, // 60-6F
12,12,15,20, 8,14, 8, 4,12,12,15,20, 8,14, 8, 4, // 70-7F
12,12,15,20, 8,14, 8, 8,12,12,15,20, 8,14, 8, 8, // 70-7F
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case DB_77: case DB_7F: // Undocumented NOP

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verified matching with MAME (no specific cycle processing in instruction code)

@ocornut
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ocornut commented Mar 24, 2016

Testing by removing EMU_IPERIOD= directive in meka.nam

  • SMS Gangster Town (258 > 228) : still broken (blue line glitch on car at horizon line point in demo)
  • GG James Pond 3 - Operation Starfi5h (227 > 228) : still broken (moving black line on map screen)
  • GG Out Run (261 > 228) : still broken (horizon line)

To be fair all those bugs may be very unrelated.
I could merge that without the part on LDIR, CPIR, INIR, OTIR, LDDR, CPDR, INDR, OTDR
But would appreciate being pointed to a software where an effect is visible?

I reckon I should probably end up using MAME's core..

@maxim-zhao
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Fair enough regarding the block instructions - I didn't go deep enough to see how they are different. I could probably craft some software to replicate it, but I doubt it's easy to find in existing software (especially the less useful undocumented stuff).

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Cycle timings are sometimes wrong
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