From 1b14e6c80aab80dbf673888c74a98dfe30554f38 Mon Sep 17 00:00:00 2001 From: chungshien-chai Date: Fri, 30 Aug 2024 23:23:57 -0700 Subject: [PATCH] Update ICB bitstream --- icb_bitstream/feedthrough/constraints.sdc | 2 - icb_bitstream/flop2flop/constraints.sdc | 8 +- icb_bitstream/golden/feedthrough/config.json | 83 - .../golden/feedthrough/design_edit.sdc | 45 + .../io_bitstream.detail.bit} | 262 +- .../golden/feedthrough/io_config.json | 136 + .../golden/feedthrough/model_config.ppdb.json | 83 +- icb_bitstream/golden/flop2flop/config.json | 140 - .../golden/flop2flop/design_edit.sdc | 59 + .../io_bitstream.detail.bit} | 434 +- icb_bitstream/golden/flop2flop/io_config.json | 221 + .../golden/flop2flop/model_config.ppdb.json | 173 +- icb_bitstream/golden/io_buf_ds/config.json | 99 - .../golden/io_buf_ds/design_edit.sdc | 44 + .../io_bitstream.detail.bit} | 480 +- icb_bitstream/golden/io_buf_ds/io_config.json | 165 + .../golden/io_buf_ds/model_config.ppdb.json | 106 +- .../golden/io_buf_ds_io_ddr/config.json | 282 - .../golden/io_buf_ds_io_ddr/design_edit.sdc | 122 + .../io_buf_ds_io_ddr/io_bitstream.detail.bit | 5962 +++++++++++++++++ .../golden/io_buf_ds_io_ddr/io_config.json | 429 ++ .../io_buf_ds_io_ddr/model_config.ppdb.json | 337 +- icb_bitstream/golden/io_ddr/config.json | 254 - icb_bitstream/golden/io_ddr/design_edit.sdc | 123 + ...eam.detail.txt => io_bitstream.detail.bit} | 416 +- icb_bitstream/golden/io_ddr/io_config.json | 388 ++ .../golden/io_ddr/model_config.ppdb.json | 290 +- icb_bitstream/golden/io_delay/config.json | 615 -- icb_bitstream/golden/io_delay/design_edit.sdc | 336 + .../golden/io_delay/io_bitstream.detail.bit | 5962 +++++++++++++++++ .../golden/io_delay/io_bitstream.detail.txt | 5962 ----------------- icb_bitstream/golden/io_delay/io_config.json | 930 +++ .../golden/io_delay/model_config.ppdb.json | 718 +- .../golden/io_delay_io_ddr/config.json | 731 -- .../golden/io_delay_io_ddr/design_edit.sdc | 402 ++ .../io_delay_io_ddr/io_bitstream.detail.bit | 5962 +++++++++++++++++ .../io_delay_io_ddr/io_bitstream.detail.txt | 5962 ----------------- .../golden/io_delay_io_ddr/io_config.json | 1102 +++ .../io_delay_io_ddr/model_config.ppdb.json | 926 ++- icb_bitstream/golden/o_buft/config.json | 112 - icb_bitstream/golden/o_buft/design_edit.sdc | 57 + .../io_bitstream.detail.bit} | 314 +- .../golden/o_buft/io_bitstream.detail.txt | 5962 ----------------- icb_bitstream/golden/o_buft/io_config.json | 178 + .../golden/o_buft/model_config.ppdb.json | 110 +- icb_bitstream/golden/o_buft_ds/config.json | 121 - .../golden/o_buft_ds/design_edit.sdc | 60 + .../io_bitstream.detail.bit} | 442 +- .../golden/o_buft_ds/io_bitstream.detail.txt | 5962 ----------------- icb_bitstream/golden/o_buft_ds/io_config.json | 191 + .../golden/o_buft_ds/model_config.ppdb.json | 119 +- icb_bitstream/golden/pll/config.json | 174 - icb_bitstream/golden/pll/design_edit.sdc | 74 + .../golden/pll/io_bitstream.detail.bit | 5962 +++++++++++++++++ icb_bitstream/golden/pll/io_config.json | 272 + .../golden/pll/model_config.ppdb.json | 235 +- icb_bitstream/io_buf_ds/constraints.sdc | 6 +- .../io_buf_ds_io_ddr/constraints.sdc | 12 +- icb_bitstream/io_ddr/constraints.sdc | 11 +- icb_bitstream/io_delay/constraints.sdc | 27 +- icb_bitstream/io_delay_io_ddr/constraints.sdc | 29 +- icb_bitstream/o_buft/constraints.sdc | 3 - icb_bitstream/o_buft_ds/constraints.sdc | 4 - icb_bitstream/pll/constraints.sdc | 8 +- icb_bitstream/run_test.py | 147 +- 65 files changed, 33183 insertions(+), 28160 deletions(-) delete mode 100644 icb_bitstream/golden/feedthrough/config.json create mode 100644 icb_bitstream/golden/feedthrough/design_edit.sdc rename icb_bitstream/golden/{io_buf_ds/io_bitstream.detail.txt => feedthrough/io_bitstream.detail.bit} (98%) create mode 100644 icb_bitstream/golden/feedthrough/io_config.json delete mode 100644 icb_bitstream/golden/flop2flop/config.json create mode 100644 icb_bitstream/golden/flop2flop/design_edit.sdc rename icb_bitstream/golden/{io_buf_ds_io_ddr/io_bitstream.detail.txt => flop2flop/io_bitstream.detail.bit} (97%) create mode 100644 icb_bitstream/golden/flop2flop/io_config.json delete mode 100644 icb_bitstream/golden/io_buf_ds/config.json create mode 100644 icb_bitstream/golden/io_buf_ds/design_edit.sdc rename icb_bitstream/golden/{flop2flop/io_bitstream.detail.txt => io_buf_ds/io_bitstream.detail.bit} (97%) create mode 100644 icb_bitstream/golden/io_buf_ds/io_config.json delete mode 100644 icb_bitstream/golden/io_buf_ds_io_ddr/config.json create mode 100644 icb_bitstream/golden/io_buf_ds_io_ddr/design_edit.sdc create mode 100644 icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.bit create mode 100644 icb_bitstream/golden/io_buf_ds_io_ddr/io_config.json delete mode 100644 icb_bitstream/golden/io_ddr/config.json create mode 100644 icb_bitstream/golden/io_ddr/design_edit.sdc rename icb_bitstream/golden/io_ddr/{io_bitstream.detail.txt => io_bitstream.detail.bit} (97%) create mode 100644 icb_bitstream/golden/io_ddr/io_config.json delete mode 100644 icb_bitstream/golden/io_delay/config.json create mode 100644 icb_bitstream/golden/io_delay/design_edit.sdc create mode 100644 icb_bitstream/golden/io_delay/io_bitstream.detail.bit delete mode 100644 icb_bitstream/golden/io_delay/io_bitstream.detail.txt create mode 100644 icb_bitstream/golden/io_delay/io_config.json delete mode 100644 icb_bitstream/golden/io_delay_io_ddr/config.json create mode 100644 icb_bitstream/golden/io_delay_io_ddr/design_edit.sdc create mode 100644 icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.bit delete mode 100644 icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.txt create mode 100644 icb_bitstream/golden/io_delay_io_ddr/io_config.json delete mode 100644 icb_bitstream/golden/o_buft/config.json create mode 100644 icb_bitstream/golden/o_buft/design_edit.sdc rename icb_bitstream/golden/{feedthrough/io_bitstream.detail.txt => o_buft/io_bitstream.detail.bit} (97%) delete mode 100644 icb_bitstream/golden/o_buft/io_bitstream.detail.txt create mode 100644 icb_bitstream/golden/o_buft/io_config.json delete mode 100644 icb_bitstream/golden/o_buft_ds/config.json create mode 100644 icb_bitstream/golden/o_buft_ds/design_edit.sdc rename icb_bitstream/golden/{pll/io_bitstream.detail.txt => o_buft_ds/io_bitstream.detail.bit} (97%) delete mode 100644 icb_bitstream/golden/o_buft_ds/io_bitstream.detail.txt create mode 100644 icb_bitstream/golden/o_buft_ds/io_config.json delete mode 100644 icb_bitstream/golden/pll/config.json create mode 100644 icb_bitstream/golden/pll/design_edit.sdc create mode 100644 icb_bitstream/golden/pll/io_bitstream.detail.bit create mode 100644 icb_bitstream/golden/pll/io_config.json diff --git a/icb_bitstream/feedthrough/constraints.sdc b/icb_bitstream/feedthrough/constraints.sdc index 48ae471d..89853b19 100644 --- a/icb_bitstream/feedthrough/constraints.sdc +++ b/icb_bitstream/feedthrough/constraints.sdc @@ -1,6 +1,4 @@ # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N diff --git a/icb_bitstream/flop2flop/constraints.sdc b/icb_bitstream/flop2flop/constraints.sdc index a63410cc..b5cd80ca 100644 --- a/icb_bitstream/flop2flop/constraints.sdc +++ b/icb_bitstream/flop2flop/constraints.sdc @@ -1,12 +1,6 @@ -# Clock -create_clock -period 5 -name clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N diff --git a/icb_bitstream/golden/feedthrough/config.json b/icb_bitstream/golden/feedthrough/config.json deleted file mode 100644 index 752c5662..00000000 --- a/icb_bitstream/golden/feedthrough/config.json +++ /dev/null @@ -1,83 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.dout", - " Cell port \\O is connected to output port \\dout", - " Trace \\I_BUF --> \\CLK_BUF", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_1_0N (and properties) to Port dout", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$din", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/feedthrough/design_edit.sdc b/icb_bitstream/golden/feedthrough/design_edit.sdc new file mode 100644 index 00000000..c6310650 --- /dev/null +++ b/icb_bitstream/golden/feedthrough/design_edit.sdc @@ -0,0 +1,45 @@ +############# +# +# Fabric clock assignment +# +############# + +############# +# +# Each pin mode and location assignment +# +############# +# Pin din :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io $ibuf_din HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin dout :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $auto_396 HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_394 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_395 HP_1_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/io_buf_ds/io_bitstream.detail.txt b/icb_bitstream/golden/feedthrough/io_bitstream.detail.bit similarity index 98% rename from icb_bitstream/golden/io_buf_ds/io_bitstream.detail.txt rename to icb_bitstream/golden/feedthrough/io_bitstream.detail.bit index fbe29470..078a6480 100644 --- a/icb_bitstream/golden/io_buf_ds/io_bitstream.detail.txt +++ b/icb_bitstream/golden/feedthrough/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,7 +3417,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] Attributes: RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,7 +3609,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] Attributes: RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 @@ -3827,52 +3827,52 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] Attributes: hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/feedthrough/io_config.json b/icb_bitstream/golden/feedthrough/io_config.json new file mode 100644 index 00000000..a54338bf --- /dev/null +++ b/icb_bitstream/golden/feedthrough/io_config.json @@ -0,0 +1,136 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_dout", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Double check Core/Fabric Clock", + " Summary", + " |-----------------------------------------------------|", + " | ****************************************** |", + " IN | din * I_BUF * |", + " OUT | * O_BUFT * dout |", + " | ****************************************** |", + " |-----------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_BUF Linked-object=din Port=O Net=$ibuf_din - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_BUFT Linked-object=dout Port=I Net=$auto_396 - Found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$ibuf_din", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/feedthrough/model_config.ppdb.json b/icb_bitstream/golden/feedthrough/model_config.ppdb.json index a519cb16..ec0a2534 100644 --- a/icb_bitstream/golden/feedthrough/model_config.ppdb.json +++ b/icb_bitstream/golden/feedthrough/model_config.ppdb.json @@ -1,8 +1,45 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/feedthrough/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/feedthrough/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + "Set CLKBUF remaining configuration attributes (FCLK)", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_dout)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -21,17 +58,31 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -40,19 +91,31 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$din", + "I" : "$ibuf_din", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" } ] } diff --git a/icb_bitstream/golden/flop2flop/config.json b/icb_bitstream/golden/flop2flop/config.json deleted file mode 100644 index 204ba865..00000000 --- a/icb_bitstream/golden/flop2flop/config.json +++ /dev/null @@ -1,140 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.clk", - " Cell port \\I is connected to input port \\clk", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.dout", - " Cell port \\O is connected to output port \\dout", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF $iopadmap$top.clk out connection: $iopadmap$clk", - " Connected $auto$clkbufmap.cc:265:execute$428", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_1_0N (and properties) to Port dout", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.clk", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "$iopadmap$clk" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "$auto$clkbufmap.cc:265:execute$428", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "$iopadmap$clk", - "O" : "$auto$clkbufmap.cc:298:execute$430" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$dout", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/flop2flop/design_edit.sdc b/icb_bitstream/golden/flop2flop/design_edit.sdc new file mode 100644 index 00000000..bc06b94e --- /dev/null +++ b/icb_bitstream/golden/flop2flop/design_edit.sdc @@ -0,0 +1,59 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: CLK_BUF $clkbuf$top.$ibuf_clk) +# set_clock_pin -device_clock clk[0] -design_clock $clk_buf_$ibuf_clk (Original clock primitive out-net to fabric) +set_clock_pin -device_clock clk[0] -design_clock $clk_buf_$ibuf_clk + +############# +# +# Each pin mode and location assignment +# +############# +# Clock data from object clk port O is not routed to fabric +# Pin clk :: I_BUF |-> CLK_BUF + +# Pin din :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io $ibuf_din HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin dout :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $obuf_dout HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_431 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_432 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_433 HP_1_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.txt b/icb_bitstream/golden/flop2flop/io_bitstream.detail.bit similarity index 97% rename from icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.txt rename to icb_bitstream/golden/flop2flop/io_bitstream.detail.bit index c5fba7a3..7d79c33a 100644 --- a/icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.txt +++ b/icb_bitstream/golden/flop2flop/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,30 +3417,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], $clkbuf$top.$ibuf_clk [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], $clkbuf$top.$ibuf_clk [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], $clkbuf$top.$ibuf_clk [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] Attributes: RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,30 +3609,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] Attributes: RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 @@ -3779,100 +3779,100 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] Attributes: hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000012) 18 { $clkbuf$top.$ibuf_clk [CLK_BUF] [CLK_BUF:ROOT_BANK_SRC==A --#MUX=18] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -3909,7 +3909,7 @@ Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000000) 0 { $clkbuf$top.$ibuf_clk [CLK_BUF] [ROOT_MUX_SEL:0] [from HP_1_CC_18_9P] } Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] Attributes: ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/flop2flop/io_config.json b/icb_bitstream/golden/flop2flop/io_config.json new file mode 100644 index 00000000..d0113ec3 --- /dev/null +++ b/icb_bitstream/golden/flop2flop/io_config.json @@ -0,0 +1,221 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_clk", + " Cell port \\I is connected to input port \\clk", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_dout", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF $ibuf$top.$ibuf_clk out connection: $ibuf_clk -> $clkbuf$top.$ibuf_clk", + " Connected $clkbuf$top.$ibuf_clk", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF $clkbuf$top.$ibuf_clk: clock port \\O, net $clk_buf_$ibuf_clk", + " Connected to cell \\DFFRE $abc$205$auto_206", + " Which is not a IO primitive. Send to fabric", + " Connected to cell \\DFFRE $abc$205$auto_207", + " Use slot 0", + " Double check Core/Fabric Clock", + " Summary", + " |---------------------------------------------------------------|", + " | **************************************************** |", + " IN | clk * I_BUF |-> CLK_BUF * |", + " IN | din * I_BUF * |", + " OUT | * O_BUFT * dout |", + " | **************************************************** |", + " |---------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Module=I_BUF Linked-object=clk Port=O Net=$flatten$auto_435.$ibuf_clk - Not found", + " Fail reason: Clock data from object clk port O is not routed to fabric", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_BUF Linked-object=din Port=O Net=$ibuf_din - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_BUFT Linked-object=dout Port=I Net=$obuf_dout - Found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "$ibuf_clk" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "$clkbuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "I" : "$ibuf_clk", + "O" : "$clk_buf_$ibuf_clk" + }, + "parameters" : { + "ROUTE_TO_FABRIC_CLK" : "0" + }, + "flags" : [ + "CLK_BUF", + "PIN_CLOCK_CORE_ONLY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_dout", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/flop2flop/model_config.ppdb.json b/icb_bitstream/golden/flop2flop/model_config.ppdb.json index 74c70fb1..2822bc6f 100644 --- a/icb_bitstream/golden/flop2flop/model_config.ppdb.json +++ b/icb_bitstream/golden/flop2flop/model_config.ppdb.json @@ -1,12 +1,72 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/flop2flop/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/flop2flop/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF $clkbuf$top.$ibuf_clk (location:HP_1_CC_18_9P)", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + " CLK_BUF $clkbuf$top.$ibuf_clk", + " Resource: u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 (Bank A)(CORE)", + "Set CLKBUF remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " Skip for HP_1_CC_18_9P", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_clk)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF ($clkbuf$top.$ibuf_clk)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Match", + " Rule CLK_BUF.ROOT_MUX", + " Match", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_dout)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.clk", + "name" : "$ibuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -21,41 +81,86 @@ }, "connectivity" : { "I" : "clk", - "O" : "$iopadmap$clk" + "O" : "$ibuf_clk" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", - "name" : "$auto$clkbufmap.cc:265:execute$428", + "name" : "$clkbuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + }, + { + "CLK_BUF" : "ROOT_BANK_SRC==A --#MUX=18", + "__location__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0" + }, + { + "ROOT_MUX_SEL" : "0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, "connectivity" : { - "I" : "$iopadmap$clk", - "O" : "$auto$clkbufmap.cc:298:execute$430" + "I" : "$ibuf_clk", + "O" : "$clk_buf_$ibuf_clk" }, "parameters" : { "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF", + "PIN_CLOCK_CORE_ONLY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__AB__" : "A", + "__ROOT_BANK_MUX_LOCATION__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0", + "__ROOT_BANK_MUX__" : "18", + "__ROOT_MUX__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -74,17 +179,31 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -93,19 +212,31 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$dout", + "I" : "$obuf_dout", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" } ] } diff --git a/icb_bitstream/golden/io_buf_ds/config.json b/icb_bitstream/golden/io_buf_ds/config.json deleted file mode 100644 index 6930b48a..00000000 --- a/icb_bitstream/golden/io_buf_ds/config.json +++ /dev/null @@ -1,99 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\din_n (index=0, width=1, offset=0)", - " Detect input port \\din_p (index=0, width=1, offset=0)", - " Detect output port \\dout_n (index=0, width=1, offset=0)", - " Detect output port \\dout_p (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF_DS \\i_buf_ds", - " Cell port \\I_N is connected to input port \\din_n", - " Cell port \\I_P is connected to input port \\din_p", - " Get important connection of cell \\O_BUF_DS \\o_buf_ds", - " Cell port \\O_N is connected to output port \\dout_n", - " Cell port \\O_P is connected to output port \\dout_p", - " Trace \\I_BUF --> \\CLK_BUF", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_4_2P (and properties) to Port din_p", - " Assign location HP_1_5_2N (and properties) to Port din_n", - " Assign location HP_1_6_3P (and properties) to Port dout_p", - " Assign location HP_1_7_3N (and properties) to Port dout_n", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF_DS", - "name" : "i_buf_ds", - "linked_object" : "din_n+din_p", - "linked_objects" : { - "din_n" : { - "location" : "HP_1_5_2N", - "properties" : { - } - }, - "din_p" : { - "location" : "HP_1_4_2P", - "properties" : { - } - } - }, - "connectivity" : { - "I_N" : "din_n", - "I_P" : "din_p", - "O" : "o_buf_ds_i" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF_DS", - "name" : "o_buf_ds", - "linked_object" : "dout_n+dout_p", - "linked_objects" : { - "dout_n" : { - "location" : "HP_1_7_3N", - "properties" : { - } - }, - "dout_p" : { - "location" : "HP_1_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "o_buf_ds_i", - "O_N" : "dout_n", - "O_P" : "dout_p" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/io_buf_ds/design_edit.sdc b/icb_bitstream/golden/io_buf_ds/design_edit.sdc new file mode 100644 index 00000000..9b5b8fa8 --- /dev/null +++ b/icb_bitstream/golden/io_buf_ds/design_edit.sdc @@ -0,0 +1,44 @@ +############# +# +# Fabric clock assignment +# +############# + +############# +# +# Each pin mode and location assignment +# +############# +# Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid' +# Pin din_n :: I_BUF_DS + +# Pin din_p :: I_BUF_DS +# set_mode MODE_BP_DIR_A_RX HP_1_4_2P +# set_io din_p HP_1_4_2P --> (original) +set_io o_buf_ds_i HP_1_4_2P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid' +# Pin dout_n :: O_BUF_DS + +# Pin dout_p :: O_BUF_DS +# set_mode MODE_BP_DIR_A_TX HP_1_6_3P +# set_io dout_p HP_1_6_3P --> (original) +set_io $auto_397 HP_1_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF_DS +# LinkedObject: din_n+din_p +# Location: HP_1_4_2P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_396 HP_1_4_2P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/flop2flop/io_bitstream.detail.txt b/icb_bitstream/golden/io_buf_ds/io_bitstream.detail.bit similarity index 97% rename from icb_bitstream/golden/flop2flop/io_bitstream.detail.txt rename to icb_bitstream/golden/io_buf_ds/io_bitstream.detail.bit index fbbf2e0e..2b911876 100644 --- a/icb_bitstream/golden/flop2flop/io_bitstream.detail.txt +++ b/icb_bitstream/golden/io_buf_ds/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,7 +3417,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] Attributes: RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,30 +3609,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] Attributes: RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 @@ -3683,100 +3683,100 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000003) 3 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000003) 3 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001976, Size: 4, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] Attributes: - RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 + RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000003) 3 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [DFODTEN:DF_odt_enable] } + MC - Addr: 0x000019A0, Size: 4, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] Attributes: - RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 + RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000003) 3 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [DFODTEN:DF_odt_enable] } + MC - Addr: 0x000019CA, Size: 4, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] Attributes: RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 @@ -3827,52 +3827,52 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] Attributes: hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_buf_ds/io_config.json b/icb_bitstream/golden/io_buf_ds/io_config.json new file mode 100644 index 00000000..ffc6d60a --- /dev/null +++ b/icb_bitstream/golden/io_buf_ds/io_config.json @@ -0,0 +1,165 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\din_n (index=0, width=1, offset=0)", + " Detect input port \\din_p (index=0, width=1, offset=0)", + " Detect output port \\dout_n (index=0, width=1, offset=0)", + " Detect output port \\dout_p (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF_DS \\i_buf_ds", + " Cell port \\I_N is connected to input port \\din_n", + " Cell port \\I_P is connected to input port \\din_p", + " Parameter \\DIFFERENTIAL_TERMINATION: \"TRUE\"", + " Parameter \\IOSTANDARD: \"DEFAULT\"", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUF_DS \\o_buf_ds", + " Cell port \\O_N is connected to output port \\dout_n", + " Cell port \\O_P is connected to output port \\dout_p", + " Parameter \\DIFFERENTIAL_TERMINATION: \"TRUE\"", + " Parameter \\IOSTANDARD: \"DEFAULT\"", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Double check Core/Fabric Clock", + " Summary", + " |------------------------------------------------------------------------|", + " | ******************************************** |", + " IN | din_n+din_p * I_BUF_DS * |", + " OUT | * O_BUF_DS * dout_n+dout_p |", + " | ******************************************** |", + " |------------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_4_2P (and properties) to Port din_p", + " Assign location HP_1_5_2N (and properties) to Port din_n", + " Assign location HP_1_6_3P (and properties) to Port dout_p", + " Assign location HP_1_7_3N (and properties) to Port dout_n", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=din_n, location: HP_1_5_2N", + " Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid'", + " Pin object=din_p, location: HP_1_4_2P", + " Data signal from object din_p", + " Module=I_BUF_DS Linked-object=din_n+din_p Port=O Net=o_buf_ds_i - Found", + " Pin object=dout_n, location: HP_1_7_3N", + " Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid'", + " Pin object=dout_p, location: HP_1_6_3P", + " Data signal from object dout_p", + " Module=O_BUF_DS Linked-object=dout_n+dout_p Port=I Net=$auto_397 - Found", + " Determine internal control signals", + " Module=I_BUF_DS LinkedObject=din_n+din_p Location=HP_1_4_2P Port=EN Signal=in:f2g_in_en_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF_DS", + "name" : "i_buf_ds", + "location_object" : "din_p", + "location" : "HP_1_4_2P", + "linked_object" : "din_n+din_p", + "linked_objects" : { + "din_n" : { + "location" : "HP_1_5_2N", + "properties" : { + } + }, + "din_p" : { + "location" : "HP_1_4_2P", + "properties" : { + } + } + }, + "connectivity" : { + "I_N" : "din_n", + "I_P" : "din_p", + "O" : "o_buf_ds_i" + }, + "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT", + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUF_DS", + "name" : "o_buf_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", + "linked_object" : "dout_n+dout_p", + "linked_objects" : { + "dout_n" : { + "location" : "HP_1_7_3N", + "properties" : { + } + }, + "dout_p" : { + "location" : "HP_1_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "o_buf_ds_i", + "O_N" : "dout_n", + "O_P" : "dout_p" + }, + "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT" + }, + "flags" : [ + "O_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/io_buf_ds/model_config.ppdb.json b/icb_bitstream/golden/io_buf_ds/model_config.ppdb.json index 4fb50f95..022eeb1a 100644 --- a/icb_bitstream/golden/io_buf_ds/model_config.ppdb.json +++ b/icb_bitstream/golden/io_buf_ds/model_config.ppdb.json @@ -1,8 +1,57 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_buf_ds/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_buf_ds/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + "Set CLKBUF remaining configuration attributes (FCLK)", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF_DS (i_buf_ds)", + " Object: din_n", + " Parameter", + " Rule I_BUF_DS.DIFFERENTIAL_TERMINATION", + " Mismatch", + " Property", + " Rule I_BUF_DS.IOSTANDARD", + " Mismatch", + " Object: din_p", + " Parameter", + " Rule I_BUF_DS.DIFFERENTIAL_TERMINATION", + " Mismatch", + " Property", + " Rule I_BUF_DS.IOSTANDARD", + " Mismatch", + " Module: O_BUF_DS (o_buf_ds)", + " Object: dout_n", + " Parameter", + " Property", + " Rule O_BUF_DS.IOSTANDARD", + " Mismatch", + " Object: dout_p", + " Parameter", + " Property", + " Rule O_BUF_DS.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF_DS", "name" : "i_buf_ds", + "location_object" : "din_p", + "location" : "HP_1_4_2P", "linked_object" : "din_n+din_p", "linked_objects" : { "din_n" : { @@ -10,6 +59,12 @@ "properties" : { }, "config_attributes" : [ + { + "DFODTEN" : "DF_odt_enable" + }, + { + "I_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] }, "din_p" : { @@ -17,6 +72,12 @@ "properties" : { }, "config_attributes" : [ + { + "DFODTEN" : "DF_odt_enable" + }, + { + "I_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] } }, @@ -26,13 +87,30 @@ "O" : "o_buf_ds_i" }, "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT", + "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" + "flags" : [ + "I_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" }, { "module" : "O_BUF_DS", "name" : "o_buf_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", "linked_object" : "dout_n+dout_p", "linked_objects" : { "dout_n" : { @@ -40,6 +118,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] }, "dout_p" : { @@ -47,6 +128,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] } }, @@ -56,9 +140,23 @@ "O_P" : "dout_p" }, "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT" + }, + "flags" : [ + "O_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" } ] } diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/config.json b/icb_bitstream/golden/io_buf_ds_io_ddr/config.json deleted file mode 100644 index 709504d9..00000000 --- a/icb_bitstream/golden/io_buf_ds_io_ddr/config.json +++ /dev/null @@ -1,282 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\din_n (index=0, width=1, offset=0)", - " Detect input port \\din_p (index=0, width=1, offset=0)", - " Detect output port \\dout_n (index=0, width=1, offset=0)", - " Detect output port \\dout_p (index=0, width=1, offset=0)", - " Detect input port \\enable (index=0, width=1, offset=0)", - " Detect input port \\reset (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.enable", - " Cell port \\I is connected to input port \\enable", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.reset", - " Cell port \\I is connected to input port \\reset", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF \\clk_i_buf", - " Cell port \\I is connected to input port \\clk", - " Get important connection of cell \\I_BUF_DS \\i_buf_ds", - " Cell port \\I_N is connected to input port \\din_n", - " Cell port \\I_P is connected to input port \\din_p", - " Get important connection of cell \\O_BUF_DS \\o_buf_ds", - " Cell port \\O_N is connected to output port \\dout_n", - " Cell port \\O_P is connected to output port \\dout_p", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i", - " Connected \\clk_buf", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Try \\I_BUF_DS \\i_buf_ds out connection: \\i_ddr_d", - " Connected \\i_ddr", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Try \\O_BUF_DS \\o_buf_ds out connection: \\o_buf_ds_i", - " Connected \\o_ddr", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\O_DDR \\o_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HP_1_2_1P (and properties) to Port reset", - " Assign location HP_1_3_1N (and properties) to Port enable", - " Assign location HP_1_4_2P (and properties) to Port din_p", - " Assign location HP_1_5_2N (and properties) to Port din_n", - " Assign location HP_1_6_3P (and properties) to Port dout_p", - " Assign location HP_1_7_3N (and properties) to Port dout_n", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.reset", - "linked_object" : "reset", - "linked_objects" : { - "reset" : { - "location" : "HP_1_2_1P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "reset", - "O" : "$iopadmap$reset" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "clk_i_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "clk_buf_i" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "clk_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "clk_buf_i", - "O" : "clk_clk_buf" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - "O" : [ - "i_ddr", - "o_ddr" - ] - } - }, - { - "module" : "I_BUF_DS", - "name" : "i_buf_ds", - "linked_object" : "din_n+din_p", - "linked_objects" : { - "din_n" : { - "location" : "HP_1_5_2N", - "properties" : { - } - }, - "din_p" : { - "location" : "HP_1_4_2P", - "properties" : { - } - } - }, - "connectivity" : { - "I_N" : "din_n", - "I_P" : "din_p", - "O" : "i_ddr_d" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "I_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "I_DDR", - "name" : "i_ddr", - "linked_object" : "din_n+din_p", - "linked_objects" : { - "din_n" : { - "location" : "HP_1_5_2N", - "properties" : { - } - }, - "din_p" : { - "location" : "HP_1_4_2P", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "D" : "i_ddr_d" - }, - "parameters" : { - }, - "pre_primitive" : "I_BUF_DS", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF_DS", - "name" : "o_buf_ds", - "linked_object" : "dout_n+dout_p", - "linked_objects" : { - "dout_n" : { - "location" : "HP_1_7_3N", - "properties" : { - } - }, - "dout_p" : { - "location" : "HP_1_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "o_buf_ds_i", - "O_N" : "dout_n", - "O_P" : "dout_p" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "O_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "O_DDR", - "name" : "o_ddr", - "linked_object" : "dout_n+dout_p", - "linked_objects" : { - "dout_n" : { - "location" : "HP_1_7_3N", - "properties" : { - } - }, - "dout_p" : { - "location" : "HP_1_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "Q" : "o_buf_ds_i" - }, - "parameters" : { - }, - "pre_primitive" : "O_BUF_DS", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/design_edit.sdc b/icb_bitstream/golden/io_buf_ds_io_ddr/design_edit.sdc new file mode 100644 index 00000000..87e5d8a0 --- /dev/null +++ b/icb_bitstream/golden/io_buf_ds_io_ddr/design_edit.sdc @@ -0,0 +1,122 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock is only used by gearbox, does not need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: CLK_BUF clk_buf) + +############# +# +# Each pin mode and location assignment +# +############# +# Pin enable :: I_BUF +# set_mode MODE_BP_DIR_B_RX HP_1_3_1N +# set_io enable HP_1_3_1N --> (original) +set_io $ibuf_enable HP_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin reset :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_2_1P +# set_io reset HP_1_2_1P --> (original) +set_io $ibuf_reset HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Clock data from object clk port O is not routed to fabric +# Pin clk :: I_BUF |-> CLK_BUF + +# Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid' +# Pin din_n :: I_BUF_DS |-> I_DDR + +# Pin din_p :: I_BUF_DS |-> I_DDR +# set_mode MODE_BP_DDR_A_RX HP_1_4_2P +# set_io din_p HP_1_4_2P --> (original) +set_io o_ddr_d HP_1_4_2P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[0]_A +set_io $delete_wire$399 HP_1_4_2P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[1]_A + +# Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid' +# Pin dout_n :: O_DDR |-> O_BUF_DS + +# Pin dout_p :: O_DDR |-> O_BUF_DS +# set_mode MODE_BP_DDR_A_TX HP_1_6_3P +# set_io dout_p HP_1_6_3P --> (original) +set_io $auto_404 HP_1_6_3P -mode MODE_BP_DDR_A_TX -internal_pin f2g_tx_out[0]_A +# set_io __const_bit_0__ HP_1_6_3P -mode MODE_BP_DDR_A_TX -internal_pin f2g_tx_out[1]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: enable +# Location: HP_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_400 HP_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: reset +# Location: HP_1_2_1P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_401 HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_402 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF_DS +# LinkedObject: din_n+din_p +# Location: HP_1_4_2P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_403 HP_1_4_2P -mode MODE_BP_DDR_A_RX -internal_pin f2g_in_en_A + +# Module: I_DDR +# LinkedObject: din_n+din_p +# Location: HP_1_4_2P +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable_2 HP_1_4_2P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: I_DDR +# LinkedObject: din_n+din_p +# Location: HP_1_4_2P +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset_2 HP_1_4_2P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: O_DDR +# LinkedObject: dout_n+dout_p +# Location: HP_1_6_3P +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable HP_1_6_3P -mode MODE_BP_DDR_A_TX -internal_pin TO_BE_DETERMINED + +# Module: O_DDR +# LinkedObject: dout_n+dout_p +# Location: HP_1_6_3P +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset HP_1_6_3P -mode MODE_BP_DDR_A_TX -internal_pin TO_BE_DETERMINED + +############# +# +# Each gearbox core clock +# +############# +# Module: O_DDR +# Name: o_ddr +# Location: HP_1_6_3P +# Port: C +# Net: clk_clk_buf +# Slot: 0 +set_core_clk HP_1_6_3P 0 + diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.bit b/icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.bit new file mode 100644 index 00000000..fe744c93 --- /dev/null +++ b/icb_bitstream/golden/io_buf_ds_io_ddr/io_bitstream.detail.bit @@ -0,0 +1,5962 @@ +// Feature Bitstream: IO +// Model: PERIPHERY +// Total Bits: 10513 +// Timestamp: +// Format: DETAIL +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] + Attributes: + RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] + Attributes: + RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] + Attributes: + RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] + Attributes: + RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] + Attributes: + RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] + Attributes: + RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] + Attributes: + RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] + Attributes: + RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] + Attributes: + RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] + Attributes: + RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] + Attributes: + RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] + Attributes: + RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] + Attributes: + RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] + Attributes: + RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] + Attributes: + RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] + Attributes: + RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] + Attributes: + RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] + Attributes: + RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] + Attributes: + RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] + Attributes: + RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] + Attributes: + RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] + Attributes: + RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] + Attributes: + RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] + Attributes: + RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] + Attributes: + RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] + Attributes: + RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] + Attributes: + RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] + Attributes: + RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] + Attributes: + RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] + Attributes: + RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] + Attributes: + RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] + Attributes: + RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] + Attributes: + RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] + Attributes: + RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] + Attributes: + RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] + Attributes: + RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] + Attributes: + RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] + Attributes: + RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] + Attributes: + RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] + Attributes: + RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] + Attributes: + RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] + Attributes: + RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] + Attributes: + RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] + Attributes: + RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] + Attributes: + RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] + Attributes: + RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] + Attributes: + RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] + Attributes: + RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] + Attributes: + RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] + Attributes: + RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] + Attributes: + RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] + Attributes: + RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] + Attributes: + RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] + Attributes: + RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] + Attributes: + RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] + Attributes: + RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] + Attributes: + RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] + Attributes: + RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] + Attributes: + RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] + Attributes: + RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] + Attributes: + RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] + Attributes: + RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] + Attributes: + RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] + Attributes: + RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] + Attributes: + RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] + Attributes: + RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] + Attributes: + RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] + Attributes: + RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] + Attributes: + RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] + Attributes: + RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] + Attributes: + RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] + Attributes: + RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] + Attributes: + RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] + Attributes: + RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] + Attributes: + RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] + Attributes: + RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] + Attributes: + RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] + Attributes: + RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] + Attributes: + RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] + Attributes: + RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] + Attributes: + RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] + Attributes: + RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] + Attributes: + RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] + Attributes: + RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] + Attributes: + RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] + Attributes: + RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] + Attributes: + RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] + Attributes: + RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] + Attributes: + RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] + Attributes: + RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] + Attributes: + RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] + Attributes: + RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] + Attributes: + RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] + Attributes: + RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] + Attributes: + RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] + Attributes: + RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] + Attributes: + RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] + Attributes: + RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] + Attributes: + RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] + Attributes: + RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] + Attributes: + RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] + Attributes: + RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] + Attributes: + RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] + Attributes: + RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] + Attributes: + RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] + Attributes: + RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] + Attributes: + RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] + Attributes: + RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] + Attributes: + RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] + Attributes: + RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] + Attributes: + RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] + Attributes: + RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] + Attributes: + RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] + Attributes: + RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] + Attributes: + RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] + Attributes: + RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] + Attributes: + RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] + Attributes: + RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] + Attributes: + RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] + Attributes: + RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] + Attributes: + RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] + Attributes: + RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] + Attributes: + RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] + Attributes: + RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] + Attributes: + RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] + Attributes: + RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] + Attributes: + RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] + Attributes: + RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] + Attributes: + RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] + Attributes: + RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] + Attributes: + RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] + Attributes: + RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] + Attributes: + RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] + Attributes: + RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] + Attributes: + RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] + Attributes: + RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] + Attributes: + RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] + Attributes: + RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] + Attributes: + RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] + Attributes: + RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] + Attributes: + RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] + Attributes: + RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] + Attributes: + RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] + Attributes: + RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] + Attributes: + RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] + Attributes: + RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] + Attributes: + RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] + Attributes: + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000003) 3 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT], o_ddr [O_DDR] [O_DDR:MODE==DDR] } + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] + Attributes: + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000003) 3 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT], o_ddr [O_DDR] [O_DDR:MODE==DDR] } + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001976, Size: 4, Value: (0x00000001) 1 { o_buf_ds [O_BUF_DS] [O_BUF_DS:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] + Attributes: + RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000003) 3 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT], i_ddr [I_DDR] [I_DDR:MODE==DDR] } + RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [DFODTEN:DF_odt_enable] } + MC - Addr: 0x000019A0, Size: 4, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] + Attributes: + RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000003) 3 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT], i_ddr [I_DDR] [I_DDR:MODE==DDR] } + RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [DFODTEN:DF_odt_enable] } + MC - Addr: 0x000019CA, Size: 4, Value: (0x00000001) 1 { i_buf_ds [I_BUF_DS] [I_BUF_DS:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] + Attributes: + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] + Attributes: + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] + Attributes: + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] + Attributes: + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] + Attributes: + hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 + hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000001) 1 { clk_buf [CLK_BUF] [cfg_rxclk_phase_sel_A_0:1] [from HP_1_CC_18_9P] } + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_rx_fclkio_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_vco_clk_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000012) 18 { clk_buf [CLK_BUF] [CLK_BUF:ROOT_BANK_SRC==A --#MUX=18] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [ROOT_MUX_SEL:0] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_bank_osc [] + Attributes: + cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 + cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 + cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] + Attributes: + RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] + Attributes: + RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] + Attributes: + RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] + Attributes: + RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] + Attributes: + RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] + Attributes: + RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] + Attributes: + RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] + Attributes: + RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] + Attributes: + RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] + Attributes: + RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] + Attributes: + RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] + Attributes: + RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] + Attributes: + RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] + Attributes: + RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] + Attributes: + RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] + Attributes: + RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] + Attributes: + RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] + Attributes: + RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] + Attributes: + RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] + Attributes: + RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] + Attributes: + RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] + Attributes: + RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] + Attributes: + RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] + Attributes: + RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] + Attributes: + RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] + Attributes: + RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] + Attributes: + RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] + Attributes: + RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] + Attributes: + RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] + Attributes: + RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] + Attributes: + RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] + Attributes: + RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] + Attributes: + RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] + Attributes: + RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] + Attributes: + RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021C9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] + Attributes: + RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] + Attributes: + RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000221D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] + Attributes: + RATE - Addr: 0x00002221, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] + Attributes: + RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] + Attributes: + RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] + Attributes: + RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] + Attributes: + RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] + Attributes: + RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] + Attributes: + RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] + Attributes: + RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] + Attributes: + RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] + Attributes: + RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] + Attributes: + RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] + Attributes: + RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] + Attributes: + RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] + Attributes: + RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] + Attributes: + RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] + Attributes: + RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] + Attributes: + RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] + Attributes: + RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] + Attributes: + RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] + Attributes: + RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] + Attributes: + RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] + Attributes: + RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] + Attributes: + RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] + Attributes: + RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] + Attributes: + RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] + Attributes: + RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] + Attributes: + RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] + Attributes: + RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] + Attributes: + RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] + Attributes: + RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] + Attributes: + RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] + Attributes: + RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] + Attributes: + RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] + Attributes: + RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] + Attributes: + RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] + Attributes: + RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] + Attributes: + RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] + Attributes: + RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] + Attributes: + RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/io_config.json b/icb_bitstream/golden/io_buf_ds_io_ddr/io_config.json new file mode 100644 index 00000000..f5fa9af6 --- /dev/null +++ b/icb_bitstream/golden/io_buf_ds_io_ddr/io_config.json @@ -0,0 +1,429 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\din_n (index=0, width=1, offset=0)", + " Detect input port \\din_p (index=0, width=1, offset=0)", + " Detect output port \\dout_n (index=0, width=1, offset=0)", + " Detect output port \\dout_p (index=0, width=1, offset=0)", + " Detect input port \\enable (index=0, width=1, offset=0)", + " Detect input port \\reset (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_enable", + " Cell port \\I is connected to input port \\enable", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_reset", + " Cell port \\I is connected to input port \\reset", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF \\clk_i_buf", + " Cell port \\I is connected to input port \\clk", + " Data Width: -2", + " Get important connection of cell \\I_BUF_DS \\i_buf_ds", + " Cell port \\I_N is connected to input port \\din_n", + " Cell port \\I_P is connected to input port \\din_p", + " Parameter \\DIFFERENTIAL_TERMINATION: \"TRUE\"", + " Parameter \\IOSTANDARD: \"DEFAULT\"", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUF_DS \\o_buf_ds", + " Cell port \\O_N is connected to output port \\dout_n", + " Cell port \\O_P is connected to output port \\dout_p", + " Parameter \\DIFFERENTIAL_TERMINATION: \"TRUE\"", + " Parameter \\IOSTANDARD: \"DEFAULT\"", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i -> \\clk_buf", + " Connected \\clk_buf", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Try \\I_BUF_DS \\i_buf_ds out connection: \\i_ddr_d -> \\i_ddr", + " Connected \\i_ddr", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Try \\O_BUF_DS \\o_buf_ds out connection: \\o_buf_ds_i -> \\o_ddr", + " Connected \\o_ddr", + " Data Width: -2", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF \\clk_buf: clock port \\O, net \\clk_clk_buf", + " Connected to cell \\I_DDR \\i_ddr", + " Which is a primitive", + " Does not meet core_clk checking criteria. Not sending to fabric", + " Connected to cell \\O_DDR \\o_ddr", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Use slot 0", + " Double check Core/Fabric Clock", + " \\O_DDR \\o_ddr port \\C", + " Good. Found clocking", + " Summary", + " |---------------------------------------------------------------------------------|", + " | ***************************************************** |", + " IN | enable * I_BUF * |", + " IN | reset * I_BUF * |", + " IN | clk * I_BUF |-> CLK_BUF * |", + " IN | din_n+din_p * I_BUF_DS |-> I_DDR * |", + " OUT | * O_DDR |-> O_BUF_DS * dout_n+dout_p |", + " | ***************************************************** |", + " |---------------------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_2_1P (and properties) to Port reset", + " Assign location HP_1_3_1N (and properties) to Port enable", + " Assign location HP_1_4_2P (and properties) to Port din_p", + " Assign location HP_1_5_2N (and properties) to Port din_n", + " Assign location HP_1_6_3P (and properties) to Port dout_p", + " Assign location HP_1_7_3N (and properties) to Port dout_n", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=enable, location: HP_1_3_1N", + " Data signal from object enable", + " Module=I_BUF Linked-object=enable Port=O Net=$ibuf_enable - Found", + " Pin object=reset, location: HP_1_2_1P", + " Data signal from object reset", + " Module=I_BUF Linked-object=reset Port=O Net=$ibuf_reset - Found", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Module=I_BUF Linked-object=clk Port=O Net=$auto_408.clk_buf_i - Not found", + " Fail reason: Clock data from object clk port O is not routed to fabric", + " Pin object=din_n, location: HP_1_5_2N", + " Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid'", + " Pin object=din_p, location: HP_1_4_2P", + " Data signal from object din_p", + " Module=I_DDR Linked-object=din_n+din_p Port=Q Net=o_ddr_d - Found", + " Module=I_DDR Linked-object=din_n+din_p Port=Q Net=$delete_wire$399 - Found", + " Pin object=dout_n, location: HP_1_7_3N", + " Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid'", + " Pin object=dout_p, location: HP_1_6_3P", + " Data signal from object dout_p", + " Module=O_DDR Linked-object=dout_n+dout_p Port=D Net=$auto_404 - Found", + " Module=O_DDR Linked-object=dout_n+dout_p Port=D Net=__const_bit_0__ - Not found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=enable Location=HP_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=reset Location=HP_1_2_1P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF_DS LinkedObject=din_n+din_p Location=HP_1_4_2P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_DDR LinkedObject=din_n+din_p Location=HP_1_4_2P Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=I_DDR LinkedObject=din_n+din_p Location=HP_1_4_2P Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_DDR LinkedObject=dout_n+dout_p Location=HP_1_6_3P Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_DDR LinkedObject=dout_n+dout_p Location=HP_1_6_3P Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", + "linked_object" : "reset", + "linked_objects" : { + "reset" : { + "location" : "HP_1_2_1P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "reset", + "O" : "$ibuf_reset" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "clk_buf_i" + }, + "parameters" : { + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "I" : "clk_buf_i", + "O" : "clk_clk_buf" + }, + "parameters" : { + "ROUTE_TO_FABRIC_CLK" : "0" + }, + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr" + ] + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF_DS", + "name" : "i_buf_ds", + "location_object" : "din_p", + "location" : "HP_1_4_2P", + "linked_object" : "din_n+din_p", + "linked_objects" : { + "din_n" : { + "location" : "HP_1_5_2N", + "properties" : { + } + }, + "din_p" : { + "location" : "HP_1_4_2P", + "properties" : { + } + } + }, + "connectivity" : { + "I_N" : "din_n", + "I_P" : "din_p", + "O" : "i_ddr_d" + }, + "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT", + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_DDR", + "name" : "i_ddr", + "location_object" : "din_p", + "location" : "HP_1_4_2P", + "linked_object" : "din_n+din_p", + "linked_objects" : { + "din_n" : { + "location" : "HP_1_5_2N", + "properties" : { + } + }, + "din_p" : { + "location" : "HP_1_4_2P", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "D" : "i_ddr_d" + }, + "parameters" : { + }, + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_BUF_DS", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUF_DS", + "name" : "o_buf_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", + "linked_object" : "dout_n+dout_p", + "linked_objects" : { + "dout_n" : { + "location" : "HP_1_7_3N", + "properties" : { + } + }, + "dout_p" : { + "location" : "HP_1_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "o_buf_ds_i", + "O_N" : "dout_n", + "O_P" : "dout_p" + }, + "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT" + }, + "flags" : [ + "O_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_DDR", + "name" : "o_ddr", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", + "linked_object" : "dout_n+dout_p", + "linked_objects" : { + "dout_n" : { + "location" : "HP_1_7_3N", + "properties" : { + } + }, + "dout_p" : { + "location" : "HP_1_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "Q" : "o_buf_ds_i" + }, + "parameters" : { + }, + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_BUF_DS", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/io_buf_ds_io_ddr/model_config.ppdb.json b/icb_bitstream/golden/io_buf_ds_io_ddr/model_config.ppdb.json index 1f680761..79879975 100644 --- a/icb_bitstream/golden/io_buf_ds_io_ddr/model_config.ppdb.json +++ b/icb_bitstream/golden/io_buf_ds_io_ddr/model_config.ppdb.json @@ -1,8 +1,120 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_buf_ds_io_ddr/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_buf_ds_io_ddr/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF clk_buf (location:HP_1_CC_18_9P)", + " Route to gearbox module i_ddr (location:HP_1_4_2P)", + " Use FCLK: hp_fclk_0_A", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + " CLK_BUF clk_buf", + " Resource: u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 (Bank A)(CORE)", + "Set CLKBUF remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " CLKBUF clk_buf (location:HP_1_CC_18_9P) use hp_fclk_0_A", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_enable)", + " Object: enable", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_reset)", + " Object: reset", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF (clk_i_buf)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Mismatch", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF (clk_buf)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Match", + " Rule CLK_BUF.ROOT_MUX", + " Match", + " Module: I_BUF_DS (i_buf_ds)", + " Object: din_n", + " Parameter", + " Rule I_BUF_DS.DIFFERENTIAL_TERMINATION", + " Mismatch", + " Property", + " Rule I_BUF_DS.IOSTANDARD", + " Mismatch", + " Object: din_p", + " Parameter", + " Rule I_BUF_DS.DIFFERENTIAL_TERMINATION", + " Mismatch", + " Property", + " Rule I_BUF_DS.IOSTANDARD", + " Mismatch", + " Module: I_DDR (i_ddr)", + " Object: din_n", + " Parameter", + " Rule I_DDR", + " Match", + " Property", + " Object: din_p", + " Parameter", + " Rule I_DDR", + " Match", + " Property", + " Module: O_BUF_DS (o_buf_ds)", + " Object: dout_n", + " Parameter", + " Property", + " Rule O_BUF_DS.IOSTANDARD", + " Mismatch", + " Object: dout_p", + " Parameter", + " Property", + " Rule O_BUF_DS.IOSTANDARD", + " Mismatch", + " Module: O_DDR (o_ddr)", + " Object: dout_n", + " Parameter", + " Rule O_DDR", + " Match", + " Property", + " Object: dout_p", + " Parameter", + " Rule O_DDR", + " Match", + " Property" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.enable", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", "linked_object" : "enable", "linked_objects" : { "enable" : { @@ -21,17 +133,31 @@ }, "connectivity" : { "I" : "enable", - "O" : "$iopadmap$enable" + "O" : "$ibuf_enable" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.reset", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", "linked_object" : "reset", "linked_objects" : { "reset" : { @@ -50,21 +176,35 @@ }, "connectivity" : { "I" : "reset", - "O" : "$iopadmap$reset" + "O" : "$ibuf_reset" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -83,20 +223,58 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rx_fclkio_sel_A_0" : "0" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rxclk_phase_sel_A_0" : "1" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_vco_clk_sel_A_0" : "0" + }, + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + }, + { + "CLK_BUF" : "ROOT_BANK_SRC==A --#MUX=18", + "__location__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0" + }, + { + "ROOT_MUX_SEL" : "0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, @@ -107,12 +285,36 @@ "parameters" : { "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr" + ] + }, + "route_clock_result" : { + "O" : [ + "Use FCLK: hp_fclk_0_A" + ] + }, + "errors" : [ + ], + "__AB__" : "A", + "__ROOT_BANK_MUX_LOCATION__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0", + "__ROOT_BANK_MUX__" : "18", + "__ROOT_MUX__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" }, { "module" : "I_BUF_DS", "name" : "i_buf_ds", + "location_object" : "din_p", + "location" : "HP_1_4_2P", "linked_object" : "din_n+din_p", "linked_objects" : { "din_n" : { @@ -120,6 +322,12 @@ "properties" : { }, "config_attributes" : [ + { + "DFODTEN" : "DF_odt_enable" + }, + { + "I_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] }, "din_p" : { @@ -127,6 +335,12 @@ "properties" : { }, "config_attributes" : [ + { + "DFODTEN" : "DF_odt_enable" + }, + { + "I_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] } }, @@ -136,13 +350,31 @@ "O" : "i_ddr_d" }, "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT", + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" }, { "module" : "I_DDR", "name" : "i_ddr", + "location_object" : "din_p", + "location" : "HP_1_4_2P", "linked_object" : "din_n+din_p", "linked_objects" : { "din_n" : { @@ -150,6 +382,9 @@ "properties" : { }, "config_attributes" : [ + { + "I_DDR" : "MODE==DDR" + } ] }, "din_p" : { @@ -157,6 +392,9 @@ "properties" : { }, "config_attributes" : [ + { + "I_DDR" : "MODE==DDR" + } ] } }, @@ -166,12 +404,26 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_BUF_DS", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { "module" : "O_BUF_DS", "name" : "o_buf_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", "linked_object" : "dout_n+dout_p", "linked_objects" : { "dout_n" : { @@ -179,6 +431,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] }, "dout_p" : { @@ -186,6 +441,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUF_DS" : "IOSTANDARD==DEFAULT" + } ] } }, @@ -195,13 +453,30 @@ "O_P" : "dout_p" }, "parameters" : { + "DIFFERENTIAL_TERMINATION" : "TRUE", + "IOSTANDARD" : "DEFAULT" + }, + "flags" : [ + "O_BUF_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" }, { "module" : "O_DDR", "name" : "o_ddr", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", "linked_object" : "dout_n+dout_p", "linked_objects" : { "dout_n" : { @@ -209,6 +484,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_DDR" : "MODE==DDR" + } ] }, "dout_p" : { @@ -216,6 +494,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_DDR" : "MODE==DDR" + } ] } }, @@ -225,8 +506,20 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_BUF_DS", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" } ] } diff --git a/icb_bitstream/golden/io_ddr/config.json b/icb_bitstream/golden/io_ddr/config.json deleted file mode 100644 index 8f9c7fd2..00000000 --- a/icb_bitstream/golden/io_ddr/config.json +++ /dev/null @@ -1,254 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Detect input port \\enable (index=0, width=1, offset=0)", - " Detect input port \\reset (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.enable", - " Cell port \\I is connected to input port \\enable", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.reset", - " Cell port \\I is connected to input port \\reset", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF \\clk_i_buf", - " Cell port \\I is connected to input port \\clk", - " Get important connection of cell \\I_BUF \\i_buf", - " Cell port \\I is connected to input port \\din", - " Get important connection of cell \\O_BUF \\o_buf", - " Cell port \\O is connected to output port \\dout", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i", - " Connected \\clk_buf", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Try \\I_BUF \\i_buf out connection: \\i_ddr_d", - " Connected \\i_ddr", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Try \\O_BUF \\o_buf out connection: \\o_buf_i", - " Connected \\o_ddr", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\O_DDR \\o_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HP_1_1_0N (and properties) to Port dout", - " Assign location HP_1_2_1P (and properties) to Port reset", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_3_1N (and properties) to Port enable", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.reset", - "linked_object" : "reset", - "linked_objects" : { - "reset" : { - "location" : "HP_1_2_1P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "reset", - "O" : "$iopadmap$reset" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "clk_i_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "clk_buf_i" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "clk_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "clk_buf_i", - "O" : "clk_clk_buf" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - "O" : [ - "i_ddr", - "o_ddr" - ] - } - }, - { - "module" : "I_BUF", - "name" : "i_buf", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "i_ddr_d" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "I_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "I_DDR", - "name" : "i_ddr", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "D" : "i_ddr_d" - }, - "parameters" : { - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "o_buf", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "o_buf_i", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "O_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "O_DDR", - "name" : "o_ddr", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "Q" : "o_buf_i" - }, - "parameters" : { - }, - "pre_primitive" : "O_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/io_ddr/design_edit.sdc b/icb_bitstream/golden/io_ddr/design_edit.sdc new file mode 100644 index 00000000..efad3447 --- /dev/null +++ b/icb_bitstream/golden/io_ddr/design_edit.sdc @@ -0,0 +1,123 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock is only used by gearbox, does not need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: CLK_BUF clk_buf) + +############# +# +# Each pin mode and location assignment +# +############# +# Pin enable :: I_BUF +# set_mode MODE_BP_DIR_B_RX HP_1_3_1N +# set_io enable HP_1_3_1N --> (original) +set_io $ibuf_enable HP_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin reset :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_2_1P +# set_io reset HP_1_2_1P --> (original) +set_io $ibuf_reset HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Clock data from object clk port O is not routed to fabric +# Pin clk :: I_BUF |-> CLK_BUF + +# Pin din :: I_BUF |-> I_DDR +# set_mode MODE_BP_DDR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io o_ddr_d HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[0]_A +set_io $delete_wire$399 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[1]_A + +# Pin dout :: O_DDR |-> O_BUFT +# set_mode MODE_BP_DDR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $auto_405 HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_out[5]_A +# set_io __const_bit_0__ HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_out[6]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: enable +# Location: HP_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_400 HP_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: reset +# Location: HP_1_2_1P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_401 HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_402 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_403 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin f2g_in_en_A + +# Module: I_DDR +# LinkedObject: din +# Location: HP_1_0_0P +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: I_DDR +# LinkedObject: din +# Location: HP_1_0_0P +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_404 HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_DDR +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin TO_BE_DETERMINED + +# Module: O_DDR +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin TO_BE_DETERMINED + +############# +# +# Each gearbox core clock +# +############# +# Module: O_DDR +# Name: o_ddr +# Location: HP_1_1_0N +# Port: C +# Net: clk_clk_buf +# Slot: 0 +set_core_clk HP_1_1_0N 0 + diff --git a/icb_bitstream/golden/io_ddr/io_bitstream.detail.txt b/icb_bitstream/golden/io_ddr/io_bitstream.detail.bit similarity index 97% rename from icb_bitstream/golden/io_ddr/io_bitstream.detail.txt rename to icb_bitstream/golden/io_ddr/io_bitstream.detail.bit index 5d5bbb2b..9c6e221b 100644 --- a/icb_bitstream/golden/io_ddr/io_bitstream.detail.txt +++ b/icb_bitstream/golden/io_ddr/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,30 +3417,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] Attributes: RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,30 +3609,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] Attributes: RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 @@ -3779,92 +3779,92 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT], o_ddr [O_DDR] [O_DDR:MODE==DDR] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { o_buf [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { o_buf [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000001) 1 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], i_ddr [I_DDR] [I_DDR:MODE==DDR] } RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000001) 1 { clk_buf [CLK_BUF] [cfg_rxclk_phase_sel_A_0:1] [from HP_1_CC_18_9P] } + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_rx_fclkio_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_vco_clk_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000012) 18 { clk_buf [CLK_BUF] [CLK_BUF:ROOT_BANK_SRC==A --#MUX=18] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -3909,7 +3909,7 @@ Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [ROOT_MUX_SEL:0] [from HP_1_CC_18_9P] } Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] Attributes: ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_ddr/io_config.json b/icb_bitstream/golden/io_ddr/io_config.json new file mode 100644 index 00000000..da88edc8 --- /dev/null +++ b/icb_bitstream/golden/io_ddr/io_config.json @@ -0,0 +1,388 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Detect input port \\enable (index=0, width=1, offset=0)", + " Detect input port \\reset (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_enable", + " Cell port \\I is connected to input port \\enable", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_reset", + " Cell port \\I is connected to input port \\reset", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF \\clk_i_buf", + " Cell port \\I is connected to input port \\clk", + " Data Width: -2", + " Get important connection of cell \\I_BUF \\i_buf", + " Cell port \\I is connected to input port \\din", + " Data Width: -2", + " Get important connection of cell \\O_BUFT \\o_buf", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i -> \\clk_buf", + " Connected \\clk_buf", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Try \\I_BUF \\i_buf out connection: \\i_ddr_d -> \\i_ddr", + " Connected \\i_ddr", + " Data Width: -2", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Try \\O_BUFT \\o_buf out connection: \\o_buf_i -> \\o_ddr", + " Connected \\o_ddr", + " Data Width: -2", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF \\clk_buf: clock port \\O, net \\clk_clk_buf", + " Connected to cell \\I_DDR \\i_ddr", + " Which is a primitive", + " Does not meet core_clk checking criteria. Not sending to fabric", + " Connected to cell \\O_DDR \\o_ddr", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Use slot 0", + " Double check Core/Fabric Clock", + " \\O_DDR \\o_ddr port \\C", + " Good. Found clocking", + " Summary", + " |------------------------------------------------------------------|", + " | **************************************************** |", + " IN | enable * I_BUF * |", + " IN | reset * I_BUF * |", + " IN | clk * I_BUF |-> CLK_BUF * |", + " IN | din * I_BUF |-> I_DDR * |", + " OUT | * O_DDR |-> O_BUFT * dout |", + " | **************************************************** |", + " |------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Assign location HP_1_2_1P (and properties) to Port reset", + " Assign location HP_1_3_1N (and properties) to Port enable", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=enable, location: HP_1_3_1N", + " Data signal from object enable", + " Module=I_BUF Linked-object=enable Port=O Net=$ibuf_enable - Found", + " Pin object=reset, location: HP_1_2_1P", + " Data signal from object reset", + " Module=I_BUF Linked-object=reset Port=O Net=$ibuf_reset - Found", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Module=I_BUF Linked-object=clk Port=O Net=$auto_409.clk_buf_i - Not found", + " Fail reason: Clock data from object clk port O is not routed to fabric", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_DDR Linked-object=din Port=Q Net=o_ddr_d - Found", + " Module=I_DDR Linked-object=din Port=Q Net=$delete_wire$399 - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_DDR Linked-object=dout Port=D Net=$auto_405 - Found", + " Module=O_DDR Linked-object=dout Port=D Net=__const_bit_0__ - Not found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=enable Location=HP_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=reset Location=HP_1_2_1P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_DDR LinkedObject=din Location=HP_1_0_0P Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=I_DDR LinkedObject=din Location=HP_1_0_0P Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_DDR LinkedObject=dout Location=HP_1_1_0N Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_DDR LinkedObject=dout Location=HP_1_1_0N Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", + "linked_object" : "reset", + "linked_objects" : { + "reset" : { + "location" : "HP_1_2_1P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "reset", + "O" : "$ibuf_reset" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "clk_buf_i" + }, + "parameters" : { + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "I" : "clk_buf_i", + "O" : "clk_clk_buf" + }, + "parameters" : { + "ROUTE_TO_FABRIC_CLK" : "0" + }, + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr" + ] + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "i_buf", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "i_ddr_d" + }, + "parameters" : { + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_DDR", + "name" : "i_ddr", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "D" : "i_ddr_d" + }, + "parameters" : { + }, + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "o_buf", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "o_buf_i", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_DDR", + "name" : "o_ddr", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "Q" : "o_buf_i" + }, + "parameters" : { + }, + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/io_ddr/model_config.ppdb.json b/icb_bitstream/golden/io_ddr/model_config.ppdb.json index 14cd87cd..03180634 100644 --- a/icb_bitstream/golden/io_ddr/model_config.ppdb.json +++ b/icb_bitstream/golden/io_ddr/model_config.ppdb.json @@ -1,8 +1,98 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_ddr/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_ddr/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF clk_buf (location:HP_1_CC_18_9P)", + " Route to gearbox module i_ddr (location:HP_1_0_0P)", + " Use FCLK: hp_fclk_0_A", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + " CLK_BUF clk_buf", + " Resource: u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 (Bank A)(CORE)", + "Set CLKBUF remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " CLKBUF clk_buf (location:HP_1_CC_18_9P) use hp_fclk_0_A", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_enable)", + " Object: enable", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_reset)", + " Object: reset", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF (clk_i_buf)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Mismatch", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF (clk_buf)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Match", + " Rule CLK_BUF.ROOT_MUX", + " Match", + " Module: I_BUF (i_buf)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Mismatch", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_DDR (i_ddr)", + " Object: din", + " Parameter", + " Rule I_DDR", + " Match", + " Property", + " Module: O_BUFT (o_buf)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_DDR (o_ddr)", + " Object: dout", + " Parameter", + " Rule O_DDR", + " Match", + " Property" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.enable", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", "linked_object" : "enable", "linked_objects" : { "enable" : { @@ -21,17 +111,31 @@ }, "connectivity" : { "I" : "enable", - "O" : "$iopadmap$enable" + "O" : "$ibuf_enable" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.reset", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", "linked_object" : "reset", "linked_objects" : { "reset" : { @@ -50,21 +154,35 @@ }, "connectivity" : { "I" : "reset", - "O" : "$iopadmap$reset" + "O" : "$ibuf_reset" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -83,20 +201,58 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rx_fclkio_sel_A_0" : "0" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rxclk_phase_sel_A_0" : "1" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_vco_clk_sel_A_0" : "0" + }, + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + }, + { + "CLK_BUF" : "ROOT_BANK_SRC==A --#MUX=18", + "__location__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0" + }, + { + "ROOT_MUX_SEL" : "0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, @@ -107,12 +263,36 @@ "parameters" : { "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr" + ] + }, + "route_clock_result" : { + "O" : [ + "Use FCLK: hp_fclk_0_A" + ] + }, + "errors" : [ + ], + "__AB__" : "A", + "__ROOT_BANK_MUX_LOCATION__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0", + "__ROOT_BANK_MUX__" : "18", + "__ROOT_MUX__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" }, { "module" : "I_BUF", "name" : "i_buf", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -135,12 +315,27 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_DDR", "name" : "i_ddr", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -148,6 +343,9 @@ "properties" : { }, "config_attributes" : [ + { + "I_DDR" : "MODE==DDR" + } ] } }, @@ -157,12 +355,26 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { - "module" : "O_BUF", + "module" : "O_BUFT", "name" : "o_buf", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -171,7 +383,7 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } @@ -182,12 +394,27 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "O_DDR", "name" : "o_ddr", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -195,6 +422,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_DDR" : "MODE==DDR" + } ] } }, @@ -204,8 +434,20 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" } ] } diff --git a/icb_bitstream/golden/io_delay/config.json b/icb_bitstream/golden/io_delay/config.json deleted file mode 100644 index 992aafb4..00000000 --- a/icb_bitstream/golden/io_delay/config.json +++ /dev/null @@ -1,615 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\delay_adj (index=0, width=1, offset=0)", - " Detect input port \\delay_incdec (index=0, width=1, offset=0)", - " Detect input port \\delay_load (index=0, width=1, offset=0)", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Detect output port \\i_delay_value (index=0, width=6, offset=0)", - " Detect output port \\i_delay_value (index=1, width=6, offset=0)", - " Detect output port \\i_delay_value (index=2, width=6, offset=0)", - " Detect output port \\i_delay_value (index=3, width=6, offset=0)", - " Detect output port \\i_delay_value (index=4, width=6, offset=0)", - " Detect output port \\i_delay_value (index=5, width=6, offset=0)", - " Detect output port \\o_delay_value (index=0, width=6, offset=0)", - " Detect output port \\o_delay_value (index=1, width=6, offset=0)", - " Detect output port \\o_delay_value (index=2, width=6, offset=0)", - " Detect output port \\o_delay_value (index=3, width=6, offset=0)", - " Detect output port \\o_delay_value (index=4, width=6, offset=0)", - " Detect output port \\o_delay_value (index=5, width=6, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_adj", - " Cell port \\I is connected to input port \\delay_adj", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_incdec", - " Cell port \\I is connected to input port \\delay_incdec", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_load", - " Cell port \\I is connected to input port \\delay_load", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.dout", - " Cell port \\O is connected to output port \\dout", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value", - " Cell port \\O is connected to output port \\i_delay_value[0]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_1", - " Cell port \\O is connected to output port \\i_delay_value[1]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_2", - " Cell port \\O is connected to output port \\i_delay_value[2]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_3", - " Cell port \\O is connected to output port \\i_delay_value[3]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_4", - " Cell port \\O is connected to output port \\i_delay_value[4]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_5", - " Cell port \\O is connected to output port \\i_delay_value[5]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value", - " Cell port \\O is connected to output port \\o_delay_value[0]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_1", - " Cell port \\O is connected to output port \\o_delay_value[1]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_2", - " Cell port \\O is connected to output port \\o_delay_value[2]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_3", - " Cell port \\O is connected to output port \\o_delay_value[3]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_4", - " Cell port \\O is connected to output port \\o_delay_value[4]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_5", - " Cell port \\O is connected to output port \\o_delay_value[5]", - " Get important connection of cell \\I_BUF \\clk_i_buf", - " Cell port \\I is connected to input port \\clk", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i", - " Connected \\clk_buf", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Try \\I_BUF $iopadmap$top.din out connection: $iopadmap$din", - " Connected \\i_delay", - " Parameter \\DELAY: 50", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Try \\O_BUF $iopadmap$top.dout out connection: $iopadmap$dout", - " Connected \\o_delay", - " Parameter \\DELAY: 60", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " \\I_DELAY \\i_delay port \\CLK_IN: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\O_DELAY \\o_delay port \\CLK_IN: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " Assign location HR_5_5_2N (and properties) to Port i_delay_value[5]", - " Assign location HR_5_3_1N (and properties) to Port i_delay_value[3]", - " Assign location HR_5_1_0N (and properties) to Port i_delay_value[1]", - " Assign location HR_5_9_4N (and properties) to Port o_delay_value[3]", - " Assign location HR_5_8_4P (and properties) to Port o_delay_value[2]", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HR_5_0_0P (and properties) to Port i_delay_value[0]", - " Assign location HR_5_CC_11_5N (and properties) to Port o_delay_value[5]", - " Assign location HP_1_1_0N (and properties) to Port dout", - " Assign location HR_5_CC_10_5P (and properties) to Port o_delay_value[4]", - " Assign location HR_1_0_0P (and properties) to Port delay_load", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HR_1_1_0N (and properties) to Port delay_adj", - " Assign location HR_5_4_2P (and properties) to Port i_delay_value[4]", - " Assign location HR_5_2_1P (and properties) to Port i_delay_value[2]", - " Assign location HR_1_3_1N (and properties) to Port delay_incdec", - " Assign location HR_5_6_3P (and properties) to Port o_delay_value[0]", - " Assign location HR_5_7_3N (and properties) to Port o_delay_value[1]", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_adj", - "linked_object" : "delay_adj", - "linked_objects" : { - "delay_adj" : { - "location" : "HR_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_adj", - "O" : "$iopadmap$delay_adj" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_incdec", - "linked_object" : "delay_incdec", - "linked_objects" : { - "delay_incdec" : { - "location" : "HR_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_incdec", - "O" : "$iopadmap$delay_incdec" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_load", - "linked_object" : "delay_load", - "linked_objects" : { - "delay_load" : { - "location" : "HR_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_load", - "O" : "$iopadmap$delay_load" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - "I_DELAY" - ], - "route_clock_to" : { - } - }, - { - "module" : "I_DELAY", - "name" : "i_delay", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "CLK_IN" : "clk_clk_buf", - "I" : "$iopadmap$din", - "O" : "o_delay_i" - }, - "parameters" : { - "DELAY" : "50" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$dout", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "O_DELAY" - ], - "route_clock_to" : { - } - }, - { - "module" : "O_DELAY", - "name" : "o_delay", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "CLK_IN" : "clk_clk_buf", - "I" : "o_delay_i", - "O" : "$iopadmap$dout" - }, - "parameters" : { - "DELAY" : "60" - }, - "pre_primitive" : "O_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value", - "linked_object" : "i_delay_value[0]", - "linked_objects" : { - "i_delay_value[0]" : { - "location" : "HR_5_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[0]", - "O" : "i_delay_value[0]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_1", - "linked_object" : "i_delay_value[1]", - "linked_objects" : { - "i_delay_value[1]" : { - "location" : "HR_5_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[1]", - "O" : "i_delay_value[1]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_2", - "linked_object" : "i_delay_value[2]", - "linked_objects" : { - "i_delay_value[2]" : { - "location" : "HR_5_2_1P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[2]", - "O" : "i_delay_value[2]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_3", - "linked_object" : "i_delay_value[3]", - "linked_objects" : { - "i_delay_value[3]" : { - "location" : "HR_5_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[3]", - "O" : "i_delay_value[3]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_4", - "linked_object" : "i_delay_value[4]", - "linked_objects" : { - "i_delay_value[4]" : { - "location" : "HR_5_4_2P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[4]", - "O" : "i_delay_value[4]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_5", - "linked_object" : "i_delay_value[5]", - "linked_objects" : { - "i_delay_value[5]" : { - "location" : "HR_5_5_2N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[5]", - "O" : "i_delay_value[5]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value", - "linked_object" : "o_delay_value[0]", - "linked_objects" : { - "o_delay_value[0]" : { - "location" : "HR_5_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[0]", - "O" : "o_delay_value[0]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_1", - "linked_object" : "o_delay_value[1]", - "linked_objects" : { - "o_delay_value[1]" : { - "location" : "HR_5_7_3N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[1]", - "O" : "o_delay_value[1]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_2", - "linked_object" : "o_delay_value[2]", - "linked_objects" : { - "o_delay_value[2]" : { - "location" : "HR_5_8_4P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[2]", - "O" : "o_delay_value[2]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_3", - "linked_object" : "o_delay_value[3]", - "linked_objects" : { - "o_delay_value[3]" : { - "location" : "HR_5_9_4N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[3]", - "O" : "o_delay_value[3]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_4", - "linked_object" : "o_delay_value[4]", - "linked_objects" : { - "o_delay_value[4]" : { - "location" : "HR_5_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[4]", - "O" : "o_delay_value[4]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_5", - "linked_object" : "o_delay_value[5]", - "linked_objects" : { - "o_delay_value[5]" : { - "location" : "HR_5_CC_11_5N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[5]", - "O" : "o_delay_value[5]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "clk_i_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "clk_buf_i" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "clk_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "clk_buf_i", - "O" : "clk_clk_buf" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - "O" : [ - "i_delay", - "o_delay" - ] - } - } - ] -} diff --git a/icb_bitstream/golden/io_delay/design_edit.sdc b/icb_bitstream/golden/io_delay/design_edit.sdc new file mode 100644 index 00000000..50a13fc9 --- /dev/null +++ b/icb_bitstream/golden/io_delay/design_edit.sdc @@ -0,0 +1,336 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock is only used by gearbox, does not need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: CLK_BUF clk_buf) + +############# +# +# Each pin mode and location assignment +# +############# +# Pin delay_adj :: I_BUF +# set_mode MODE_BP_DIR_B_RX HR_1_1_0N +# set_io delay_adj HR_1_1_0N --> (original) +set_io $ibuf_delay_adj HR_1_0_0P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin delay_incdec :: I_BUF +# set_mode MODE_BP_DIR_B_RX HR_1_3_1N +# set_io delay_incdec HR_1_3_1N --> (original) +set_io $ibuf_delay_incdec HR_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin delay_load :: I_BUF +# set_mode MODE_BP_DIR_A_RX HR_1_0_0P +# set_io delay_load HR_1_0_0P --> (original) +set_io $ibuf_delay_load HR_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin din :: I_BUF |-> I_DELAY +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io o_delay_i HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin dout :: O_DELAY |-> O_BUFT +# set_mode MODE_BP_DIR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $auto_431 HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin i_delay_value[0] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_0_0P +# set_io i_delay_value[0] HR_5_0_0P --> (original) +set_io $obuf_i_delay_value[0] HR_5_0_0P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[1] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_1_0N +# set_io i_delay_value[1] HR_5_1_0N --> (original) +set_io $obuf_i_delay_value[1] HR_5_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin i_delay_value[2] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_2_1P +# set_io i_delay_value[2] HR_5_2_1P --> (original) +set_io $obuf_i_delay_value[2] HR_5_2_1P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[3] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_3_1N +# set_io i_delay_value[3] HR_5_3_1N --> (original) +set_io $obuf_i_delay_value[3] HR_5_2_1P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin i_delay_value[4] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_4_2P +# set_io i_delay_value[4] HR_5_4_2P --> (original) +set_io $obuf_i_delay_value[4] HR_5_4_2P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[5] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_5_2N +# set_io i_delay_value[5] HR_5_5_2N --> (original) +set_io $obuf_i_delay_value[5] HR_5_4_2P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[0] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_6_3P +# set_io o_delay_value[0] HR_5_6_3P --> (original) +set_io $obuf_o_delay_value[0] HR_5_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[1] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_7_3N +# set_io o_delay_value[1] HR_5_7_3N --> (original) +set_io $obuf_o_delay_value[1] HR_5_6_3P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[2] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_8_4P +# set_io o_delay_value[2] HR_5_8_4P --> (original) +set_io $obuf_o_delay_value[2] HR_5_8_4P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[3] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_9_4N +# set_io o_delay_value[3] HR_5_9_4N --> (original) +set_io $obuf_o_delay_value[3] HR_5_8_4P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[4] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_CC_18_9P +# set_io o_delay_value[4] HR_5_CC_18_9P --> (original) +set_io $obuf_o_delay_value[4] HR_5_CC_18_9P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[5] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_CC_19_9N +# set_io o_delay_value[5] HR_5_CC_19_9N --> (original) +set_io $obuf_o_delay_value[5] HR_5_CC_18_9P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Clock data from object clk port O is not routed to fabric +# Pin clk :: I_BUF |-> CLK_BUF + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: delay_adj +# Location: HR_1_1_0N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_413 HR_1_1_0N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: delay_incdec +# Location: HR_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_414 HR_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: delay_load +# Location: HR_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_415 HR_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_416 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_ADJ +# Signal: in:rule=half-first:f2g_trx_dly_adj +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_adj_$ibuf_delay_adj_2 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_trx_dly_adj + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_INCDEC +# Signal: in:rule=half-first:f2g_trx_dly_inc +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_inc_$ibuf_delay_incdec_2 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_trx_dly_inc + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_LOAD +# Signal: in:rule=half-first:f2g_trx_dly_ld +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_ld_$ibuf_delay_load_2 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_trx_dly_ld + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_TAP_VALUE +# Signal: out:rule=half-first:g2f_trx_dly_tap +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $ifab_$obuf_i_delay_value[0] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[0] +set_io $ifab_$obuf_i_delay_value[1] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[1] +set_io $ifab_$obuf_i_delay_value[2] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[2] +set_io $ifab_$obuf_i_delay_value[3] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[3] +set_io $ifab_$obuf_i_delay_value[4] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[4] +set_io $ifab_$obuf_i_delay_value[5] HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_trx_dly_tap[5] + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_417 HP_1_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_ADJ +# Signal: in:rule=half-first:f2g_trx_dly_adj +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_adj had already been used +# set_io $f2g_trx_dly_adj_$ibuf_delay_adj HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_trx_dly_adj + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_INCDEC +# Signal: in:rule=half-first:f2g_trx_dly_inc +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_inc had already been used +# set_io $f2g_trx_dly_inc_$ibuf_delay_incdec HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_trx_dly_inc + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_LOAD +# Signal: in:rule=half-first:f2g_trx_dly_ld +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_ld had already been used +# set_io $f2g_trx_dly_ld_$ibuf_delay_load HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_trx_dly_ld + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_TAP_VALUE +# Signal: out:rule=half-first:g2f_trx_dly_tap +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[0] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[1] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[2] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[3] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[4] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[5] had already been used +# set_io $ifab_$obuf_o_delay_value[0] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[0] +# set_io $ifab_$obuf_o_delay_value[1] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[1] +# set_io $ifab_$obuf_o_delay_value[2] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[2] +# set_io $ifab_$obuf_o_delay_value[3] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[3] +# set_io $ifab_$obuf_o_delay_value[4] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[4] +# set_io $ifab_$obuf_o_delay_value[5] HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin g2f_trx_dly_tap[5] + +# Module: O_BUFT +# LinkedObject: i_delay_value[0] +# Location: HR_5_0_0P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_418 HR_5_0_0P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[1] +# Location: HR_5_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_419 HR_5_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: i_delay_value[2] +# Location: HR_5_2_1P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_420 HR_5_2_1P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[3] +# Location: HR_5_3_1N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_421 HR_5_3_1N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: i_delay_value[4] +# Location: HR_5_4_2P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_422 HR_5_4_2P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[5] +# Location: HR_5_5_2N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_423 HR_5_5_2N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[0] +# Location: HR_5_6_3P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_424 HR_5_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[1] +# Location: HR_5_7_3N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_425 HR_5_7_3N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[2] +# Location: HR_5_8_4P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_426 HR_5_8_4P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[3] +# Location: HR_5_9_4N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_427 HR_5_9_4N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[4] +# Location: HR_5_CC_18_9P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_428 HR_5_CC_18_9P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[5] +# Location: HR_5_CC_19_9N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_429 HR_5_CC_19_9N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_430 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +############# +# +# Each gearbox core clock +# +############# +# Module: I_DELAY +# Name: i_delay +# Location: HP_1_0_0P +# Port: CLK_IN +# Net: clk_clk_buf +# Slot: 0 +set_core_clk HP_1_0_0P 0 + +# Module: O_DELAY +# Name: o_delay +# Location: HP_1_1_0N +# Port: CLK_IN +# Net: clk_clk_buf +# Slot: 0 +# Skip reason: Had been defined by I_DELAY i_delay + diff --git a/icb_bitstream/golden/io_delay/io_bitstream.detail.bit b/icb_bitstream/golden/io_delay/io_bitstream.detail.bit new file mode 100644 index 00000000..19f84b01 --- /dev/null +++ b/icb_bitstream/golden/io_delay/io_bitstream.detail.bit @@ -0,0 +1,5962 @@ +// Feature Bitstream: IO +// Model: PERIPHERY +// Total Bits: 10513 +// Timestamp: +// Format: DETAIL +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] + Attributes: + RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] + Attributes: + RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] + Attributes: + RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] + Attributes: + RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] + Attributes: + RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] + Attributes: + RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] + Attributes: + RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] + Attributes: + RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] + Attributes: + RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] + Attributes: + RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] + Attributes: + RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] + Attributes: + RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] + Attributes: + RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] + Attributes: + RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] + Attributes: + RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] + Attributes: + RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] + Attributes: + RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] + Attributes: + RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] + Attributes: + RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] + Attributes: + RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] + Attributes: + RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] + Attributes: + RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] + Attributes: + RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] + Attributes: + RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] + Attributes: + RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] + Attributes: + RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] + Attributes: + RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] + Attributes: + RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] + Attributes: + RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] + Attributes: + RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] + Attributes: + RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] + Attributes: + RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] + Attributes: + RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] + Attributes: + RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] + Attributes: + RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] + Attributes: + RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] + Attributes: + RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] + Attributes: + RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] + Attributes: + RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] + Attributes: + RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] + Attributes: + RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] + Attributes: + RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] + Attributes: + RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] + Attributes: + RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] + Attributes: + RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] + Attributes: + RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] + Attributes: + RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] + Attributes: + RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] + Attributes: + RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] + Attributes: + RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] + Attributes: + RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] + Attributes: + RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] + Attributes: + RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] + Attributes: + RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] + Attributes: + RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] + Attributes: + RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] + Attributes: + RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] + Attributes: + RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] + Attributes: + RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] + Attributes: + RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] + Attributes: + RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000009FE, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] + Attributes: + RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000A28, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] + Attributes: + RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] + Attributes: + RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] + Attributes: + RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] + Attributes: + RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] + Attributes: + RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] + Attributes: + RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] + Attributes: + RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] + Attributes: + RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] + Attributes: + RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] + Attributes: + RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] + Attributes: + RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] + Attributes: + RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C20, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] + Attributes: + RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] + Attributes: + RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C74, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] + Attributes: + RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] + Attributes: + RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] + Attributes: + RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] + Attributes: + RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] + Attributes: + RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] + Attributes: + RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] + Attributes: + RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] + Attributes: + RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] + Attributes: + RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] + Attributes: + RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] + Attributes: + RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] + Attributes: + RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] + Attributes: + RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] + Attributes: + RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] + Attributes: + RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] + Attributes: + RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] + Attributes: + RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] + Attributes: + RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] + Attributes: + RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] + Attributes: + RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] + Attributes: + RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] + Attributes: + RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] + Attributes: + RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] + Attributes: + RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] + Attributes: + RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] + Attributes: + RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] + Attributes: + RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] + Attributes: + RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] + Attributes: + RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] + Attributes: + RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] + Attributes: + RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] + Attributes: + RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] + Attributes: + RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] + Attributes: + RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] + Attributes: + RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] + Attributes: + RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] + Attributes: + RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] + Attributes: + RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] + Attributes: + RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] + Attributes: + RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] + Attributes: + RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] + Attributes: + RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] + Attributes: + RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] + Attributes: + RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] + Attributes: + RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] + Attributes: + RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] + Attributes: + RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] + Attributes: + RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] + Attributes: + RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] + Attributes: + RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] + Attributes: + RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] + Attributes: + RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] + Attributes: + RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] + Attributes: + RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] + Attributes: + RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] + Attributes: + RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] + Attributes: + RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] + Attributes: + RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] + Attributes: + RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] + Attributes: + RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] + Attributes: + RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] + Attributes: + RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] + Attributes: + RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] + Attributes: + RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] + Attributes: + RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] + Attributes: + RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] + Attributes: + RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] + Attributes: + RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] + Attributes: + RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] + Attributes: + RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] + Attributes: + RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] + Attributes: + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] + Attributes: + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] + Attributes: + RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] + Attributes: + RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] + Attributes: + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] + Attributes: + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] + Attributes: + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x0000003C) 60 { o_delay [O_DELAY] [TX_DLY:60] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] + Attributes: + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000032) 50 { i_delay [I_DELAY] [RX_DLY:50] } + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] + Attributes: + hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 + hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000001) 1 { clk_buf [CLK_BUF] [cfg_rxclk_phase_sel_A_0:1] [from HP_1_CC_18_9P] } + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_rx_fclkio_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_vco_clk_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000012) 18 { clk_buf [CLK_BUF] [CLK_BUF:ROOT_BANK_SRC==A --#MUX=18] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [ROOT_MUX_SEL:0] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_bank_osc [] + Attributes: + cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 + cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 + cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] + Attributes: + RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] + Attributes: + RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] + Attributes: + RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] + Attributes: + RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] + Attributes: + RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] + Attributes: + RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] + Attributes: + RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] + Attributes: + RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] + Attributes: + RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] + Attributes: + RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] + Attributes: + RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] + Attributes: + RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] + Attributes: + RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] + Attributes: + RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] + Attributes: + RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] + Attributes: + RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] + Attributes: + RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] + Attributes: + RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] + Attributes: + RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] + Attributes: + RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] + Attributes: + RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] + Attributes: + RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] + Attributes: + RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] + Attributes: + RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] + Attributes: + RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] + Attributes: + RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] + Attributes: + RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] + Attributes: + RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] + Attributes: + RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] + Attributes: + RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] + Attributes: + RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] + Attributes: + RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] + Attributes: + RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] + Attributes: + RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] + Attributes: + RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000021C9, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] + Attributes: + RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] + Attributes: + RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000221D, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] + Attributes: + RATE - Addr: 0x00002221, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00002247, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] + Attributes: + RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] + Attributes: + RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] + Attributes: + RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] + Attributes: + RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] + Attributes: + RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] + Attributes: + RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] + Attributes: + RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] + Attributes: + RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] + Attributes: + RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] + Attributes: + RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] + Attributes: + RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] + Attributes: + RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] + Attributes: + RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] + Attributes: + RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] + Attributes: + RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] + Attributes: + RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] + Attributes: + RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] + Attributes: + RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] + Attributes: + RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] + Attributes: + RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] + Attributes: + RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] + Attributes: + RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] + Attributes: + RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] + Attributes: + RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] + Attributes: + RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] + Attributes: + RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] + Attributes: + RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] + Attributes: + RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] + Attributes: + RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] + Attributes: + RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] + Attributes: + RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] + Attributes: + RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] + Attributes: + RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] + Attributes: + RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] + Attributes: + RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] + Attributes: + RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] + Attributes: + RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] + Attributes: + RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_delay/io_bitstream.detail.txt b/icb_bitstream/golden/io_delay/io_bitstream.detail.txt deleted file mode 100644 index f17057e9..00000000 --- a/icb_bitstream/golden/io_delay/io_bitstream.detail.txt +++ /dev/null @@ -1,5962 +0,0 @@ -// Feature Bitstream: IO -// Model: PERIPHERY -// Total Bits: 10513 -// Timestamp: -// Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] - Attributes: - RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] - Attributes: - RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] - Attributes: - RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] - Attributes: - RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] - Attributes: - RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] - Attributes: - RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] - Attributes: - RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] - Attributes: - RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] - Attributes: - RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] - Attributes: - RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] - Attributes: - RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] - Attributes: - RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] - Attributes: - RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] - Attributes: - RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] - Attributes: - RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] - Attributes: - RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] - Attributes: - RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] - Attributes: - RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] - Attributes: - RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] - Attributes: - RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] - Attributes: - RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] - Attributes: - RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] - Attributes: - RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] - Attributes: - RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] - Attributes: - RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] - Attributes: - RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] - Attributes: - RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] - Attributes: - RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] - Attributes: - RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] - Attributes: - RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] - Attributes: - RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] - Attributes: - RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] - Attributes: - RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] - Attributes: - RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] - Attributes: - RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] - Attributes: - RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] - Attributes: - RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] - Attributes: - RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] - Attributes: - RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] - Attributes: - RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] - Attributes: - RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] - Attributes: - RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] - Attributes: - RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] - Attributes: - RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] - Attributes: - RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] - Attributes: - RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] - Attributes: - RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] - Attributes: - RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] - Attributes: - RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] - Attributes: - RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] - Attributes: - RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] - Attributes: - RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] - Attributes: - RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] - Attributes: - RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] - Attributes: - RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] - Attributes: - RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] - Attributes: - RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] - Attributes: - RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] - Attributes: - RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] - Attributes: - RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] - Attributes: - RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] - Attributes: - RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] - Attributes: - RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] - Attributes: - RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] - Attributes: - RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] - Attributes: - RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] - Attributes: - RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] - Attributes: - RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] - Attributes: - RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] - Attributes: - RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000B78, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] - Attributes: - RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] - Attributes: - RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] - Attributes: - RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] - Attributes: - RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C20, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] - Attributes: - RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] - Attributes: - RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C74, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] - Attributes: - RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] - Attributes: - RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] - Attributes: - RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] - Attributes: - RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] - Attributes: - RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] - Attributes: - RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] - Attributes: - RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] - Attributes: - RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] - Attributes: - RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] - Attributes: - RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] - Attributes: - RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] - Attributes: - RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] - Attributes: - RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] - Attributes: - RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] - Attributes: - RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] - Attributes: - RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] - Attributes: - RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] - Attributes: - RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] - Attributes: - RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] - Attributes: - RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] - Attributes: - RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] - Attributes: - RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] - Attributes: - RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] - Attributes: - RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] - Attributes: - RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] - Attributes: - RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] - Attributes: - RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] - Attributes: - RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] - Attributes: - RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] - Attributes: - RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] - Attributes: - RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] - Attributes: - RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] - Attributes: - RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] - Attributes: - RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] - Attributes: - RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] - Attributes: - RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] - Attributes: - RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] - Attributes: - RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] - Attributes: - RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] - Attributes: - RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] - Attributes: - RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] - Attributes: - RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] - Attributes: - RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] - Attributes: - RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] - Attributes: - RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] - Attributes: - RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] - Attributes: - RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] - Attributes: - RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] - Attributes: - RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] - Attributes: - RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] - Attributes: - RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] - Attributes: - RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] - Attributes: - RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] - Attributes: - RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] - Attributes: - RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] - Attributes: - RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] - Attributes: - RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] - Attributes: - RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] - Attributes: - RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] - Attributes: - RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] - Attributes: - RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] - Attributes: - RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] - Attributes: - RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] - Attributes: - RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] - Attributes: - RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] - Attributes: - RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] - Attributes: - RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] - Attributes: - RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] - Attributes: - RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] - Attributes: - RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] - Attributes: - RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] - Attributes: - RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] - Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] - Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] - Attributes: - RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] - Attributes: - RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] - Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] - Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] - Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x0000003C) 60 { o_delay [O_DELAY] [TX_DLY:60] } - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] - Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000032) 50 { i_delay [I_DELAY] [RX_DLY:50] } - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] - Attributes: - hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 - hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_bank_osc [] - Attributes: - cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 - cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 - cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] - Attributes: - RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] - Attributes: - RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] - Attributes: - RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] - Attributes: - RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] - Attributes: - RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] - Attributes: - RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] - Attributes: - RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] - Attributes: - RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] - Attributes: - RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] - Attributes: - RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] - Attributes: - RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] - Attributes: - RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] - Attributes: - RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] - Attributes: - RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] - Attributes: - RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] - Attributes: - RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] - Attributes: - RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] - Attributes: - RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] - Attributes: - RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] - Attributes: - RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] - Attributes: - RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] - Attributes: - RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] - Attributes: - RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] - Attributes: - RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] - Attributes: - RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] - Attributes: - RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] - Attributes: - RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] - Attributes: - RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] - Attributes: - RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] - Attributes: - RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] - Attributes: - RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] - Attributes: - RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] - Attributes: - RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] - Attributes: - RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] - Attributes: - RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] - Attributes: - RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] - Attributes: - RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000021C9, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] - Attributes: - RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] - Attributes: - RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x0000221D, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] - Attributes: - RATE - Addr: 0x00002221, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00002247, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] - Attributes: - RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] - Attributes: - RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] - Attributes: - RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] - Attributes: - RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] - Attributes: - RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] - Attributes: - RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] - Attributes: - RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] - Attributes: - RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] - Attributes: - RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] - Attributes: - RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] - Attributes: - RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] - Attributes: - RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] - Attributes: - RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] - Attributes: - RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] - Attributes: - RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] - Attributes: - RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] - Attributes: - RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] - Attributes: - RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] - Attributes: - RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] - Attributes: - RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] - Attributes: - RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] - Attributes: - RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] - Attributes: - RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] - Attributes: - RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] - Attributes: - RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] - Attributes: - RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] - Attributes: - RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] - Attributes: - RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] - Attributes: - RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] - Attributes: - RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] - Attributes: - RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] - Attributes: - RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] - Attributes: - RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] - Attributes: - RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] - Attributes: - RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] - Attributes: - RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] - Attributes: - RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] - Attributes: - RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_delay/io_config.json b/icb_bitstream/golden/io_delay/io_config.json new file mode 100644 index 00000000..6fe4b6fa --- /dev/null +++ b/icb_bitstream/golden/io_delay/io_config.json @@ -0,0 +1,930 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\delay_adj (index=0, width=1, offset=0)", + " Detect input port \\delay_incdec (index=0, width=1, offset=0)", + " Detect input port \\delay_load (index=0, width=1, offset=0)", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Detect output port \\i_delay_value (index=0, width=6, offset=0)", + " Detect output port \\i_delay_value (index=1, width=6, offset=0)", + " Detect output port \\i_delay_value (index=2, width=6, offset=0)", + " Detect output port \\i_delay_value (index=3, width=6, offset=0)", + " Detect output port \\i_delay_value (index=4, width=6, offset=0)", + " Detect output port \\i_delay_value (index=5, width=6, offset=0)", + " Detect output port \\o_delay_value (index=0, width=6, offset=0)", + " Detect output port \\o_delay_value (index=1, width=6, offset=0)", + " Detect output port \\o_delay_value (index=2, width=6, offset=0)", + " Detect output port \\o_delay_value (index=3, width=6, offset=0)", + " Detect output port \\o_delay_value (index=4, width=6, offset=0)", + " Detect output port \\o_delay_value (index=5, width=6, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_adj", + " Cell port \\I is connected to input port \\delay_adj", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_incdec", + " Cell port \\I is connected to input port \\delay_incdec", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_load", + " Cell port \\I is connected to input port \\delay_load", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_dout", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value", + " Cell port \\O is connected to output port \\i_delay_value[0]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_1", + " Cell port \\O is connected to output port \\i_delay_value[1]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_2", + " Cell port \\O is connected to output port \\i_delay_value[2]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_3", + " Cell port \\O is connected to output port \\i_delay_value[3]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_4", + " Cell port \\O is connected to output port \\i_delay_value[4]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_5", + " Cell port \\O is connected to output port \\i_delay_value[5]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value", + " Cell port \\O is connected to output port \\o_delay_value[0]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_1", + " Cell port \\O is connected to output port \\o_delay_value[1]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_2", + " Cell port \\O is connected to output port \\o_delay_value[2]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_3", + " Cell port \\O is connected to output port \\o_delay_value[3]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_4", + " Cell port \\O is connected to output port \\o_delay_value[4]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_5", + " Cell port \\O is connected to output port \\o_delay_value[5]", + " Data Width: -2", + " Get important connection of cell \\I_BUF \\clk_i_buf", + " Cell port \\I is connected to input port \\clk", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i -> \\clk_buf", + " Connected \\clk_buf", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Try \\I_BUF $ibuf$top.$ibuf_din out connection: $ibuf_din -> \\i_delay", + " Connected \\i_delay", + " Parameter \\DELAY: 50", + " Data Width: -2", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Try \\O_BUFT $obuf$top.$obuf_dout out connection: $obuf_dout -> \\o_delay", + " Connected \\o_delay", + " Parameter \\DELAY: 60", + " Data Width: -2", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " \\I_DELAY \\i_delay port \\CLK_IN: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " \\O_DELAY \\o_delay port \\CLK_IN: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF \\clk_buf: clock port \\O, net \\clk_clk_buf", + " Connected to cell \\I_DELAY \\i_delay", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Connected to cell \\O_DELAY \\o_delay", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Use slot 0", + " Double check Core/Fabric Clock", + " \\I_DELAY \\i_delay port \\CLK_IN", + " Good. Found clocking", + " \\O_DELAY \\o_delay port \\CLK_IN", + " Good. Found clocking", + " Summary", + " |-------------------------------------------------------------------------------------|", + " | ***************************************************** |", + " IN | delay_adj * I_BUF * |", + " IN | delay_incdec * I_BUF * |", + " IN | delay_load * I_BUF * |", + " IN | din * I_BUF |-> I_DELAY * |", + " OUT | * O_DELAY |-> O_BUFT * dout |", + " OUT | * O_BUFT * i_delay_value[0] |", + " OUT | * O_BUFT * i_delay_value[1] |", + " OUT | * O_BUFT * i_delay_value[2] |", + " OUT | * O_BUFT * i_delay_value[3] |", + " OUT | * O_BUFT * i_delay_value[4] |", + " OUT | * O_BUFT * i_delay_value[5] |", + " OUT | * O_BUFT * o_delay_value[0] |", + " OUT | * O_BUFT * o_delay_value[1] |", + " OUT | * O_BUFT * o_delay_value[2] |", + " OUT | * O_BUFT * o_delay_value[3] |", + " OUT | * O_BUFT * o_delay_value[4] |", + " OUT | * O_BUFT * o_delay_value[5] |", + " IN | clk * I_BUF |-> CLK_BUF * |", + " | ***************************************************** |", + " |-------------------------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Assign location HR_1_0_0P (and properties) to Port delay_load", + " Assign location HR_1_1_0N (and properties) to Port delay_adj", + " Assign location HR_1_3_1N (and properties) to Port delay_incdec", + " Assign location HR_5_0_0P (and properties) to Port i_delay_value[0]", + " Assign location HR_5_1_0N (and properties) to Port i_delay_value[1]", + " Assign location HR_5_2_1P (and properties) to Port i_delay_value[2]", + " Assign location HR_5_3_1N (and properties) to Port i_delay_value[3]", + " Assign location HR_5_4_2P (and properties) to Port i_delay_value[4]", + " Assign location HR_5_5_2N (and properties) to Port i_delay_value[5]", + " Assign location HR_5_6_3P (and properties) to Port o_delay_value[0]", + " Assign location HR_5_7_3N (and properties) to Port o_delay_value[1]", + " Assign location HR_5_8_4P (and properties) to Port o_delay_value[2]", + " Assign location HR_5_9_4N (and properties) to Port o_delay_value[3]", + " Assign location HR_5_CC_18_9P (and properties) to Port o_delay_value[4]", + " Assign location HR_5_CC_19_9N (and properties) to Port o_delay_value[5]", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=delay_adj, location: HR_1_1_0N", + " Data signal from object delay_adj", + " Module=I_BUF Linked-object=delay_adj Port=O Net=$ibuf_delay_adj - Found", + " Pin object=delay_incdec, location: HR_1_3_1N", + " Data signal from object delay_incdec", + " Module=I_BUF Linked-object=delay_incdec Port=O Net=$ibuf_delay_incdec - Found", + " Pin object=delay_load, location: HR_1_0_0P", + " Data signal from object delay_load", + " Module=I_BUF Linked-object=delay_load Port=O Net=$ibuf_delay_load - Found", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_DELAY Linked-object=din Port=O Net=o_delay_i - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_DELAY Linked-object=dout Port=I Net=$auto_431 - Found", + " Pin object=i_delay_value[0], location: HR_5_0_0P", + " Data signal from object i_delay_value[0]", + " Module=O_BUFT Linked-object=i_delay_value[0] Port=I Net=$obuf_i_delay_value[0] - Found", + " Pin object=i_delay_value[1], location: HR_5_1_0N", + " Data signal from object i_delay_value[1]", + " Module=O_BUFT Linked-object=i_delay_value[1] Port=I Net=$obuf_i_delay_value[1] - Found", + " Pin object=i_delay_value[2], location: HR_5_2_1P", + " Data signal from object i_delay_value[2]", + " Module=O_BUFT Linked-object=i_delay_value[2] Port=I Net=$obuf_i_delay_value[2] - Found", + " Pin object=i_delay_value[3], location: HR_5_3_1N", + " Data signal from object i_delay_value[3]", + " Module=O_BUFT Linked-object=i_delay_value[3] Port=I Net=$obuf_i_delay_value[3] - Found", + " Pin object=i_delay_value[4], location: HR_5_4_2P", + " Data signal from object i_delay_value[4]", + " Module=O_BUFT Linked-object=i_delay_value[4] Port=I Net=$obuf_i_delay_value[4] - Found", + " Pin object=i_delay_value[5], location: HR_5_5_2N", + " Data signal from object i_delay_value[5]", + " Module=O_BUFT Linked-object=i_delay_value[5] Port=I Net=$obuf_i_delay_value[5] - Found", + " Pin object=o_delay_value[0], location: HR_5_6_3P", + " Data signal from object o_delay_value[0]", + " Module=O_BUFT Linked-object=o_delay_value[0] Port=I Net=$obuf_o_delay_value[0] - Found", + " Pin object=o_delay_value[1], location: HR_5_7_3N", + " Data signal from object o_delay_value[1]", + " Module=O_BUFT Linked-object=o_delay_value[1] Port=I Net=$obuf_o_delay_value[1] - Found", + " Pin object=o_delay_value[2], location: HR_5_8_4P", + " Data signal from object o_delay_value[2]", + " Module=O_BUFT Linked-object=o_delay_value[2] Port=I Net=$obuf_o_delay_value[2] - Found", + " Pin object=o_delay_value[3], location: HR_5_9_4N", + " Data signal from object o_delay_value[3]", + " Module=O_BUFT Linked-object=o_delay_value[3] Port=I Net=$obuf_o_delay_value[3] - Found", + " Pin object=o_delay_value[4], location: HR_5_CC_18_9P", + " Data signal from object o_delay_value[4]", + " Module=O_BUFT Linked-object=o_delay_value[4] Port=I Net=$obuf_o_delay_value[4] - Found", + " Pin object=o_delay_value[5], location: HR_5_CC_19_9N", + " Data signal from object o_delay_value[5]", + " Module=O_BUFT Linked-object=o_delay_value[5] Port=I Net=$obuf_o_delay_value[5] - Found", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Module=I_BUF Linked-object=clk Port=O Net=$auto_434.clk_buf_i - Not found", + " Fail reason: Clock data from object clk port O is not routed to fabric", + " Determine internal control signals", + " Module=I_BUF LinkedObject=delay_adj Location=HR_1_1_0N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=delay_incdec Location=HR_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=delay_load Location=HR_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_ADJ Signal=in:rule=half-first:f2g_trx_dly_adj", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_INCDEC Signal=in:rule=half-first:f2g_trx_dly_inc", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_LOAD Signal=in:rule=half-first:f2g_trx_dly_ld", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_TAP_VALUE Signal=out:rule=half-first:g2f_trx_dly_tap", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_ADJ Signal=in:rule=half-first:f2g_trx_dly_adj", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_adj had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_INCDEC Signal=in:rule=half-first:f2g_trx_dly_inc", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_inc had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_LOAD Signal=in:rule=half-first:f2g_trx_dly_ld", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_ld had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_TAP_VALUE Signal=out:rule=half-first:g2f_trx_dly_tap", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[0] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[1] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[2] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[3] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[4] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[5] had already been used", + " Module=O_BUFT LinkedObject=i_delay_value[0] Location=HR_5_0_0P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[1] Location=HR_5_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[2] Location=HR_5_2_1P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[3] Location=HR_5_3_1N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[4] Location=HR_5_4_2P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[5] Location=HR_5_5_2N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[0] Location=HR_5_6_3P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[1] Location=HR_5_7_3N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[2] Location=HR_5_8_4P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[3] Location=HR_5_9_4N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[4] Location=HR_5_CC_18_9P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[5] Location=HR_5_CC_19_9N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_adj", + "location_object" : "delay_adj", + "location" : "HR_1_1_0N", + "linked_object" : "delay_adj", + "linked_objects" : { + "delay_adj" : { + "location" : "HR_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_adj", + "O" : "$ibuf_delay_adj" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_incdec", + "location_object" : "delay_incdec", + "location" : "HR_1_3_1N", + "linked_object" : "delay_incdec", + "linked_objects" : { + "delay_incdec" : { + "location" : "HR_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_incdec", + "O" : "$ibuf_delay_incdec" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_load", + "location_object" : "delay_load", + "location" : "HR_1_0_0P", + "linked_object" : "delay_load", + "linked_objects" : { + "delay_load" : { + "location" : "HR_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_load", + "O" : "$ibuf_delay_load" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DELAY" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_DELAY", + "name" : "i_delay", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "CLK_IN" : "clk_clk_buf", + "I" : "$ibuf_din", + "O" : "o_delay_i" + }, + "parameters" : { + "DELAY" : "50" + }, + "flags" : [ + "I_DELAY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_dout", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DELAY" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_DELAY", + "name" : "o_delay", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "CLK_IN" : "clk_clk_buf", + "I" : "o_delay_i", + "O" : "$obuf_dout" + }, + "parameters" : { + "DELAY" : "60" + }, + "flags" : [ + "O_DELAY" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value", + "location_object" : "i_delay_value[0]", + "location" : "HR_5_0_0P", + "linked_object" : "i_delay_value[0]", + "linked_objects" : { + "i_delay_value[0]" : { + "location" : "HR_5_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[0]", + "O" : "i_delay_value[0]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_1", + "location_object" : "i_delay_value[1]", + "location" : "HR_5_1_0N", + "linked_object" : "i_delay_value[1]", + "linked_objects" : { + "i_delay_value[1]" : { + "location" : "HR_5_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[1]", + "O" : "i_delay_value[1]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_2", + "location_object" : "i_delay_value[2]", + "location" : "HR_5_2_1P", + "linked_object" : "i_delay_value[2]", + "linked_objects" : { + "i_delay_value[2]" : { + "location" : "HR_5_2_1P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[2]", + "O" : "i_delay_value[2]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_3", + "location_object" : "i_delay_value[3]", + "location" : "HR_5_3_1N", + "linked_object" : "i_delay_value[3]", + "linked_objects" : { + "i_delay_value[3]" : { + "location" : "HR_5_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[3]", + "O" : "i_delay_value[3]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_4", + "location_object" : "i_delay_value[4]", + "location" : "HR_5_4_2P", + "linked_object" : "i_delay_value[4]", + "linked_objects" : { + "i_delay_value[4]" : { + "location" : "HR_5_4_2P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[4]", + "O" : "i_delay_value[4]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_5", + "location_object" : "i_delay_value[5]", + "location" : "HR_5_5_2N", + "linked_object" : "i_delay_value[5]", + "linked_objects" : { + "i_delay_value[5]" : { + "location" : "HR_5_5_2N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[5]", + "O" : "i_delay_value[5]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value", + "location_object" : "o_delay_value[0]", + "location" : "HR_5_6_3P", + "linked_object" : "o_delay_value[0]", + "linked_objects" : { + "o_delay_value[0]" : { + "location" : "HR_5_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[0]", + "O" : "o_delay_value[0]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_1", + "location_object" : "o_delay_value[1]", + "location" : "HR_5_7_3N", + "linked_object" : "o_delay_value[1]", + "linked_objects" : { + "o_delay_value[1]" : { + "location" : "HR_5_7_3N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[1]", + "O" : "o_delay_value[1]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_2", + "location_object" : "o_delay_value[2]", + "location" : "HR_5_8_4P", + "linked_object" : "o_delay_value[2]", + "linked_objects" : { + "o_delay_value[2]" : { + "location" : "HR_5_8_4P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[2]", + "O" : "o_delay_value[2]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_3", + "location_object" : "o_delay_value[3]", + "location" : "HR_5_9_4N", + "linked_object" : "o_delay_value[3]", + "linked_objects" : { + "o_delay_value[3]" : { + "location" : "HR_5_9_4N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[3]", + "O" : "o_delay_value[3]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_4", + "location_object" : "o_delay_value[4]", + "location" : "HR_5_CC_18_9P", + "linked_object" : "o_delay_value[4]", + "linked_objects" : { + "o_delay_value[4]" : { + "location" : "HR_5_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[4]", + "O" : "o_delay_value[4]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_5", + "location_object" : "o_delay_value[5]", + "location" : "HR_5_CC_19_9N", + "linked_object" : "o_delay_value[5]", + "linked_objects" : { + "o_delay_value[5]" : { + "location" : "HR_5_CC_19_9N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[5]", + "O" : "o_delay_value[5]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "clk_buf_i" + }, + "parameters" : { + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "I" : "clk_buf_i", + "O" : "clk_clk_buf" + }, + "parameters" : { + "ROUTE_TO_FABRIC_CLK" : "0" + }, + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_delay", + "o_delay" + ] + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/io_delay/model_config.ppdb.json b/icb_bitstream/golden/io_delay/model_config.ppdb.json index fb992a91..adfb758d 100644 --- a/icb_bitstream/golden/io_delay/model_config.ppdb.json +++ b/icb_bitstream/golden/io_delay/model_config.ppdb.json @@ -1,8 +1,180 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_delay/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_delay/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF clk_buf (location:HP_1_CC_18_9P)", + " Route to gearbox module i_delay (location:HP_1_0_0P)", + " Use FCLK: hp_fclk_0_A", + " Route to gearbox module o_delay (location:HP_1_1_0N)", + " Use FCLK: hp_fclk_0_A", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + " CLK_BUF clk_buf", + " Resource: u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 (Bank A)(CORE)", + "Set CLKBUF remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " CLKBUF clk_buf (location:HP_1_CC_18_9P) use hp_fclk_0_A", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_delay_adj)", + " Object: delay_adj", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_delay_incdec)", + " Object: delay_incdec", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_delay_load)", + " Object: delay_load", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_DELAY (i_delay)", + " Object: din", + " Parameter", + " Rule I_DELAY", + " Match", + " Property", + " Module: O_BUFT ($obuf$top.$obuf_dout)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_DELAY (o_delay)", + " Object: dout", + " Parameter", + " Rule O_DELAY", + " Match", + " Property", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value)", + " Object: i_delay_value[0]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_1)", + " Object: i_delay_value[1]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_2)", + " Object: i_delay_value[2]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_3)", + " Object: i_delay_value[3]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_4)", + " Object: i_delay_value[4]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_5)", + " Object: i_delay_value[5]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value)", + " Object: o_delay_value[0]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_1)", + " Object: o_delay_value[1]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_2)", + " Object: o_delay_value[2]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_3)", + " Object: o_delay_value[3]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_4)", + " Object: o_delay_value[4]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_5)", + " Object: o_delay_value[5]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: I_BUF (clk_i_buf)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Mismatch", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF (clk_buf)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Match", + " Rule CLK_BUF.ROOT_MUX", + " Match" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_adj", + "name" : "$ibuf$top.$ibuf_delay_adj", + "location_object" : "delay_adj", + "location" : "HR_1_1_0N", "linked_object" : "delay_adj", "linked_objects" : { "delay_adj" : { @@ -21,17 +193,31 @@ }, "connectivity" : { "I" : "delay_adj", - "O" : "$iopadmap$delay_adj" + "O" : "$ibuf_delay_adj" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_incdec", + "name" : "$ibuf$top.$ibuf_delay_incdec", + "location_object" : "delay_incdec", + "location" : "HR_1_3_1N", "linked_object" : "delay_incdec", "linked_objects" : { "delay_incdec" : { @@ -50,17 +236,31 @@ }, "connectivity" : { "I" : "delay_incdec", - "O" : "$iopadmap$delay_incdec" + "O" : "$ibuf_delay_incdec" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_load", + "name" : "$ibuf$top.$ibuf_delay_load", + "location_object" : "delay_load", + "location" : "HR_1_0_0P", "linked_object" : "delay_load", "linked_objects" : { "delay_load" : { @@ -79,17 +279,31 @@ }, "connectivity" : { "I" : "delay_load", - "O" : "$iopadmap$delay_load" + "O" : "$ibuf_delay_load" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -108,17 +322,32 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DELAY" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_DELAY", "name" : "i_delay", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -134,18 +363,32 @@ }, "connectivity" : { "CLK_IN" : "clk_clk_buf", - "I" : "$iopadmap$din", + "I" : "$ibuf_din", "O" : "o_delay_i" }, "parameters" : { "DELAY" : "50" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "I_DELAY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -154,23 +397,38 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$dout", + "I" : "$obuf_dout", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DELAY" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "O_DELAY", "name" : "o_delay", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -187,17 +445,31 @@ "connectivity" : { "CLK_IN" : "clk_clk_buf", "I" : "o_delay_i", - "O" : "$iopadmap$dout" + "O" : "$obuf_dout" }, "parameters" : { "DELAY" : "60" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "O_DELAY" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value", + "location_object" : "i_delay_value[0]", + "location" : "HR_5_0_0P", "linked_object" : "i_delay_value[0]", "linked_objects" : { "i_delay_value[0]" : { @@ -206,23 +478,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[0]", + "I" : "$obuf_i_delay_value[0]", "O" : "i_delay_value[0]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_1", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_1", + "location_object" : "i_delay_value[1]", + "location" : "HR_5_1_0N", "linked_object" : "i_delay_value[1]", "linked_objects" : { "i_delay_value[1]" : { @@ -231,23 +517,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[1]", + "I" : "$obuf_i_delay_value[1]", "O" : "i_delay_value[1]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_2", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_2", + "location_object" : "i_delay_value[2]", + "location" : "HR_5_2_1P", "linked_object" : "i_delay_value[2]", "linked_objects" : { "i_delay_value[2]" : { @@ -256,23 +556,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[2]", + "I" : "$obuf_i_delay_value[2]", "O" : "i_delay_value[2]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_3", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_3", + "location_object" : "i_delay_value[3]", + "location" : "HR_5_3_1N", "linked_object" : "i_delay_value[3]", "linked_objects" : { "i_delay_value[3]" : { @@ -281,23 +595,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[3]", + "I" : "$obuf_i_delay_value[3]", "O" : "i_delay_value[3]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_4", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_4", + "location_object" : "i_delay_value[4]", + "location" : "HR_5_4_2P", "linked_object" : "i_delay_value[4]", "linked_objects" : { "i_delay_value[4]" : { @@ -306,23 +634,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[4]", + "I" : "$obuf_i_delay_value[4]", "O" : "i_delay_value[4]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_5", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_5", + "location_object" : "i_delay_value[5]", + "location" : "HR_5_5_2N", "linked_object" : "i_delay_value[5]", "linked_objects" : { "i_delay_value[5]" : { @@ -331,23 +673,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[5]", + "I" : "$obuf_i_delay_value[5]", "O" : "i_delay_value[5]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value", + "location_object" : "o_delay_value[0]", + "location" : "HR_5_6_3P", "linked_object" : "o_delay_value[0]", "linked_objects" : { "o_delay_value[0]" : { @@ -356,23 +712,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[0]", + "I" : "$obuf_o_delay_value[0]", "O" : "o_delay_value[0]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_1", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_1", + "location_object" : "o_delay_value[1]", + "location" : "HR_5_7_3N", "linked_object" : "o_delay_value[1]", "linked_objects" : { "o_delay_value[1]" : { @@ -381,23 +751,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[1]", + "I" : "$obuf_o_delay_value[1]", "O" : "o_delay_value[1]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_2", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_2", + "location_object" : "o_delay_value[2]", + "location" : "HR_5_8_4P", "linked_object" : "o_delay_value[2]", "linked_objects" : { "o_delay_value[2]" : { @@ -406,23 +790,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[2]", + "I" : "$obuf_o_delay_value[2]", "O" : "o_delay_value[2]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_3", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_3", + "location_object" : "o_delay_value[3]", + "location" : "HR_5_9_4N", "linked_object" : "o_delay_value[3]", "linked_objects" : { "o_delay_value[3]" : { @@ -431,77 +829,119 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[3]", + "I" : "$obuf_o_delay_value[3]", "O" : "o_delay_value[3]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_4", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_4", + "location_object" : "o_delay_value[4]", + "location" : "HR_5_CC_18_9P", "linked_object" : "o_delay_value[4]", "linked_objects" : { "o_delay_value[4]" : { - "location" : "HR_5_CC_10_5P", + "location" : "HR_5_CC_18_9P", "properties" : { }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[4]", + "I" : "$obuf_o_delay_value[4]", "O" : "o_delay_value[4]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_5", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_5", + "location_object" : "o_delay_value[5]", + "location" : "HR_5_CC_19_9N", "linked_object" : "o_delay_value[5]", "linked_objects" : { "o_delay_value[5]" : { - "location" : "HR_5_CC_11_5N", + "location" : "HR_5_CC_19_9N", "properties" : { }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[5]", + "I" : "$obuf_o_delay_value[5]", "O" : "o_delay_value[5]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -520,20 +960,58 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rx_fclkio_sel_A_0" : "0" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rxclk_phase_sel_A_0" : "1" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_vco_clk_sel_A_0" : "0" + }, + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + }, + { + "CLK_BUF" : "ROOT_BANK_SRC==A --#MUX=18", + "__location__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0" + }, + { + "ROOT_MUX_SEL" : "0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, @@ -544,8 +1022,32 @@ "parameters" : { "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_delay", + "o_delay" + ] + }, + "route_clock_result" : { + "O" : [ + "Use FCLK: hp_fclk_0_A", + "Use FCLK: hp_fclk_0_A" + ] + }, + "errors" : [ + ], + "__AB__" : "A", + "__ROOT_BANK_MUX_LOCATION__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0", + "__ROOT_BANK_MUX__" : "18", + "__ROOT_MUX__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" } ] } diff --git a/icb_bitstream/golden/io_delay_io_ddr/config.json b/icb_bitstream/golden/io_delay_io_ddr/config.json deleted file mode 100644 index 868af011..00000000 --- a/icb_bitstream/golden/io_delay_io_ddr/config.json +++ /dev/null @@ -1,731 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\delay_adj (index=0, width=1, offset=0)", - " Detect input port \\delay_incdec (index=0, width=1, offset=0)", - " Detect input port \\delay_load (index=0, width=1, offset=0)", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Detect input port \\enable (index=0, width=1, offset=0)", - " Detect output port \\i_delay_value (index=0, width=6, offset=0)", - " Detect output port \\i_delay_value (index=1, width=6, offset=0)", - " Detect output port \\i_delay_value (index=2, width=6, offset=0)", - " Detect output port \\i_delay_value (index=3, width=6, offset=0)", - " Detect output port \\i_delay_value (index=4, width=6, offset=0)", - " Detect output port \\i_delay_value (index=5, width=6, offset=0)", - " Detect output port \\o_delay_value (index=0, width=6, offset=0)", - " Detect output port \\o_delay_value (index=1, width=6, offset=0)", - " Detect output port \\o_delay_value (index=2, width=6, offset=0)", - " Detect output port \\o_delay_value (index=3, width=6, offset=0)", - " Detect output port \\o_delay_value (index=4, width=6, offset=0)", - " Detect output port \\o_delay_value (index=5, width=6, offset=0)", - " Detect input port \\reset (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_adj", - " Cell port \\I is connected to input port \\delay_adj", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_incdec", - " Cell port \\I is connected to input port \\delay_incdec", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.delay_load", - " Cell port \\I is connected to input port \\delay_load", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.dout", - " Cell port \\O is connected to output port \\dout", - " Get important connection of cell \\I_BUF $iopadmap$top.enable", - " Cell port \\I is connected to input port \\enable", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value", - " Cell port \\O is connected to output port \\i_delay_value[0]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_1", - " Cell port \\O is connected to output port \\i_delay_value[1]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_2", - " Cell port \\O is connected to output port \\i_delay_value[2]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_3", - " Cell port \\O is connected to output port \\i_delay_value[3]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_4", - " Cell port \\O is connected to output port \\i_delay_value[4]", - " Get important connection of cell \\O_BUF $iopadmap$top.i_delay_value_5", - " Cell port \\O is connected to output port \\i_delay_value[5]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value", - " Cell port \\O is connected to output port \\o_delay_value[0]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_1", - " Cell port \\O is connected to output port \\o_delay_value[1]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_2", - " Cell port \\O is connected to output port \\o_delay_value[2]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_3", - " Cell port \\O is connected to output port \\o_delay_value[3]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_4", - " Cell port \\O is connected to output port \\o_delay_value[4]", - " Get important connection of cell \\O_BUF $iopadmap$top.o_delay_value_5", - " Cell port \\O is connected to output port \\o_delay_value[5]", - " Get important connection of cell \\I_BUF $iopadmap$top.reset", - " Cell port \\I is connected to input port \\reset", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF \\clk_i_buf", - " Cell port \\I is connected to input port \\clk", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i", - " Connected \\clk_buf", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Try \\I_BUF $iopadmap$top.din out connection: $iopadmap$din", - " Connected \\i_delay", - " Parameter \\DELAY: 50", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Try \\I_DELAY \\i_delay out connection: \\i_ddr_d", - " Connected \\i_ddr", - " Trace \\O_BUF --> \\O_DELAY", - " Try \\O_BUF $iopadmap$top.dout out connection: $iopadmap$dout", - " Connected \\o_delay", - " Parameter \\DELAY: 60", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Try \\O_DELAY \\o_delay out connection: \\o_delay_i", - " Connected \\o_ddr", - " Trace gearbox clock source", - " \\I_DELAY \\i_delay port \\CLK_IN: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\O_DELAY \\o_delay port \\CLK_IN: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " \\O_DDR \\o_ddr port \\C: \\clk_clk_buf", - " Connected to \\CLK_BUF \\clk_buf port \\O", - " Assign location HR_5_1_0N (and properties) to Port i_delay_value[1]", - " Assign location HR_1_3_1N (and properties) to Port delay_incdec", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HR_1_1_0N (and properties) to Port delay_adj", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HR_5_5_2N (and properties) to Port i_delay_value[5]", - " Assign location HR_5_9_4N (and properties) to Port o_delay_value[3]", - " Assign location HR_5_8_4P (and properties) to Port o_delay_value[2]", - " Assign location HP_1_3_1N (and properties) to Port enable", - " Assign location HR_5_2_1P (and properties) to Port i_delay_value[2]", - " Assign location HR_5_4_2P (and properties) to Port i_delay_value[4]", - " Assign location HR_5_7_3N (and properties) to Port o_delay_value[1]", - " Assign location HR_5_6_3P (and properties) to Port o_delay_value[0]", - " Assign location HR_5_0_0P (and properties) to Port i_delay_value[0]", - " Assign location HR_5_CC_11_5N (and properties) to Port o_delay_value[5]", - " Assign location HP_1_1_0N (and properties) to Port dout", - " Assign location HP_1_2_1P (and properties) to Port reset", - " Assign location HR_5_3_1N (and properties) to Port i_delay_value[3]", - " Assign location HR_5_CC_10_5P (and properties) to Port o_delay_value[4]", - " Assign location HR_1_0_0P (and properties) to Port delay_load", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_adj", - "linked_object" : "delay_adj", - "linked_objects" : { - "delay_adj" : { - "location" : "HR_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_adj", - "O" : "$iopadmap$delay_adj" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_incdec", - "linked_object" : "delay_incdec", - "linked_objects" : { - "delay_incdec" : { - "location" : "HR_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_incdec", - "O" : "$iopadmap$delay_incdec" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.delay_load", - "linked_object" : "delay_load", - "linked_objects" : { - "delay_load" : { - "location" : "HR_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "delay_load", - "O" : "$iopadmap$delay_load" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - "I_DELAY" - ], - "route_clock_to" : { - } - }, - { - "module" : "I_DELAY", - "name" : "i_delay", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "CLK_IN" : "clk_clk_buf", - "I" : "$iopadmap$din", - "O" : "i_ddr_d" - }, - "parameters" : { - "DELAY" : "50" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - "I_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "I_DDR", - "name" : "i_ddr", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "D" : "i_ddr_d" - }, - "parameters" : { - }, - "pre_primitive" : "I_DELAY", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$dout", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "O_DELAY" - ], - "route_clock_to" : { - } - }, - { - "module" : "O_DELAY", - "name" : "o_delay", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "CLK_IN" : "clk_clk_buf", - "I" : "o_delay_i", - "O" : "$iopadmap$dout" - }, - "parameters" : { - "DELAY" : "60" - }, - "pre_primitive" : "O_BUF", - "post_primitives" : [ - "O_DDR" - ], - "route_clock_to" : { - } - }, - { - "module" : "O_DDR", - "name" : "o_ddr", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "C" : "clk_clk_buf", - "Q" : "o_delay_i" - }, - "parameters" : { - }, - "pre_primitive" : "O_DELAY", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value", - "linked_object" : "i_delay_value[0]", - "linked_objects" : { - "i_delay_value[0]" : { - "location" : "HR_5_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[0]", - "O" : "i_delay_value[0]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_1", - "linked_object" : "i_delay_value[1]", - "linked_objects" : { - "i_delay_value[1]" : { - "location" : "HR_5_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[1]", - "O" : "i_delay_value[1]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_2", - "linked_object" : "i_delay_value[2]", - "linked_objects" : { - "i_delay_value[2]" : { - "location" : "HR_5_2_1P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[2]", - "O" : "i_delay_value[2]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_3", - "linked_object" : "i_delay_value[3]", - "linked_objects" : { - "i_delay_value[3]" : { - "location" : "HR_5_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[3]", - "O" : "i_delay_value[3]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_4", - "linked_object" : "i_delay_value[4]", - "linked_objects" : { - "i_delay_value[4]" : { - "location" : "HR_5_4_2P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[4]", - "O" : "i_delay_value[4]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_5", - "linked_object" : "i_delay_value[5]", - "linked_objects" : { - "i_delay_value[5]" : { - "location" : "HR_5_5_2N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$i_delay_value[5]", - "O" : "i_delay_value[5]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value", - "linked_object" : "o_delay_value[0]", - "linked_objects" : { - "o_delay_value[0]" : { - "location" : "HR_5_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[0]", - "O" : "o_delay_value[0]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_1", - "linked_object" : "o_delay_value[1]", - "linked_objects" : { - "o_delay_value[1]" : { - "location" : "HR_5_7_3N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[1]", - "O" : "o_delay_value[1]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_2", - "linked_object" : "o_delay_value[2]", - "linked_objects" : { - "o_delay_value[2]" : { - "location" : "HR_5_8_4P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[2]", - "O" : "o_delay_value[2]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_3", - "linked_object" : "o_delay_value[3]", - "linked_objects" : { - "o_delay_value[3]" : { - "location" : "HR_5_9_4N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[3]", - "O" : "o_delay_value[3]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_4", - "linked_object" : "o_delay_value[4]", - "linked_objects" : { - "o_delay_value[4]" : { - "location" : "HR_5_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[4]", - "O" : "o_delay_value[4]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_5", - "linked_object" : "o_delay_value[5]", - "linked_objects" : { - "o_delay_value[5]" : { - "location" : "HR_5_CC_11_5N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$o_delay_value[5]", - "O" : "o_delay_value[5]" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.reset", - "linked_object" : "reset", - "linked_objects" : { - "reset" : { - "location" : "HP_1_2_1P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "reset", - "O" : "$iopadmap$reset" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "clk_i_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "clk_buf_i" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "clk_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "clk_buf_i", - "O" : "clk_clk_buf" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - "O" : [ - "i_delay", - "i_ddr", - "o_delay", - "o_ddr" - ] - } - } - ] -} diff --git a/icb_bitstream/golden/io_delay_io_ddr/design_edit.sdc b/icb_bitstream/golden/io_delay_io_ddr/design_edit.sdc new file mode 100644 index 00000000..d2c707f8 --- /dev/null +++ b/icb_bitstream/golden/io_delay_io_ddr/design_edit.sdc @@ -0,0 +1,402 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock is only used by gearbox, does not need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: CLK_BUF clk_buf) + +############# +# +# Each pin mode and location assignment +# +############# +# Pin delay_adj :: I_BUF +# set_mode MODE_BP_DIR_B_RX HR_1_1_0N +# set_io delay_adj HR_1_1_0N --> (original) +set_io $ibuf_delay_adj HR_1_0_0P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin delay_incdec :: I_BUF +# set_mode MODE_BP_DIR_B_RX HR_1_3_1N +# set_io delay_incdec HR_1_3_1N --> (original) +set_io $ibuf_delay_incdec HR_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin delay_load :: I_BUF +# set_mode MODE_BP_DIR_A_RX HR_1_0_0P +# set_io delay_load HR_1_0_0P --> (original) +set_io $ibuf_delay_load HR_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin din :: I_BUF |-> I_DELAY |-> I_DDR +# set_mode MODE_BP_DDR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io o_ddr_d HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[0]_A +set_io $delete_wire$416 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_rx_in[1]_A + +# Pin enable :: I_BUF +# set_mode MODE_BP_DIR_B_RX HP_1_3_1N +# set_io enable HP_1_3_1N --> (original) +set_io $ibuf_enable HP_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin reset :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_2_1P +# set_io reset HP_1_2_1P --> (original) +set_io $ibuf_reset HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin dout :: O_DDR |-> O_DELAY |-> O_BUFT +# set_mode MODE_BP_DDR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $auto_437 HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_out[5]_A +# set_io __const_bit_0__ HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_out[6]_A + +# Pin i_delay_value[0] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_0_0P +# set_io i_delay_value[0] HR_5_0_0P --> (original) +set_io $obuf_i_delay_value[0] HR_5_0_0P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[1] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_1_0N +# set_io i_delay_value[1] HR_5_1_0N --> (original) +set_io $obuf_i_delay_value[1] HR_5_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin i_delay_value[2] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_2_1P +# set_io i_delay_value[2] HR_5_2_1P --> (original) +set_io $obuf_i_delay_value[2] HR_5_2_1P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[3] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_3_1N +# set_io i_delay_value[3] HR_5_3_1N --> (original) +set_io $obuf_i_delay_value[3] HR_5_2_1P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin i_delay_value[4] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_4_2P +# set_io i_delay_value[4] HR_5_4_2P --> (original) +set_io $obuf_i_delay_value[4] HR_5_4_2P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin i_delay_value[5] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_5_2N +# set_io i_delay_value[5] HR_5_5_2N --> (original) +set_io $obuf_i_delay_value[5] HR_5_4_2P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[0] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_6_3P +# set_io o_delay_value[0] HR_5_6_3P --> (original) +set_io $obuf_o_delay_value[0] HR_5_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[1] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_7_3N +# set_io o_delay_value[1] HR_5_7_3N --> (original) +set_io $obuf_o_delay_value[1] HR_5_6_3P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[2] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_8_4P +# set_io o_delay_value[2] HR_5_8_4P --> (original) +set_io $obuf_o_delay_value[2] HR_5_8_4P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[3] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_9_4N +# set_io o_delay_value[3] HR_5_9_4N --> (original) +set_io $obuf_o_delay_value[3] HR_5_8_4P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Pin o_delay_value[4] :: O_BUFT +# set_mode MODE_BP_DIR_A_TX HR_5_CC_18_9P +# set_io o_delay_value[4] HR_5_CC_18_9P --> (original) +set_io $obuf_o_delay_value[4] HR_5_CC_18_9P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +# Pin o_delay_value[5] :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HR_5_CC_19_9N +# set_io o_delay_value[5] HR_5_CC_19_9N --> (original) +set_io $obuf_o_delay_value[5] HR_5_CC_18_9P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +# Clock data from object clk port O is not routed to fabric +# Pin clk :: I_BUF |-> CLK_BUF + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: delay_adj +# Location: HR_1_1_0N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_417 HR_1_1_0N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: delay_incdec +# Location: HR_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_418 HR_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: delay_load +# Location: HR_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_419 HR_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_420 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin f2g_in_en_A + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_ADJ +# Signal: in:rule=half-first:f2g_trx_dly_adj +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_adj_$ibuf_delay_adj_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin f2g_trx_dly_adj + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_INCDEC +# Signal: in:rule=half-first:f2g_trx_dly_inc +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_inc_$ibuf_delay_incdec_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin f2g_trx_dly_inc + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_LOAD +# Signal: in:rule=half-first:f2g_trx_dly_ld +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $f2g_trx_dly_ld_$ibuf_delay_load_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin f2g_trx_dly_ld + +# Module: I_DELAY +# LinkedObject: din +# Location: HP_1_0_0P +# Port: DLY_TAP_VALUE +# Signal: out:rule=half-first:g2f_trx_dly_tap +# Remap location from HP_1_0_0P to HP_1_0_0P +set_io $ifab_$obuf_i_delay_value[0] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[0] +set_io $ifab_$obuf_i_delay_value[1] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[1] +set_io $ifab_$obuf_i_delay_value[2] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[2] +set_io $ifab_$obuf_i_delay_value[3] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[3] +set_io $ifab_$obuf_i_delay_value[4] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[4] +set_io $ifab_$obuf_i_delay_value[5] HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin g2f_trx_dly_tap[5] + +# Module: I_DDR +# LinkedObject: din +# Location: HP_1_0_0P +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: I_DDR +# LinkedObject: din +# Location: HP_1_0_0P +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset_2 HP_1_0_0P -mode MODE_BP_DDR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: I_BUF +# LinkedObject: enable +# Location: HP_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_421 HP_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: I_BUF +# LinkedObject: reset +# Location: HP_1_2_1P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_422 HP_1_2_1P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_423 HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_ADJ +# Signal: in:rule=half-first:f2g_trx_dly_adj +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_adj had already been used +# set_io $f2g_trx_dly_adj_$ibuf_delay_adj HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_trx_dly_adj + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_INCDEC +# Signal: in:rule=half-first:f2g_trx_dly_inc +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_inc had already been used +# set_io $f2g_trx_dly_inc_$ibuf_delay_incdec HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_trx_dly_inc + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_LOAD +# Signal: in:rule=half-first:f2g_trx_dly_ld +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_ld had already been used +# set_io $f2g_trx_dly_ld_$ibuf_delay_load HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin f2g_trx_dly_ld + +# Module: O_DELAY +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: DLY_TAP_VALUE +# Signal: out:rule=half-first:g2f_trx_dly_tap +# Remap location from HP_1_1_0N to HP_1_0_0P +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[0] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[1] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[2] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[3] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[4] had already been used +# Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[5] had already been used +# set_io $ifab_$obuf_o_delay_value[0] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[0] +# set_io $ifab_$obuf_o_delay_value[1] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[1] +# set_io $ifab_$obuf_o_delay_value[2] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[2] +# set_io $ifab_$obuf_o_delay_value[3] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[3] +# set_io $ifab_$obuf_o_delay_value[4] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[4] +# set_io $ifab_$obuf_o_delay_value[5] HP_1_0_0P -mode MODE_BP_DDR_B_TX -internal_pin g2f_trx_dly_tap[5] + +# Module: O_DDR +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: E +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $ofab_$ibuf_enable HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin TO_BE_DETERMINED + +# Module: O_DDR +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: R +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $f2g_trx_reset_n_A_$ibuf_reset HP_1_1_0N -mode MODE_BP_DDR_B_TX -internal_pin TO_BE_DETERMINED + +# Module: O_BUFT +# LinkedObject: i_delay_value[0] +# Location: HR_5_0_0P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_424 HR_5_0_0P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[1] +# Location: HR_5_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_425 HR_5_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: i_delay_value[2] +# Location: HR_5_2_1P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_426 HR_5_2_1P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[3] +# Location: HR_5_3_1N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_427 HR_5_3_1N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: i_delay_value[4] +# Location: HR_5_4_2P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_428 HR_5_4_2P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: i_delay_value[5] +# Location: HR_5_5_2N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_429 HR_5_5_2N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[0] +# Location: HR_5_6_3P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_430 HR_5_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[1] +# Location: HR_5_7_3N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_431 HR_5_7_3N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[2] +# Location: HR_5_8_4P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_432 HR_5_8_4P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[3] +# Location: HR_5_9_4N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_433 HR_5_9_4N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: O_BUFT +# LinkedObject: o_delay_value[4] +# Location: HR_5_CC_18_9P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_434 HR_5_CC_18_9P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +# Module: O_BUFT +# LinkedObject: o_delay_value[5] +# Location: HR_5_CC_19_9N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_435 HR_5_CC_19_9N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_436 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +############# +# +# Each gearbox core clock +# +############# +# Module: I_DELAY +# Name: i_delay +# Location: HP_1_0_0P +# Port: CLK_IN +# Net: clk_clk_buf +# Slot: 0 +set_core_clk HP_1_0_0P 0 + +# Module: O_DELAY +# Name: o_delay +# Location: HP_1_1_0N +# Port: CLK_IN +# Net: clk_clk_buf +# Slot: 0 +# Skip reason: Had been defined by I_DELAY i_delay + +# Module: O_DDR +# Name: o_ddr +# Location: HP_1_1_0N +# Port: C +# Net: clk_clk_buf +# Slot: 0 +# Skip reason: Had been defined by I_DELAY i_delay + diff --git a/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.bit b/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.bit new file mode 100644 index 00000000..d41b39ce --- /dev/null +++ b/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.bit @@ -0,0 +1,5962 @@ +// Feature Bitstream: IO +// Model: PERIPHERY +// Total Bits: 10513 +// Timestamp: +// Format: DETAIL +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] + Attributes: + RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] + Attributes: + RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] + Attributes: + RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] + Attributes: + RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] + Attributes: + RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] + Attributes: + RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] + Attributes: + RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] + Attributes: + RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] + Attributes: + RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] + Attributes: + RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] + Attributes: + RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] + Attributes: + RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] + Attributes: + RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] + Attributes: + RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] + Attributes: + RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] + Attributes: + RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] + Attributes: + RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] + Attributes: + RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] + Attributes: + RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] + Attributes: + RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] + Attributes: + RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] + Attributes: + RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] + Attributes: + RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] + Attributes: + RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] + Attributes: + RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] + Attributes: + RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] + Attributes: + RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] + Attributes: + RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] + Attributes: + RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] + Attributes: + RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] + Attributes: + RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] + Attributes: + RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] + Attributes: + RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] + Attributes: + RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] + Attributes: + RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] + Attributes: + RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] + Attributes: + RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] + Attributes: + RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] + Attributes: + RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] + Attributes: + RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] + Attributes: + RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] + Attributes: + RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] + Attributes: + RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] + Attributes: + RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] + Attributes: + RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] + Attributes: + RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] + Attributes: + RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] + Attributes: + RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] + Attributes: + RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] + Attributes: + RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] + Attributes: + RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] + Attributes: + RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] + Attributes: + RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] + Attributes: + RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] + Attributes: + RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] + Attributes: + RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] + Attributes: + RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] + Attributes: + RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] + Attributes: + RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] + Attributes: + RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] + Attributes: + RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000009FE, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] + Attributes: + RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000A28, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] + Attributes: + RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] + Attributes: + RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] + Attributes: + RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] + Attributes: + RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] + Attributes: + RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] + Attributes: + RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] + Attributes: + RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] + Attributes: + RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] + Attributes: + RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] + Attributes: + RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] + Attributes: + RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] + Attributes: + RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C20, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_o_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] + Attributes: + RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_5 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] + Attributes: + RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C74, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_4 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] + Attributes: + RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_3 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] + Attributes: + RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_2 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] + Attributes: + RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value_1 [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] + Attributes: + RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_i_delay_value [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] + Attributes: + RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] + Attributes: + RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] + Attributes: + RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] + Attributes: + RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] + Attributes: + RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] + Attributes: + RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] + Attributes: + RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] + Attributes: + RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] + Attributes: + RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] + Attributes: + RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] + Attributes: + RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] + Attributes: + RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] + Attributes: + RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] + Attributes: + RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] + Attributes: + RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] + Attributes: + RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] + Attributes: + RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] + Attributes: + RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] + Attributes: + RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] + Attributes: + RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] + Attributes: + RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] + Attributes: + RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] + Attributes: + RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] + Attributes: + RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] + Attributes: + RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] + Attributes: + RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] + Attributes: + RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] + Attributes: + RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] + Attributes: + RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] + Attributes: + RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] + Attributes: + RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] + Attributes: + RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] + Attributes: + RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] + Attributes: + RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] + Attributes: + RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] + Attributes: + RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] + Attributes: + RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] + Attributes: + RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] + Attributes: + RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] + Attributes: + RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] + Attributes: + RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] + Attributes: + RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] + Attributes: + RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] + Attributes: + RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] + Attributes: + RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] + Attributes: + RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] + Attributes: + RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] + Attributes: + RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] + Attributes: + RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] + Attributes: + RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] + Attributes: + RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] + Attributes: + RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] + Attributes: + RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] + Attributes: + RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] + Attributes: + RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] + Attributes: + RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] + Attributes: + RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] + Attributes: + RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] + Attributes: + RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] + Attributes: + RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] + Attributes: + RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] + Attributes: + RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] + Attributes: + RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] + Attributes: + RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] + Attributes: + RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] + Attributes: + RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] + Attributes: + RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] + Attributes: + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] + Attributes: + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] + Attributes: + RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] + Attributes: + RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] + Attributes: + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] + Attributes: + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] + Attributes: + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT], o_ddr [O_DDR] [O_DDR:MODE==DDR] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x0000003C) 60 { o_delay [O_DELAY] [TX_DLY:60] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] + Attributes: + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], i_ddr [I_DDR] [I_DDR:MODE==DDR] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000032) 50 { i_delay [I_DELAY] [RX_DLY:50] } + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] + Attributes: + hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 + hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000001) 1 { clk_buf [CLK_BUF] [cfg_rxclk_phase_sel_A_0:1] [from HP_1_CC_18_9P] } + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_rx_fclkio_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [cfg_vco_clk_sel_A_0:0] [from HP_1_CC_18_9P] } + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000012) 18 { clk_buf [CLK_BUF] [CLK_BUF:ROOT_BANK_SRC==A --#MUX=18] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000000) 0 { clk_buf [CLK_BUF] [ROOT_MUX_SEL:0] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_bank_osc [] + Attributes: + cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 + cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 + cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] + Attributes: + RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] + Attributes: + RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] + Attributes: + RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] + Attributes: + RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] + Attributes: + RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] + Attributes: + RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] + Attributes: + RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] + Attributes: + RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] + Attributes: + RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] + Attributes: + RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] + Attributes: + RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] + Attributes: + RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] + Attributes: + RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] + Attributes: + RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] + Attributes: + RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] + Attributes: + RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] + Attributes: + RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] + Attributes: + RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] + Attributes: + RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] + Attributes: + RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] + Attributes: + RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] + Attributes: + RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] + Attributes: + RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] + Attributes: + RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] + Attributes: + RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] + Attributes: + RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] + Attributes: + RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] + Attributes: + RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] + Attributes: + RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] + Attributes: + RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] + Attributes: + RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] + Attributes: + RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] + Attributes: + RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] + Attributes: + RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] + Attributes: + RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000021C9, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] + Attributes: + RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] + Attributes: + RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000221D, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] + Attributes: + RATE - Addr: 0x00002221, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00002247, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] + Attributes: + RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] + Attributes: + RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] + Attributes: + RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] + Attributes: + RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] + Attributes: + RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] + Attributes: + RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] + Attributes: + RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] + Attributes: + RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] + Attributes: + RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] + Attributes: + RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] + Attributes: + RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] + Attributes: + RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] + Attributes: + RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] + Attributes: + RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] + Attributes: + RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] + Attributes: + RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] + Attributes: + RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] + Attributes: + RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] + Attributes: + RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] + Attributes: + RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] + Attributes: + RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] + Attributes: + RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] + Attributes: + RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] + Attributes: + RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] + Attributes: + RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] + Attributes: + RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] + Attributes: + RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] + Attributes: + RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] + Attributes: + RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] + Attributes: + RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] + Attributes: + RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] + Attributes: + RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] + Attributes: + RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] + Attributes: + RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] + Attributes: + RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] + Attributes: + RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] + Attributes: + RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] + Attributes: + RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.txt b/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.txt deleted file mode 100644 index 79e77afd..00000000 --- a/icb_bitstream/golden/io_delay_io_ddr/io_bitstream.detail.txt +++ /dev/null @@ -1,5962 +0,0 @@ -// Feature Bitstream: IO -// Model: PERIPHERY -// Total Bits: 10513 -// Timestamp: -// Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] - Attributes: - RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] - Attributes: - RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] - Attributes: - RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] - Attributes: - RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] - Attributes: - RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] - Attributes: - RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] - Attributes: - RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] - Attributes: - RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] - Attributes: - RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] - Attributes: - RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] - Attributes: - RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] - Attributes: - RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] - Attributes: - RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] - Attributes: - RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] - Attributes: - RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] - Attributes: - RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] - Attributes: - RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] - Attributes: - RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] - Attributes: - RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] - Attributes: - RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] - Attributes: - RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] - Attributes: - RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] - Attributes: - RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] - Attributes: - RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] - Attributes: - RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] - Attributes: - RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] - Attributes: - RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] - Attributes: - RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] - Attributes: - RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] - Attributes: - RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] - Attributes: - RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] - Attributes: - RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] - Attributes: - RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] - Attributes: - RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] - Attributes: - RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] - Attributes: - RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] - Attributes: - RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] - Attributes: - RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] - Attributes: - RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] - Attributes: - RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] - Attributes: - RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] - Attributes: - RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] - Attributes: - RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] - Attributes: - RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] - Attributes: - RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] - Attributes: - RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] - Attributes: - RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] - Attributes: - RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] - Attributes: - RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] - Attributes: - RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] - Attributes: - RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] - Attributes: - RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] - Attributes: - RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] - Attributes: - RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] - Attributes: - RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] - Attributes: - RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] - Attributes: - RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] - Attributes: - RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] - Attributes: - RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] - Attributes: - RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] - Attributes: - RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] - Attributes: - RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] - Attributes: - RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] - Attributes: - RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] - Attributes: - RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] - Attributes: - RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] - Attributes: - RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] - Attributes: - RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] - Attributes: - RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] - Attributes: - RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000B78, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] - Attributes: - RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] - Attributes: - RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] - Attributes: - RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] - Attributes: - RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C20, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.o_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] - Attributes: - RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_5 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] - Attributes: - RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C74, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_4 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] - Attributes: - RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_3 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] - Attributes: - RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_2 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] - Attributes: - RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value_1 [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] - Attributes: - RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.i_delay_value [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] - Attributes: - RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] - Attributes: - RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] - Attributes: - RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] - Attributes: - RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] - Attributes: - RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] - Attributes: - RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] - Attributes: - RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] - Attributes: - RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] - Attributes: - RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] - Attributes: - RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] - Attributes: - RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] - Attributes: - RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] - Attributes: - RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] - Attributes: - RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] - Attributes: - RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] - Attributes: - RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] - Attributes: - RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] - Attributes: - RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] - Attributes: - RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] - Attributes: - RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] - Attributes: - RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] - Attributes: - RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] - Attributes: - RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] - Attributes: - RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] - Attributes: - RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] - Attributes: - RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] - Attributes: - RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] - Attributes: - RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] - Attributes: - RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] - Attributes: - RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] - Attributes: - RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] - Attributes: - RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] - Attributes: - RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] - Attributes: - RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] - Attributes: - RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] - Attributes: - RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] - Attributes: - RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] - Attributes: - RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] - Attributes: - RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] - Attributes: - RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] - Attributes: - RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] - Attributes: - RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] - Attributes: - RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] - Attributes: - RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] - Attributes: - RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] - Attributes: - RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] - Attributes: - RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] - Attributes: - RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] - Attributes: - RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] - Attributes: - RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] - Attributes: - RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] - Attributes: - RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] - Attributes: - RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] - Attributes: - RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] - Attributes: - RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] - Attributes: - RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] - Attributes: - RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] - Attributes: - RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] - Attributes: - RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] - Attributes: - RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] - Attributes: - RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] - Attributes: - RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] - Attributes: - RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] - Attributes: - RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] - Attributes: - RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] - Attributes: - RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:WEAK_KEEPER==DEFAULT] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { clk_i_buf [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] - Attributes: - RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] - Attributes: - RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] - Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] - Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] - Attributes: - RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] - Attributes: - RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] - Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] - Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.reset [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] - Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x0000003C) 60 { o_delay [O_DELAY] [TX_DLY:60] } - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] - Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000032) 50 { i_delay [I_DELAY] [RX_DLY:50] } - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] - Attributes: - hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 - hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_bank_osc [] - Attributes: - cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 - cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 - cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] - Attributes: - RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] - Attributes: - RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] - Attributes: - RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] - Attributes: - RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] - Attributes: - RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] - Attributes: - RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] - Attributes: - RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] - Attributes: - RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] - Attributes: - RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] - Attributes: - RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] - Attributes: - RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] - Attributes: - RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] - Attributes: - RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] - Attributes: - RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] - Attributes: - RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] - Attributes: - RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] - Attributes: - RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] - Attributes: - RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] - Attributes: - RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] - Attributes: - RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] - Attributes: - RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] - Attributes: - RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] - Attributes: - RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] - Attributes: - RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] - Attributes: - RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] - Attributes: - RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] - Attributes: - RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] - Attributes: - RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] - Attributes: - RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] - Attributes: - RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] - Attributes: - RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] - Attributes: - RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] - Attributes: - RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] - Attributes: - RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] - Attributes: - RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] - Attributes: - RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] - Attributes: - RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000021C9, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_incdec [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] - Attributes: - RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] - Attributes: - RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x0000221D, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_adj [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] - Attributes: - RATE - Addr: 0x00002221, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00002247, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.delay_load [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] - Attributes: - RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] - Attributes: - RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] - Attributes: - RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] - Attributes: - RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] - Attributes: - RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] - Attributes: - RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] - Attributes: - RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] - Attributes: - RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] - Attributes: - RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] - Attributes: - RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] - Attributes: - RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] - Attributes: - RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] - Attributes: - RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] - Attributes: - RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] - Attributes: - RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] - Attributes: - RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] - Attributes: - RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] - Attributes: - RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] - Attributes: - RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] - Attributes: - RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] - Attributes: - RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] - Attributes: - RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] - Attributes: - RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] - Attributes: - RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] - Attributes: - RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] - Attributes: - RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] - Attributes: - RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] - Attributes: - RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] - Attributes: - RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] - Attributes: - RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] - Attributes: - RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] - Attributes: - RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] - Attributes: - RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] - Attributes: - RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] - Attributes: - RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] - Attributes: - RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] - Attributes: - RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] - Attributes: - RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/io_delay_io_ddr/io_config.json b/icb_bitstream/golden/io_delay_io_ddr/io_config.json new file mode 100644 index 00000000..26374dcd --- /dev/null +++ b/icb_bitstream/golden/io_delay_io_ddr/io_config.json @@ -0,0 +1,1102 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\delay_adj (index=0, width=1, offset=0)", + " Detect input port \\delay_incdec (index=0, width=1, offset=0)", + " Detect input port \\delay_load (index=0, width=1, offset=0)", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Detect input port \\enable (index=0, width=1, offset=0)", + " Detect output port \\i_delay_value (index=0, width=6, offset=0)", + " Detect output port \\i_delay_value (index=1, width=6, offset=0)", + " Detect output port \\i_delay_value (index=2, width=6, offset=0)", + " Detect output port \\i_delay_value (index=3, width=6, offset=0)", + " Detect output port \\i_delay_value (index=4, width=6, offset=0)", + " Detect output port \\i_delay_value (index=5, width=6, offset=0)", + " Detect output port \\o_delay_value (index=0, width=6, offset=0)", + " Detect output port \\o_delay_value (index=1, width=6, offset=0)", + " Detect output port \\o_delay_value (index=2, width=6, offset=0)", + " Detect output port \\o_delay_value (index=3, width=6, offset=0)", + " Detect output port \\o_delay_value (index=4, width=6, offset=0)", + " Detect output port \\o_delay_value (index=5, width=6, offset=0)", + " Detect input port \\reset (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_adj", + " Cell port \\I is connected to input port \\delay_adj", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_incdec", + " Cell port \\I is connected to input port \\delay_incdec", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_delay_load", + " Cell port \\I is connected to input port \\delay_load", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_enable", + " Cell port \\I is connected to input port \\enable", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_reset", + " Cell port \\I is connected to input port \\reset", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_dout", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value", + " Cell port \\O is connected to output port \\i_delay_value[0]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_1", + " Cell port \\O is connected to output port \\i_delay_value[1]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_2", + " Cell port \\O is connected to output port \\i_delay_value[2]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_3", + " Cell port \\O is connected to output port \\i_delay_value[3]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_4", + " Cell port \\O is connected to output port \\i_delay_value[4]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_i_delay_value_5", + " Cell port \\O is connected to output port \\i_delay_value[5]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value", + " Cell port \\O is connected to output port \\o_delay_value[0]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_1", + " Cell port \\O is connected to output port \\o_delay_value[1]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_2", + " Cell port \\O is connected to output port \\o_delay_value[2]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_3", + " Cell port \\O is connected to output port \\o_delay_value[3]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_4", + " Cell port \\O is connected to output port \\o_delay_value[4]", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_o_delay_value_5", + " Cell port \\O is connected to output port \\o_delay_value[5]", + " Data Width: -2", + " Get important connection of cell \\I_BUF \\clk_i_buf", + " Cell port \\I is connected to input port \\clk", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF \\clk_i_buf out connection: \\clk_buf_i -> \\clk_buf", + " Connected \\clk_buf", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Try \\I_BUF $ibuf$top.$ibuf_din out connection: $ibuf_din -> \\i_delay", + " Connected \\i_delay", + " Parameter \\DELAY: 50", + " Data Width: -2", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Try \\I_DELAY \\i_delay out connection: \\i_ddr_d -> \\i_ddr", + " Connected \\i_ddr", + " Data Width: -2", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Try \\O_BUFT $obuf$top.$obuf_dout out connection: $obuf_dout -> \\o_delay", + " Connected \\o_delay", + " Parameter \\DELAY: 60", + " Data Width: -2", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Try \\O_DELAY \\o_delay out connection: \\o_delay_i -> \\o_ddr", + " Connected \\o_ddr", + " Data Width: -2", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " \\I_DELAY \\i_delay port \\CLK_IN: \\clk_clk_buf", + " Ignore this because \\I_DDR \\i_ddr in chain has higher priority fast clock port", + " \\I_DDR \\i_ddr port \\C: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " \\O_DELAY \\o_delay port \\CLK_IN: \\clk_clk_buf", + " Connected to \\CLK_BUF \\clk_buf port \\O", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF \\clk_buf: clock port \\O, net \\clk_clk_buf", + " Connected to cell \\I_DDR \\i_ddr", + " Which is a primitive", + " Does not meet core_clk checking criteria. Not sending to fabric", + " Connected to cell \\I_DELAY \\i_delay", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Connected to cell \\O_DDR \\o_ddr", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Connected to cell \\O_DELAY \\o_delay", + " Which is a primitive", + " This is gearbox core_clk. Send to fabric", + " Use slot 0", + " Double check Core/Fabric Clock", + " \\I_DELAY \\i_delay port \\CLK_IN", + " Good. Found clocking", + " \\O_DELAY \\o_delay port \\CLK_IN", + " Good. Found clocking", + " \\O_DDR \\o_ddr port \\C", + " Good. Found clocking", + " Summary", + " |----------------------------------------------------------------------------------------------|", + " | ************************************************************** |", + " IN | delay_adj * I_BUF * |", + " IN | delay_incdec * I_BUF * |", + " IN | delay_load * I_BUF * |", + " IN | din * I_BUF |-> I_DELAY |-> I_DDR * |", + " IN | enable * I_BUF * |", + " IN | reset * I_BUF * |", + " OUT | * O_DDR |-> O_DELAY |-> O_BUFT * dout |", + " OUT | * O_BUFT * i_delay_value[0] |", + " OUT | * O_BUFT * i_delay_value[1] |", + " OUT | * O_BUFT * i_delay_value[2] |", + " OUT | * O_BUFT * i_delay_value[3] |", + " OUT | * O_BUFT * i_delay_value[4] |", + " OUT | * O_BUFT * i_delay_value[5] |", + " OUT | * O_BUFT * o_delay_value[0] |", + " OUT | * O_BUFT * o_delay_value[1] |", + " OUT | * O_BUFT * o_delay_value[2] |", + " OUT | * O_BUFT * o_delay_value[3] |", + " OUT | * O_BUFT * o_delay_value[4] |", + " OUT | * O_BUFT * o_delay_value[5] |", + " IN | clk * I_BUF |-> CLK_BUF * |", + " | ************************************************************** |", + " |----------------------------------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Assign location HP_1_2_1P (and properties) to Port reset", + " Assign location HP_1_3_1N (and properties) to Port enable", + " Assign location HR_1_0_0P (and properties) to Port delay_load", + " Assign location HR_1_1_0N (and properties) to Port delay_adj", + " Assign location HR_1_3_1N (and properties) to Port delay_incdec", + " Assign location HR_5_0_0P (and properties) to Port i_delay_value[0]", + " Assign location HR_5_1_0N (and properties) to Port i_delay_value[1]", + " Assign location HR_5_2_1P (and properties) to Port i_delay_value[2]", + " Assign location HR_5_3_1N (and properties) to Port i_delay_value[3]", + " Assign location HR_5_4_2P (and properties) to Port i_delay_value[4]", + " Assign location HR_5_5_2N (and properties) to Port i_delay_value[5]", + " Assign location HR_5_6_3P (and properties) to Port o_delay_value[0]", + " Assign location HR_5_7_3N (and properties) to Port o_delay_value[1]", + " Assign location HR_5_8_4P (and properties) to Port o_delay_value[2]", + " Assign location HR_5_9_4N (and properties) to Port o_delay_value[3]", + " Assign location HR_5_CC_18_9P (and properties) to Port o_delay_value[4]", + " Assign location HR_5_CC_19_9N (and properties) to Port o_delay_value[5]", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=delay_adj, location: HR_1_1_0N", + " Data signal from object delay_adj", + " Module=I_BUF Linked-object=delay_adj Port=O Net=$ibuf_delay_adj - Found", + " Pin object=delay_incdec, location: HR_1_3_1N", + " Data signal from object delay_incdec", + " Module=I_BUF Linked-object=delay_incdec Port=O Net=$ibuf_delay_incdec - Found", + " Pin object=delay_load, location: HR_1_0_0P", + " Data signal from object delay_load", + " Module=I_BUF Linked-object=delay_load Port=O Net=$ibuf_delay_load - Found", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_DDR Linked-object=din Port=Q Net=o_ddr_d - Found", + " Module=I_DDR Linked-object=din Port=Q Net=$delete_wire$416 - Found", + " Pin object=enable, location: HP_1_3_1N", + " Data signal from object enable", + " Module=I_BUF Linked-object=enable Port=O Net=$ibuf_enable - Found", + " Pin object=reset, location: HP_1_2_1P", + " Data signal from object reset", + " Module=I_BUF Linked-object=reset Port=O Net=$ibuf_reset - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_DDR Linked-object=dout Port=D Net=$auto_437 - Found", + " Module=O_DDR Linked-object=dout Port=D Net=__const_bit_0__ - Not found", + " Pin object=i_delay_value[0], location: HR_5_0_0P", + " Data signal from object i_delay_value[0]", + " Module=O_BUFT Linked-object=i_delay_value[0] Port=I Net=$obuf_i_delay_value[0] - Found", + " Pin object=i_delay_value[1], location: HR_5_1_0N", + " Data signal from object i_delay_value[1]", + " Module=O_BUFT Linked-object=i_delay_value[1] Port=I Net=$obuf_i_delay_value[1] - Found", + " Pin object=i_delay_value[2], location: HR_5_2_1P", + " Data signal from object i_delay_value[2]", + " Module=O_BUFT Linked-object=i_delay_value[2] Port=I Net=$obuf_i_delay_value[2] - Found", + " Pin object=i_delay_value[3], location: HR_5_3_1N", + " Data signal from object i_delay_value[3]", + " Module=O_BUFT Linked-object=i_delay_value[3] Port=I Net=$obuf_i_delay_value[3] - Found", + " Pin object=i_delay_value[4], location: HR_5_4_2P", + " Data signal from object i_delay_value[4]", + " Module=O_BUFT Linked-object=i_delay_value[4] Port=I Net=$obuf_i_delay_value[4] - Found", + " Pin object=i_delay_value[5], location: HR_5_5_2N", + " Data signal from object i_delay_value[5]", + " Module=O_BUFT Linked-object=i_delay_value[5] Port=I Net=$obuf_i_delay_value[5] - Found", + " Pin object=o_delay_value[0], location: HR_5_6_3P", + " Data signal from object o_delay_value[0]", + " Module=O_BUFT Linked-object=o_delay_value[0] Port=I Net=$obuf_o_delay_value[0] - Found", + " Pin object=o_delay_value[1], location: HR_5_7_3N", + " Data signal from object o_delay_value[1]", + " Module=O_BUFT Linked-object=o_delay_value[1] Port=I Net=$obuf_o_delay_value[1] - Found", + " Pin object=o_delay_value[2], location: HR_5_8_4P", + " Data signal from object o_delay_value[2]", + " Module=O_BUFT Linked-object=o_delay_value[2] Port=I Net=$obuf_o_delay_value[2] - Found", + " Pin object=o_delay_value[3], location: HR_5_9_4N", + " Data signal from object o_delay_value[3]", + " Module=O_BUFT Linked-object=o_delay_value[3] Port=I Net=$obuf_o_delay_value[3] - Found", + " Pin object=o_delay_value[4], location: HR_5_CC_18_9P", + " Data signal from object o_delay_value[4]", + " Module=O_BUFT Linked-object=o_delay_value[4] Port=I Net=$obuf_o_delay_value[4] - Found", + " Pin object=o_delay_value[5], location: HR_5_CC_19_9N", + " Data signal from object o_delay_value[5]", + " Module=O_BUFT Linked-object=o_delay_value[5] Port=I Net=$obuf_o_delay_value[5] - Found", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Module=I_BUF Linked-object=clk Port=O Net=$auto_441.clk_buf_i - Not found", + " Fail reason: Clock data from object clk port O is not routed to fabric", + " Determine internal control signals", + " Module=I_BUF LinkedObject=delay_adj Location=HR_1_1_0N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=delay_incdec Location=HR_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=delay_load Location=HR_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_ADJ Signal=in:rule=half-first:f2g_trx_dly_adj", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_INCDEC Signal=in:rule=half-first:f2g_trx_dly_inc", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_LOAD Signal=in:rule=half-first:f2g_trx_dly_ld", + " Module=I_DELAY LinkedObject=din Location=HP_1_0_0P Port=DLY_TAP_VALUE Signal=out:rule=half-first:g2f_trx_dly_tap", + " Module=I_DDR LinkedObject=din Location=HP_1_0_0P Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=I_DDR LinkedObject=din Location=HP_1_0_0P Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=I_BUF LinkedObject=enable Location=HP_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=reset Location=HP_1_2_1P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_ADJ Signal=in:rule=half-first:f2g_trx_dly_adj", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_adj had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_INCDEC Signal=in:rule=half-first:f2g_trx_dly_inc", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_inc had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_LOAD Signal=in:rule=half-first:f2g_trx_dly_ld", + " Fail reason: Assigned location HP_1_0_0P and internal signal f2g_trx_dly_ld had already been used", + " Module=O_DELAY LinkedObject=dout Location=HP_1_1_0N Port=DLY_TAP_VALUE Signal=out:rule=half-first:g2f_trx_dly_tap", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[0] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[1] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[2] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[3] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[4] had already been used", + " Fail reason: Assigned location HP_1_0_0P and internal signal g2f_trx_dly_tap[5] had already been used", + " Module=O_DDR LinkedObject=dout Location=HP_1_1_0N Port=E Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_DDR LinkedObject=dout Location=HP_1_1_0N Port=R Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=O_BUFT LinkedObject=i_delay_value[0] Location=HR_5_0_0P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[1] Location=HR_5_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[2] Location=HR_5_2_1P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[3] Location=HR_5_3_1N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[4] Location=HR_5_4_2P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=i_delay_value[5] Location=HR_5_5_2N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[0] Location=HR_5_6_3P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[1] Location=HR_5_7_3N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[2] Location=HR_5_8_4P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[3] Location=HR_5_9_4N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[4] Location=HR_5_CC_18_9P Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=O_BUFT LinkedObject=o_delay_value[5] Location=HR_5_CC_19_9N Port=T Signal=in:f2g_tx_oe_{A|B}", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_adj", + "location_object" : "delay_adj", + "location" : "HR_1_1_0N", + "linked_object" : "delay_adj", + "linked_objects" : { + "delay_adj" : { + "location" : "HR_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_adj", + "O" : "$ibuf_delay_adj" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_incdec", + "location_object" : "delay_incdec", + "location" : "HR_1_3_1N", + "linked_object" : "delay_incdec", + "linked_objects" : { + "delay_incdec" : { + "location" : "HR_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_incdec", + "O" : "$ibuf_delay_incdec" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_delay_load", + "location_object" : "delay_load", + "location" : "HR_1_0_0P", + "linked_object" : "delay_load", + "linked_objects" : { + "delay_load" : { + "location" : "HR_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "delay_load", + "O" : "$ibuf_delay_load" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DELAY" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_DELAY", + "name" : "i_delay", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "CLK_IN" : "clk_clk_buf", + "I" : "$ibuf_din", + "O" : "i_ddr_d" + }, + "parameters" : { + "DELAY" : "50" + }, + "flags" : [ + "I_DELAY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_DDR", + "name" : "i_ddr", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "D" : "i_ddr_d" + }, + "parameters" : { + }, + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_DELAY", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", + "linked_object" : "reset", + "linked_objects" : { + "reset" : { + "location" : "HP_1_2_1P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "reset", + "O" : "$ibuf_reset" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_dout", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DELAY" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_DELAY", + "name" : "o_delay", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "CLK_IN" : "clk_clk_buf", + "I" : "o_delay_i", + "O" : "$obuf_dout" + }, + "parameters" : { + "DELAY" : "60" + }, + "flags" : [ + "O_DELAY" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_DDR", + "name" : "o_ddr", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "C" : "clk_clk_buf", + "Q" : "o_delay_i" + }, + "parameters" : { + }, + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_DELAY", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value", + "location_object" : "i_delay_value[0]", + "location" : "HR_5_0_0P", + "linked_object" : "i_delay_value[0]", + "linked_objects" : { + "i_delay_value[0]" : { + "location" : "HR_5_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[0]", + "O" : "i_delay_value[0]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_1", + "location_object" : "i_delay_value[1]", + "location" : "HR_5_1_0N", + "linked_object" : "i_delay_value[1]", + "linked_objects" : { + "i_delay_value[1]" : { + "location" : "HR_5_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[1]", + "O" : "i_delay_value[1]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_2", + "location_object" : "i_delay_value[2]", + "location" : "HR_5_2_1P", + "linked_object" : "i_delay_value[2]", + "linked_objects" : { + "i_delay_value[2]" : { + "location" : "HR_5_2_1P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[2]", + "O" : "i_delay_value[2]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_3", + "location_object" : "i_delay_value[3]", + "location" : "HR_5_3_1N", + "linked_object" : "i_delay_value[3]", + "linked_objects" : { + "i_delay_value[3]" : { + "location" : "HR_5_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[3]", + "O" : "i_delay_value[3]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_4", + "location_object" : "i_delay_value[4]", + "location" : "HR_5_4_2P", + "linked_object" : "i_delay_value[4]", + "linked_objects" : { + "i_delay_value[4]" : { + "location" : "HR_5_4_2P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[4]", + "O" : "i_delay_value[4]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_5", + "location_object" : "i_delay_value[5]", + "location" : "HR_5_5_2N", + "linked_object" : "i_delay_value[5]", + "linked_objects" : { + "i_delay_value[5]" : { + "location" : "HR_5_5_2N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_i_delay_value[5]", + "O" : "i_delay_value[5]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value", + "location_object" : "o_delay_value[0]", + "location" : "HR_5_6_3P", + "linked_object" : "o_delay_value[0]", + "linked_objects" : { + "o_delay_value[0]" : { + "location" : "HR_5_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[0]", + "O" : "o_delay_value[0]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_1", + "location_object" : "o_delay_value[1]", + "location" : "HR_5_7_3N", + "linked_object" : "o_delay_value[1]", + "linked_objects" : { + "o_delay_value[1]" : { + "location" : "HR_5_7_3N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[1]", + "O" : "o_delay_value[1]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_2", + "location_object" : "o_delay_value[2]", + "location" : "HR_5_8_4P", + "linked_object" : "o_delay_value[2]", + "linked_objects" : { + "o_delay_value[2]" : { + "location" : "HR_5_8_4P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[2]", + "O" : "o_delay_value[2]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_3", + "location_object" : "o_delay_value[3]", + "location" : "HR_5_9_4N", + "linked_object" : "o_delay_value[3]", + "linked_objects" : { + "o_delay_value[3]" : { + "location" : "HR_5_9_4N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[3]", + "O" : "o_delay_value[3]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_4", + "location_object" : "o_delay_value[4]", + "location" : "HR_5_CC_18_9P", + "linked_object" : "o_delay_value[4]", + "linked_objects" : { + "o_delay_value[4]" : { + "location" : "HR_5_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[4]", + "O" : "o_delay_value[4]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_5", + "location_object" : "o_delay_value[5]", + "location" : "HR_5_CC_19_9N", + "linked_object" : "o_delay_value[5]", + "linked_objects" : { + "o_delay_value[5]" : { + "location" : "HR_5_CC_19_9N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_o_delay_value[5]", + "O" : "o_delay_value[5]" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "clk_buf_i" + }, + "parameters" : { + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "I" : "clk_buf_i", + "O" : "clk_clk_buf" + }, + "parameters" : { + "ROUTE_TO_FABRIC_CLK" : "0" + }, + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr", + "o_delay" + ] + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/io_delay_io_ddr/model_config.ppdb.json b/icb_bitstream/golden/io_delay_io_ddr/model_config.ppdb.json index a8fe2c76..c601127e 100644 --- a/icb_bitstream/golden/io_delay_io_ddr/model_config.ppdb.json +++ b/icb_bitstream/golden/io_delay_io_ddr/model_config.ppdb.json @@ -1,8 +1,208 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_delay_io_ddr/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/io_delay_io_ddr/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF clk_buf (location:HP_1_CC_18_9P)", + " Route to gearbox module i_ddr (location:HP_1_0_0P)", + " Use FCLK: hp_fclk_0_A", + " Route to gearbox module o_delay (location:HP_1_1_0N)", + " Use FCLK: hp_fclk_0_A", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + " CLK_BUF clk_buf", + " Resource: u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 (Bank A)(CORE)", + "Set CLKBUF remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " CLKBUF clk_buf (location:HP_1_CC_18_9P) use hp_fclk_0_A", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_delay_adj)", + " Object: delay_adj", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_delay_incdec)", + " Object: delay_incdec", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_delay_load)", + " Object: delay_load", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_DELAY (i_delay)", + " Object: din", + " Parameter", + " Rule I_DELAY", + " Match", + " Property", + " Module: I_DDR (i_ddr)", + " Object: din", + " Parameter", + " Rule I_DDR", + " Match", + " Property", + " Module: I_BUF ($ibuf$top.$ibuf_enable)", + " Object: enable", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_reset)", + " Object: reset", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_dout)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_DELAY (o_delay)", + " Object: dout", + " Parameter", + " Rule O_DELAY", + " Match", + " Property", + " Module: O_DDR (o_ddr)", + " Object: dout", + " Parameter", + " Rule O_DDR", + " Match", + " Property", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value)", + " Object: i_delay_value[0]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_1)", + " Object: i_delay_value[1]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_2)", + " Object: i_delay_value[2]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_3)", + " Object: i_delay_value[3]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_4)", + " Object: i_delay_value[4]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_i_delay_value_5)", + " Object: i_delay_value[5]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value)", + " Object: o_delay_value[0]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_1)", + " Object: o_delay_value[1]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_2)", + " Object: o_delay_value[2]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_3)", + " Object: o_delay_value[3]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_4)", + " Object: o_delay_value[4]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_o_delay_value_5)", + " Object: o_delay_value[5]", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch", + " Module: I_BUF (clk_i_buf)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Mismatch", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF (clk_buf)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Match", + " Rule CLK_BUF.ROOT_MUX", + " Match" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_adj", + "name" : "$ibuf$top.$ibuf_delay_adj", + "location_object" : "delay_adj", + "location" : "HR_1_1_0N", "linked_object" : "delay_adj", "linked_objects" : { "delay_adj" : { @@ -21,17 +221,31 @@ }, "connectivity" : { "I" : "delay_adj", - "O" : "$iopadmap$delay_adj" + "O" : "$ibuf_delay_adj" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_incdec", + "name" : "$ibuf$top.$ibuf_delay_incdec", + "location_object" : "delay_incdec", + "location" : "HR_1_3_1N", "linked_object" : "delay_incdec", "linked_objects" : { "delay_incdec" : { @@ -50,17 +264,31 @@ }, "connectivity" : { "I" : "delay_incdec", - "O" : "$iopadmap$delay_incdec" + "O" : "$ibuf_delay_incdec" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.delay_load", + "name" : "$ibuf$top.$ibuf_delay_load", + "location_object" : "delay_load", + "location" : "HR_1_0_0P", "linked_object" : "delay_load", "linked_objects" : { "delay_load" : { @@ -79,17 +307,31 @@ }, "connectivity" : { "I" : "delay_load", - "O" : "$iopadmap$delay_load" + "O" : "$ibuf_delay_load" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -108,17 +350,32 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "I_DELAY" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_DELAY", "name" : "i_delay", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -134,18 +391,33 @@ }, "connectivity" : { "CLK_IN" : "clk_clk_buf", - "I" : "$iopadmap$din", + "I" : "$ibuf_din", "O" : "i_ddr_d" }, "parameters" : { "DELAY" : "50" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "I_DELAY" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + "I_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { "module" : "I_DDR", "name" : "i_ddr", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -153,6 +425,9 @@ "properties" : { }, "config_attributes" : [ + { + "I_DDR" : "MODE==DDR" + } ] } }, @@ -162,12 +437,112 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "I_DDR" + ], + "pre_primitive" : "I_DELAY", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + }, + "config_attributes" : [ + { + "I_BUF" : "WEAK_KEEPER==NONE" + }, + { + "I_BUF" : "IOSTANDARD==DEFAULT" + } + ] + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_reset", + "location_object" : "reset", + "location" : "HP_1_2_1P", + "linked_object" : "reset", + "linked_objects" : { + "reset" : { + "location" : "HP_1_2_1P", + "properties" : { + }, + "config_attributes" : [ + { + "I_BUF" : "WEAK_KEEPER==NONE" + }, + { + "I_BUF" : "IOSTANDARD==DEFAULT" + } + ] + } + }, + "connectivity" : { + "I" : "reset", + "O" : "$ibuf_reset" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -176,23 +551,38 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$dout", + "I" : "$obuf_dout", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + "O_DELAY" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "O_DELAY", "name" : "o_delay", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -209,17 +599,32 @@ "connectivity" : { "CLK_IN" : "clk_clk_buf", "I" : "o_delay_i", - "O" : "$iopadmap$dout" + "O" : "$obuf_dout" }, "parameters" : { "DELAY" : "60" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" + "flags" : [ + "O_DELAY" + ], + "pre_primitive" : "O_BUFT", + "post_primitives" : [ + "O_DDR" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { "module" : "O_DDR", "name" : "o_ddr", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -227,6 +632,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_DDR" : "MODE==DDR" + } ] } }, @@ -236,41 +644,26 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "" - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - }, - "config_attributes" : [ - { - "I_BUF" : "WEAK_KEEPER==NONE" - }, - { - "I_BUF" : "IOSTANDARD==DEFAULT" - } - ] - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" + "flags" : [ + "O_DDR" + ], + "pre_primitive" : "O_DELAY", + "post_primitives" : [ + ], + "route_clock_to" : { }, - "parameters" : { - "WEAK_KEEPER" : "NONE" + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value", + "location_object" : "i_delay_value[0]", + "location" : "HR_5_0_0P", "linked_object" : "i_delay_value[0]", "linked_objects" : { "i_delay_value[0]" : { @@ -279,23 +672,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[0]", + "I" : "$obuf_i_delay_value[0]", "O" : "i_delay_value[0]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_1", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_1", + "location_object" : "i_delay_value[1]", + "location" : "HR_5_1_0N", "linked_object" : "i_delay_value[1]", "linked_objects" : { "i_delay_value[1]" : { @@ -304,23 +711,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[1]", + "I" : "$obuf_i_delay_value[1]", "O" : "i_delay_value[1]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_2", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_2", + "location_object" : "i_delay_value[2]", + "location" : "HR_5_2_1P", "linked_object" : "i_delay_value[2]", "linked_objects" : { "i_delay_value[2]" : { @@ -329,23 +750,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[2]", + "I" : "$obuf_i_delay_value[2]", "O" : "i_delay_value[2]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_3", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_3", + "location_object" : "i_delay_value[3]", + "location" : "HR_5_3_1N", "linked_object" : "i_delay_value[3]", "linked_objects" : { "i_delay_value[3]" : { @@ -354,23 +789,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[3]", + "I" : "$obuf_i_delay_value[3]", "O" : "i_delay_value[3]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_4", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_4", + "location_object" : "i_delay_value[4]", + "location" : "HR_5_4_2P", "linked_object" : "i_delay_value[4]", "linked_objects" : { "i_delay_value[4]" : { @@ -379,23 +828,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[4]", + "I" : "$obuf_i_delay_value[4]", "O" : "i_delay_value[4]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.i_delay_value_5", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_i_delay_value_5", + "location_object" : "i_delay_value[5]", + "location" : "HR_5_5_2N", "linked_object" : "i_delay_value[5]", "linked_objects" : { "i_delay_value[5]" : { @@ -404,23 +867,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$i_delay_value[5]", + "I" : "$obuf_i_delay_value[5]", "O" : "i_delay_value[5]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value", + "location_object" : "o_delay_value[0]", + "location" : "HR_5_6_3P", "linked_object" : "o_delay_value[0]", "linked_objects" : { "o_delay_value[0]" : { @@ -429,23 +906,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[0]", + "I" : "$obuf_o_delay_value[0]", "O" : "o_delay_value[0]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_1", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_1", + "location_object" : "o_delay_value[1]", + "location" : "HR_5_7_3N", "linked_object" : "o_delay_value[1]", "linked_objects" : { "o_delay_value[1]" : { @@ -454,23 +945,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[1]", + "I" : "$obuf_o_delay_value[1]", "O" : "o_delay_value[1]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_2", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_2", + "location_object" : "o_delay_value[2]", + "location" : "HR_5_8_4P", "linked_object" : "o_delay_value[2]", "linked_objects" : { "o_delay_value[2]" : { @@ -479,23 +984,37 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[2]", + "I" : "$obuf_o_delay_value[2]", "O" : "o_delay_value[2]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_3", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_3", + "location_object" : "o_delay_value[3]", + "location" : "HR_5_9_4N", "linked_object" : "o_delay_value[3]", "linked_objects" : { "o_delay_value[3]" : { @@ -504,106 +1023,119 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[3]", + "I" : "$obuf_o_delay_value[3]", "O" : "o_delay_value[3]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_4", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_4", + "location_object" : "o_delay_value[4]", + "location" : "HR_5_CC_18_9P", "linked_object" : "o_delay_value[4]", "linked_objects" : { "o_delay_value[4]" : { - "location" : "HR_5_CC_10_5P", + "location" : "HR_5_CC_18_9P", "properties" : { }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[4]", + "I" : "$obuf_o_delay_value[4]", "O" : "o_delay_value[4]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.o_delay_value_5", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_o_delay_value_5", + "location_object" : "o_delay_value[5]", + "location" : "HR_5_CC_19_9N", "linked_object" : "o_delay_value[5]", "linked_objects" : { "o_delay_value[5]" : { - "location" : "HR_5_CC_11_5N", + "location" : "HR_5_CC_19_9N", "properties" : { }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$o_delay_value[5]", + "I" : "$obuf_o_delay_value[5]", "O" : "o_delay_value[5]" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.reset", - "linked_object" : "reset", - "linked_objects" : { - "reset" : { - "location" : "HP_1_2_1P", - "properties" : { - }, - "config_attributes" : [ - { - "I_BUF" : "WEAK_KEEPER==NONE" - }, - { - "I_BUF" : "IOSTANDARD==DEFAULT" - } - ] - } - }, - "connectivity" : { - "I" : "reset", - "O" : "$iopadmap$reset" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { }, - "parameters" : { - "WEAK_KEEPER" : "NONE" + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", "name" : "clk_i_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -622,20 +1154,58 @@ }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rx_fclkio_sel_A_0" : "0" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_rxclk_phase_sel_A_0" : "1" + }, + { + "__location__" : "u_GBOX_HP_40X2.u_gbox_fclk_mux_all", + "cfg_vco_clk_sel_A_0" : "0" + }, + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + }, + { + "CLK_BUF" : "ROOT_BANK_SRC==A --#MUX=18", + "__location__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0" + }, + { + "ROOT_MUX_SEL" : "0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, @@ -646,8 +1216,32 @@ "parameters" : { "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + "O" : [ + "i_ddr", + "o_delay" + ] + }, + "route_clock_result" : { + "O" : [ + "Use FCLK: hp_fclk_0_A", + "Use FCLK: hp_fclk_0_A" + ] + }, + "errors" : [ + ], + "__AB__" : "A", + "__ROOT_BANK_MUX_LOCATION__" : "u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0", + "__ROOT_BANK_MUX__" : "18", + "__ROOT_MUX__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" } ] } diff --git a/icb_bitstream/golden/o_buft/config.json b/icb_bitstream/golden/o_buft/config.json deleted file mode 100644 index baa24f6f..00000000 --- a/icb_bitstream/golden/o_buft/config.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Detect input port \\enable (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.enable", - " Cell port \\I is connected to input port \\enable", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUFT \\o_buft", - " Cell port \\O is connected to output port \\dout", - " Trace \\I_BUF --> \\CLK_BUF", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_1_0N (and properties) to Port dout", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_3_1N (and properties) to Port enable", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUFT", - "name" : "o_buft", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$din", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/o_buft/design_edit.sdc b/icb_bitstream/golden/o_buft/design_edit.sdc new file mode 100644 index 00000000..47d4c275 --- /dev/null +++ b/icb_bitstream/golden/o_buft/design_edit.sdc @@ -0,0 +1,57 @@ +############# +# +# Fabric clock assignment +# +############# + +############# +# +# Each pin mode and location assignment +# +############# +# Pin din :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io $ibuf_din HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin enable :: I_BUF +# set_mode MODE_BP_DIR_B_RX HP_1_3_1N +# set_io enable HP_1_3_1N --> (original) +set_io $ibuf_enable HP_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Pin dout :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $auto_400 HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_398 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: enable +# Location: HP_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_399 HP_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $f2g_tx_oe_A_$ibuf_enable HP_1_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/feedthrough/io_bitstream.detail.txt b/icb_bitstream/golden/o_buft/io_bitstream.detail.bit similarity index 97% rename from icb_bitstream/golden/feedthrough/io_bitstream.detail.txt rename to icb_bitstream/golden/o_buft/io_bitstream.detail.bit index 77cf775e..dc505d84 100644 --- a/icb_bitstream/golden/feedthrough/io_bitstream.detail.txt +++ b/icb_bitstream/golden/o_buft/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,7 +3417,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] Attributes: RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,7 +3609,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] Attributes: RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 @@ -3779,28 +3779,28 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] Attributes: RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 @@ -3827,52 +3827,52 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { o_buft [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] Attributes: hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/o_buft/io_bitstream.detail.txt b/icb_bitstream/golden/o_buft/io_bitstream.detail.txt deleted file mode 100644 index 41b6e4b6..00000000 --- a/icb_bitstream/golden/o_buft/io_bitstream.detail.txt +++ /dev/null @@ -1,5962 +0,0 @@ -// Feature Bitstream: IO -// Model: PERIPHERY -// Total Bits: 10513 -// Timestamp: -// Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] - Attributes: - RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] - Attributes: - RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] - Attributes: - RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] - Attributes: - RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] - Attributes: - RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] - Attributes: - RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] - Attributes: - RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] - Attributes: - RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] - Attributes: - RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] - Attributes: - RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] - Attributes: - RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] - Attributes: - RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] - Attributes: - RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] - Attributes: - RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] - Attributes: - RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] - Attributes: - RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] - Attributes: - RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] - Attributes: - RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] - Attributes: - RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] - Attributes: - RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] - Attributes: - RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] - Attributes: - RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] - Attributes: - RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] - Attributes: - RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] - Attributes: - RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] - Attributes: - RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] - Attributes: - RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] - Attributes: - RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] - Attributes: - RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] - Attributes: - RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] - Attributes: - RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] - Attributes: - RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] - Attributes: - RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] - Attributes: - RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] - Attributes: - RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] - Attributes: - RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] - Attributes: - RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] - Attributes: - RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] - Attributes: - RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] - Attributes: - RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] - Attributes: - RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] - Attributes: - RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] - Attributes: - RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] - Attributes: - RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] - Attributes: - RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] - Attributes: - RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] - Attributes: - RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] - Attributes: - RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] - Attributes: - RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] - Attributes: - RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] - Attributes: - RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] - Attributes: - RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] - Attributes: - RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] - Attributes: - RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] - Attributes: - RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] - Attributes: - RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] - Attributes: - RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] - Attributes: - RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] - Attributes: - RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] - Attributes: - RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] - Attributes: - RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] - Attributes: - RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] - Attributes: - RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] - Attributes: - RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] - Attributes: - RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] - Attributes: - RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] - Attributes: - RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] - Attributes: - RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] - Attributes: - RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] - Attributes: - RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] - Attributes: - RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] - Attributes: - RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] - Attributes: - RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] - Attributes: - RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] - Attributes: - RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] - Attributes: - RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] - Attributes: - RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] - Attributes: - RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] - Attributes: - RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] - Attributes: - RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] - Attributes: - RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] - Attributes: - RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] - Attributes: - RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] - Attributes: - RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] - Attributes: - RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] - Attributes: - RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] - Attributes: - RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] - Attributes: - RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] - Attributes: - RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] - Attributes: - RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] - Attributes: - RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] - Attributes: - RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] - Attributes: - RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] - Attributes: - RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] - Attributes: - RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] - Attributes: - RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] - Attributes: - RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] - Attributes: - RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] - Attributes: - RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] - Attributes: - RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] - Attributes: - RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] - Attributes: - RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] - Attributes: - RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] - Attributes: - RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] - Attributes: - RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] - Attributes: - RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] - Attributes: - RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] - Attributes: - RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] - Attributes: - RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] - Attributes: - RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] - Attributes: - RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] - Attributes: - RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] - Attributes: - RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] - Attributes: - RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] - Attributes: - RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] - Attributes: - RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] - Attributes: - RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] - Attributes: - RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] - Attributes: - RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] - Attributes: - RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] - Attributes: - RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] - Attributes: - RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] - Attributes: - RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] - Attributes: - RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] - Attributes: - RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] - Attributes: - RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] - Attributes: - RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] - Attributes: - RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] - Attributes: - RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] - Attributes: - RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] - Attributes: - RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] - Attributes: - RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] - Attributes: - RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] - Attributes: - RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] - Attributes: - RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] - Attributes: - RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] - Attributes: - RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] - Attributes: - RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] - Attributes: - RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] - Attributes: - RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] - Attributes: - RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] - Attributes: - RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] - Attributes: - RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] - Attributes: - RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] - Attributes: - RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] - Attributes: - RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] - Attributes: - RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] - Attributes: - RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] - Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] - Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] - Attributes: - RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] - Attributes: - RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] - Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] - Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] - Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] - Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] - Attributes: - hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 - hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_bank_osc [] - Attributes: - cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 - cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 - cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] - Attributes: - RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] - Attributes: - RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] - Attributes: - RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] - Attributes: - RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] - Attributes: - RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] - Attributes: - RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] - Attributes: - RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] - Attributes: - RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] - Attributes: - RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] - Attributes: - RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] - Attributes: - RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] - Attributes: - RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] - Attributes: - RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] - Attributes: - RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] - Attributes: - RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] - Attributes: - RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] - Attributes: - RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] - Attributes: - RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] - Attributes: - RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] - Attributes: - RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] - Attributes: - RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] - Attributes: - RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] - Attributes: - RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] - Attributes: - RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] - Attributes: - RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] - Attributes: - RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] - Attributes: - RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] - Attributes: - RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] - Attributes: - RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] - Attributes: - RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] - Attributes: - RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] - Attributes: - RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] - Attributes: - RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] - Attributes: - RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] - Attributes: - RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] - Attributes: - RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] - Attributes: - RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021C9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] - Attributes: - RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] - Attributes: - RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000221D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] - Attributes: - RATE - Addr: 0x00002221, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] - Attributes: - RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] - Attributes: - RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] - Attributes: - RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] - Attributes: - RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] - Attributes: - RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] - Attributes: - RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] - Attributes: - RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] - Attributes: - RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] - Attributes: - RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] - Attributes: - RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] - Attributes: - RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] - Attributes: - RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] - Attributes: - RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] - Attributes: - RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] - Attributes: - RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] - Attributes: - RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] - Attributes: - RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] - Attributes: - RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] - Attributes: - RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] - Attributes: - RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] - Attributes: - RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] - Attributes: - RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] - Attributes: - RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] - Attributes: - RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] - Attributes: - RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] - Attributes: - RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] - Attributes: - RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] - Attributes: - RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] - Attributes: - RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] - Attributes: - RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] - Attributes: - RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] - Attributes: - RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] - Attributes: - RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] - Attributes: - RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] - Attributes: - RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] - Attributes: - RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] - Attributes: - RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] - Attributes: - RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/o_buft/io_config.json b/icb_bitstream/golden/o_buft/io_config.json new file mode 100644 index 00000000..ebadc7d5 --- /dev/null +++ b/icb_bitstream/golden/o_buft/io_config.json @@ -0,0 +1,178 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Detect input port \\enable (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_enable", + " Cell port \\I is connected to input port \\enable", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT \\o_buft", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Double check Core/Fabric Clock", + " Summary", + " |--------------------------------------------------------|", + " | ****************************************** |", + " IN | din * I_BUF * |", + " IN | enable * I_BUF * |", + " OUT | * O_BUFT * dout |", + " | ****************************************** |", + " |--------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Assign location HP_1_3_1N (and properties) to Port enable", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_BUF Linked-object=din Port=O Net=$ibuf_din - Found", + " Pin object=enable, location: HP_1_3_1N", + " Data signal from object enable", + " Module=I_BUF Linked-object=enable Port=O Net=$ibuf_enable - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_BUFT Linked-object=dout Port=I Net=$auto_400 - Found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=enable Location=HP_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "o_buft", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$ibuf_din", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/o_buft/model_config.ppdb.json b/icb_bitstream/golden/o_buft/model_config.ppdb.json index dabb9679..a440a94f 100644 --- a/icb_bitstream/golden/o_buft/model_config.ppdb.json +++ b/icb_bitstream/golden/o_buft/model_config.ppdb.json @@ -1,8 +1,53 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/o_buft/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/o_buft/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + "Set CLKBUF remaining configuration attributes (FCLK)", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_enable)", + " Object: enable", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT (o_buft)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -21,17 +66,31 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.enable", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", "linked_object" : "enable", "linked_objects" : { "enable" : { @@ -50,17 +109,31 @@ }, "connectivity" : { "I" : "enable", - "O" : "$iopadmap$enable" + "O" : "$ibuf_enable" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "O_BUFT", "name" : "o_buft", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -68,17 +141,32 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUFT" : "IOSTANDARD==DEFAULT" + } ] } }, "connectivity" : { - "I" : "$iopadmap$din", + "I" : "$ibuf_din", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" } ] } diff --git a/icb_bitstream/golden/o_buft_ds/config.json b/icb_bitstream/golden/o_buft_ds/config.json deleted file mode 100644 index 543bb1b2..00000000 --- a/icb_bitstream/golden/o_buft_ds/config.json +++ /dev/null @@ -1,121 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout_n (index=0, width=1, offset=0)", - " Detect output port \\dout_p (index=0, width=1, offset=0)", - " Detect input port \\enable (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.enable", - " Cell port \\I is connected to input port \\enable", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUFT_DS \\o_buft_ds", - " Cell port \\O_N is connected to output port \\dout_n", - " Cell port \\O_P is connected to output port \\dout_p", - " Trace \\I_BUF --> \\CLK_BUF", - " Trace \\CLK_BUF --> \\PLL", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_3_1N (and properties) to Port enable", - " Assign location HP_1_6_3P (and properties) to Port dout_p", - " Assign location HP_1_7_3N (and properties) to Port dout_n", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.enable", - "linked_object" : "enable", - "linked_objects" : { - "enable" : { - "location" : "HP_1_3_1N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "enable", - "O" : "$iopadmap$enable" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUFT_DS", - "name" : "o_buft_ds", - "linked_object" : "dout_n+dout_p", - "linked_objects" : { - "dout_n" : { - "location" : "HP_1_7_3N", - "properties" : { - } - }, - "dout_p" : { - "location" : "HP_1_6_3P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$din", - "O_N" : "dout_n", - "O_P" : "dout_p" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/o_buft_ds/design_edit.sdc b/icb_bitstream/golden/o_buft_ds/design_edit.sdc new file mode 100644 index 00000000..e67ca032 --- /dev/null +++ b/icb_bitstream/golden/o_buft_ds/design_edit.sdc @@ -0,0 +1,60 @@ +############# +# +# Fabric clock assignment +# +############# + +############# +# +# Each pin mode and location assignment +# +############# +# Pin din :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io $ibuf_din HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin enable :: I_BUF +# set_mode MODE_BP_DIR_B_RX HP_1_3_1N +# set_io enable HP_1_3_1N --> (original) +set_io $ibuf_enable HP_1_2_1P -mode MODE_BP_DIR_B_RX -internal_pin g2f_rx_in[5]_A + +# Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid' +# Pin dout_n :: O_BUFT_DS + +# Pin dout_p :: O_BUFT_DS +# set_mode MODE_BP_DIR_A_TX HP_1_6_3P +# set_io dout_p HP_1_6_3P --> (original) +set_io $auto_400 HP_1_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_out[0]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_398 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: I_BUF +# LinkedObject: enable +# Location: HP_1_3_1N +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_399 HP_1_3_1N -mode MODE_BP_DIR_B_RX -internal_pin f2g_in_en_B + +# Module: O_BUFT_DS +# LinkedObject: dout_n+dout_p +# Location: HP_1_6_3P +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $f2g_tx_oe_A_$ibuf_enable HP_1_6_3P -mode MODE_BP_DIR_A_TX -internal_pin f2g_tx_oe_A + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/pll/io_bitstream.detail.txt b/icb_bitstream/golden/o_buft_ds/io_bitstream.detail.bit similarity index 97% rename from icb_bitstream/golden/pll/io_bitstream.detail.txt rename to icb_bitstream/golden/o_buft_ds/io_bitstream.detail.bit index fbbf2e0e..c657214a 100644 --- a/icb_bitstream/golden/pll/io_bitstream.detail.txt +++ b/icb_bitstream/golden/o_buft_ds/io_bitstream.detail.bit @@ -3,7 +3,7 @@ // Total Bits: 10513 // Timestamp: // Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] Attributes: RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 @@ -27,7 +27,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] Attributes: RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 @@ -243,7 +243,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] Attributes: RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 @@ -267,7 +267,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] Attributes: RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 @@ -483,7 +483,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] Attributes: RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 @@ -507,7 +507,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] Attributes: RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 @@ -675,7 +675,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] Attributes: RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 @@ -699,7 +699,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] Attributes: RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 @@ -963,7 +963,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] Attributes: RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 @@ -987,7 +987,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] Attributes: RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 @@ -1203,7 +1203,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] Attributes: RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 @@ -1227,7 +1227,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] Attributes: RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 @@ -1443,7 +1443,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] Attributes: RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 @@ -1467,7 +1467,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] Attributes: RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 @@ -1635,7 +1635,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] Attributes: RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 @@ -1659,7 +1659,7 @@ Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] Attributes: RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 @@ -1927,33 +1927,33 @@ Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] Attributes: RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 @@ -1977,7 +1977,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] Attributes: RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 @@ -2193,7 +2193,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] Attributes: RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 @@ -2217,7 +2217,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] Attributes: RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 @@ -2433,7 +2433,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] Attributes: RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 @@ -2457,7 +2457,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] Attributes: RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 @@ -2625,7 +2625,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] Attributes: RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 @@ -2649,7 +2649,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] Attributes: RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 @@ -2913,7 +2913,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] Attributes: RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 @@ -2937,7 +2937,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] Attributes: RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 @@ -3153,7 +3153,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] Attributes: RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 @@ -3177,7 +3177,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] Attributes: RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 @@ -3393,7 +3393,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] Attributes: RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 @@ -3417,7 +3417,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] Attributes: RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 @@ -3585,7 +3585,7 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] Attributes: RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 @@ -3609,30 +3609,30 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] Attributes: RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 @@ -3683,52 +3683,52 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000003) 3 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000003) 3 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001976, Size: 4, Value: (0x00000001) 1 { o_buft_ds [O_BUFT_DS] [O_BUFT_DS:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] Attributes: RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 @@ -3779,28 +3779,28 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] Attributes: RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 @@ -3827,52 +3827,52 @@ Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.dout [O_BUF] [O_BUF:IOSTANDARD==DEFAULT] } + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] Attributes: hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 @@ -3881,27 +3881,27 @@ Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 @@ -4010,7 +4010,7 @@ Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] Attributes: RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 @@ -4034,7 +4034,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] Attributes: RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 @@ -4250,7 +4250,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] Attributes: RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 @@ -4274,7 +4274,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] Attributes: RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 @@ -4490,7 +4490,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] Attributes: RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 @@ -4514,7 +4514,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] Attributes: RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 @@ -4682,7 +4682,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] Attributes: RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 @@ -4706,7 +4706,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] Attributes: RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 @@ -4970,7 +4970,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] Attributes: RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 @@ -4994,7 +4994,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] Attributes: RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 @@ -5210,7 +5210,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] Attributes: RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 @@ -5234,7 +5234,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] Attributes: RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 @@ -5450,7 +5450,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] Attributes: RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 @@ -5474,7 +5474,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] Attributes: RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 @@ -5642,7 +5642,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] Attributes: RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 @@ -5666,7 +5666,7 @@ Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] Attributes: RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 @@ -5934,27 +5934,27 @@ Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] Attributes: hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] Attributes: CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/o_buft_ds/io_bitstream.detail.txt b/icb_bitstream/golden/o_buft_ds/io_bitstream.detail.txt deleted file mode 100644 index 41b6e4b6..00000000 --- a/icb_bitstream/golden/o_buft_ds/io_bitstream.detail.txt +++ /dev/null @@ -1,5962 +0,0 @@ -// Feature Bitstream: IO -// Model: PERIPHERY -// Total Bits: 10513 -// Timestamp: -// Format: DETAIL -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_39_19N] - Attributes: - RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_38_19P] - Attributes: - RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] - Attributes: - RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] - Attributes: - RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] - Attributes: - RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] - Attributes: - RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] - Attributes: - RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] - Attributes: - RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] - Attributes: - RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] - Attributes: - RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_CC_29_14N] - Attributes: - RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_CC_28_14P] - Attributes: - RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] - Attributes: - RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] - Attributes: - RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] - Attributes: - RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] - Attributes: - RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] - Attributes: - RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] - Attributes: - RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] - Attributes: - RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] - Attributes: - RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_19_9N] - Attributes: - RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_18_9P] - Attributes: - RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] - Attributes: - RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] - Attributes: - RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] - Attributes: - RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] - Attributes: - RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] - Attributes: - RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] - Attributes: - RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_CC_11_5N] - Attributes: - RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_CC_10_5P] - Attributes: - RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] - Attributes: - RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] - Attributes: - RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] - Attributes: - RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] - Attributes: - RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] - Attributes: - RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] - Attributes: - RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] - Attributes: - RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] - Attributes: - RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] - Attributes: - RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] - Attributes: - RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_39_19N] - Attributes: - RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_38_19P] - Attributes: - RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] - Attributes: - RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] - Attributes: - RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] - Attributes: - RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] - Attributes: - RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] - Attributes: - RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] - Attributes: - RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] - Attributes: - RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] - Attributes: - RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_CC_29_14N] - Attributes: - RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_CC_28_14P] - Attributes: - RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] - Attributes: - RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] - Attributes: - RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] - Attributes: - RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] - Attributes: - RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] - Attributes: - RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] - Attributes: - RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] - Attributes: - RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] - Attributes: - RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_19_9N] - Attributes: - RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_18_9P] - Attributes: - RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] - Attributes: - RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] - Attributes: - RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] - Attributes: - RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] - Attributes: - RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] - Attributes: - RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] - Attributes: - RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_CC_11_5N] - Attributes: - RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_CC_10_5P] - Attributes: - RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] - Attributes: - RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] - Attributes: - RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] - Attributes: - RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] - Attributes: - RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] - Attributes: - RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] - Attributes: - RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] - Attributes: - RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] - Attributes: - RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] - Attributes: - RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] - Attributes: - RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_39_19N] - Attributes: - RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_38_19P] - Attributes: - RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] - Attributes: - RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] - Attributes: - RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] - Attributes: - RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] - Attributes: - RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] - Attributes: - RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] - Attributes: - RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] - Attributes: - RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] - Attributes: - RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_CC_29_14N] - Attributes: - RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] - Attributes: - RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] - Attributes: - RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] - Attributes: - RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] - Attributes: - RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] - Attributes: - RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] - Attributes: - RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] - Attributes: - RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] - Attributes: - RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_19_9N] - Attributes: - RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_18_9P] - Attributes: - RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] - Attributes: - RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] - Attributes: - RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] - Attributes: - RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] - Attributes: - RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] - Attributes: - RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] - Attributes: - RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_CC_10_5P] - Attributes: - RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] - Attributes: - RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] - Attributes: - RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] - Attributes: - RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] - Attributes: - RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] - Attributes: - RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] - Attributes: - RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] - Attributes: - RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] - Attributes: - RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] - Attributes: - RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] - Attributes: - RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_39_19N] - Attributes: - RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_38_19P] - Attributes: - RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] - Attributes: - RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] - Attributes: - RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] - Attributes: - RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] - Attributes: - RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] - Attributes: - RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] - Attributes: - RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] - Attributes: - RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] - Attributes: - RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_CC_29_14N] - Attributes: - RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_CC_28_14P] - Attributes: - RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] - Attributes: - RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] - Attributes: - RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] - Attributes: - RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] - Attributes: - RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] - Attributes: - RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] - Attributes: - RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] - Attributes: - RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] - Attributes: - RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_19_9N] - Attributes: - RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_18_9P] - Attributes: - RATE - Addr: 0x00001758, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000177E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] - Attributes: - RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] - Attributes: - RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] - Attributes: - RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] - Attributes: - RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] - Attributes: - RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] - Attributes: - RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_CC_11_5N] - Attributes: - RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_CC_10_5P] - Attributes: - RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] - Attributes: - RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] - Attributes: - RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] - Attributes: - RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] - Attributes: - RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] - Attributes: - RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] - Attributes: - RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] - Attributes: - RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x000019F4, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.enable [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] - Attributes: - RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] - Attributes: - RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001A48, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] - Attributes: - RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } - DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } - MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $iopadmap$top.din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } -Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] - Attributes: - hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 - hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 - hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 - hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_fclk_mux_hp_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_hp_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] - Attributes: - ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 -Block u_GBOX_HP_40X2.u_bank_osc [] - Attributes: - cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 - cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 - cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 - cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] - Attributes: - pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 - pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 - pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 - pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 - pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 - pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 - pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 - pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 - pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 - pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 - pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 - pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] - Attributes: - cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 - cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 - cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 - cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_39_19N] - Attributes: - RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_38_19P] - Attributes: - RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] - Attributes: - RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] - Attributes: - RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] - Attributes: - RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] - Attributes: - RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] - Attributes: - RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] - Attributes: - RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] - Attributes: - RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] - Attributes: - RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_CC_29_14N] - Attributes: - RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_CC_28_14P] - Attributes: - RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] - Attributes: - RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] - Attributes: - RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] - Attributes: - RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] - Attributes: - RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] - Attributes: - RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] - Attributes: - RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] - Attributes: - RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] - Attributes: - RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_19_9N] - Attributes: - RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_18_9P] - Attributes: - RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] - Attributes: - RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] - Attributes: - RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] - Attributes: - RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] - Attributes: - RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] - Attributes: - RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] - Attributes: - RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_CC_11_5N] - Attributes: - RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_CC_10_5P] - Attributes: - RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] - Attributes: - RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] - Attributes: - RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] - Attributes: - RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] - Attributes: - RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] - Attributes: - RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] - Attributes: - RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] - Attributes: - RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021C9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] - Attributes: - RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] - Attributes: - RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000221D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] - Attributes: - RATE - Addr: 0x00002221, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_39_19N] - Attributes: - RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_38_19P] - Attributes: - RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] - Attributes: - RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] - Attributes: - RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] - Attributes: - RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] - Attributes: - RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] - Attributes: - RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] - Attributes: - RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] - Attributes: - RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] - Attributes: - RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_CC_29_14N] - Attributes: - RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_CC_28_14P] - Attributes: - RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] - Attributes: - RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] - Attributes: - RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] - Attributes: - RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] - Attributes: - RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] - Attributes: - RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] - Attributes: - RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] - Attributes: - RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] - Attributes: - RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_19_9N] - Attributes: - RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_18_9P] - Attributes: - RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] - Attributes: - RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] - Attributes: - RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] - Attributes: - RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] - Attributes: - RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] - Attributes: - RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] - Attributes: - RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_CC_11_5N] - Attributes: - RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_CC_10_5P] - Attributes: - RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] - Attributes: - RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] - Attributes: - RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] - Attributes: - RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] - Attributes: - RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] - Attributes: - RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] - Attributes: - RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] - Attributes: - RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] - Attributes: - RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] - Attributes: - RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] - Attributes: - RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 - MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 - PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 - TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 - TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 - TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 - TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 - TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 - RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 - RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 - RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 - RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 - RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 - TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 - RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 - RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 - DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 - SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 - PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 - PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 - DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 - MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] - Attributes: - hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 - hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_hv_all [] - Attributes: - cfg_hp_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 - cfg_hp_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 - cfg_hp_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 - cfg_hp_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_0 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 -Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_hv_1 [] - Attributes: - CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 - CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 - CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/o_buft_ds/io_config.json b/icb_bitstream/golden/o_buft_ds/io_config.json new file mode 100644 index 00000000..58cecf6d --- /dev/null +++ b/icb_bitstream/golden/o_buft_ds/io_config.json @@ -0,0 +1,191 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout_n (index=0, width=1, offset=0)", + " Detect output port \\dout_p (index=0, width=1, offset=0)", + " Detect input port \\enable (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_enable", + " Cell port \\I is connected to input port \\enable", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT_DS \\o_buft_ds", + " Cell port \\O_N is connected to output port \\dout_n", + " Cell port \\O_P is connected to output port \\dout_p", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Double check Core/Fabric Clock", + " Summary", + " |--------------------------------------------------------------------|", + " | ********************************************* |", + " IN | din * I_BUF * |", + " IN | enable * I_BUF * |", + " OUT | * O_BUFT_DS * dout_n+dout_p |", + " | ********************************************* |", + " |--------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_3_1N (and properties) to Port enable", + " Assign location HP_1_6_3P (and properties) to Port dout_p", + " Assign location HP_1_7_3N (and properties) to Port dout_n", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_BUF Linked-object=din Port=O Net=$ibuf_din - Found", + " Pin object=enable, location: HP_1_3_1N", + " Data signal from object enable", + " Module=I_BUF Linked-object=enable Port=O Net=$ibuf_enable - Found", + " Pin object=dout_n, location: HP_1_7_3N", + " Skip this because 'This is secondary pin. But IO bitstream generation will still make sure it is used in pair. Otherwise the IO bitstream will be invalid'", + " Pin object=dout_p, location: HP_1_6_3P", + " Data signal from object dout_p", + " Module=O_BUFT_DS Linked-object=dout_n+dout_p Port=I Net=$auto_400 - Found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=I_BUF LinkedObject=enable Location=HP_1_3_1N Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT_DS LinkedObject=dout_n+dout_p Location=HP_1_6_3P Port=T Signal=in:f2g_tx_oe_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", + "linked_object" : "enable", + "linked_objects" : { + "enable" : { + "location" : "HP_1_3_1N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "enable", + "O" : "$ibuf_enable" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT_DS", + "name" : "o_buft_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", + "linked_object" : "dout_n+dout_p", + "linked_objects" : { + "dout_n" : { + "location" : "HP_1_7_3N", + "properties" : { + } + }, + "dout_p" : { + "location" : "HP_1_6_3P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$ibuf_din", + "O_N" : "dout_n", + "O_P" : "dout_p" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "O_BUFT_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/o_buft_ds/model_config.ppdb.json b/icb_bitstream/golden/o_buft_ds/model_config.ppdb.json index 210c61e4..567d11e1 100644 --- a/icb_bitstream/golden/o_buft_ds/model_config.ppdb.json +++ b/icb_bitstream/golden/o_buft_ds/model_config.ppdb.json @@ -1,8 +1,58 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/o_buft_ds/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/o_buft_ds/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + "Set CLKBUF remaining configuration attributes (FCLK)", + "Allocate PLL resource (and set PLLREF configuration attributes)", + "Set PLL remaining configuration attributes (FCLK)", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: I_BUF ($ibuf$top.$ibuf_enable)", + " Object: enable", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT_DS (o_buft_ds)", + " Object: dout_n", + " Parameter", + " Property", + " Rule O_BUFT_DS.IOSTANDARD", + " Mismatch", + " Object: dout_p", + " Parameter", + " Property", + " Rule O_BUFT_DS.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -21,17 +71,31 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.enable", + "name" : "$ibuf$top.$ibuf_enable", + "location_object" : "enable", + "location" : "HP_1_3_1N", "linked_object" : "enable", "linked_objects" : { "enable" : { @@ -50,17 +114,31 @@ }, "connectivity" : { "I" : "enable", - "O" : "$iopadmap$enable" + "O" : "$ibuf_enable" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "O_BUFT_DS", "name" : "o_buft_ds", + "location_object" : "dout_p", + "location" : "HP_1_6_3P", "linked_object" : "dout_n+dout_p", "linked_objects" : { "dout_n" : { @@ -68,6 +146,9 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUFT_DS" : "IOSTANDARD==DEFAULT" + } ] }, "dout_p" : { @@ -75,18 +156,34 @@ "properties" : { }, "config_attributes" : [ + { + "O_BUFT_DS" : "IOSTANDARD==DEFAULT" + } ] } }, "connectivity" : { - "I" : "$iopadmap$din", + "I" : "$ibuf_din", "O_N" : "dout_n", "O_P" : "dout_p" }, "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "O_BUFT_DS" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__ds_pin_is_valid__,__pin_is_differential__,__check_ds_pin_resource__" } ] } diff --git a/icb_bitstream/golden/pll/config.json b/icb_bitstream/golden/pll/config.json deleted file mode 100644 index f89cf4eb..00000000 --- a/icb_bitstream/golden/pll/config.json +++ /dev/null @@ -1,174 +0,0 @@ -{ - "messages" : [ - "Start of IO Analysis", - " Get Ports", - " Detect input port \\clk (index=0, width=1, offset=0)", - " Detect input port \\din (index=0, width=1, offset=0)", - " Detect output port \\dout (index=0, width=1, offset=0)", - " Get Port Primitives", - " Get important connection of cell \\I_BUF $iopadmap$top.clk", - " Cell port \\I is connected to input port \\clk", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\I_BUF $iopadmap$top.din", - " Cell port \\I is connected to input port \\din", - " Parameter \\WEAK_KEEPER: \"NONE\"", - " Get important connection of cell \\O_BUF $iopadmap$top.dout", - " Cell port \\O is connected to output port \\dout", - " Trace \\I_BUF --> \\CLK_BUF", - " Try \\I_BUF $iopadmap$top.clk out connection: $iopadmap$clk", - " Connected \\clk_buf", - " Trace \\CLK_BUF --> \\PLL", - " Try \\CLK_BUF \\clk_buf out connection: \\clkbuf", - " Connected \\pll", - " Parameter \\PLL_DIV: 1", - " Parameter \\PLL_MULT: 16", - " Parameter \\PLL_POST_DIV: 34", - " Trace \\I_BUF --> \\I_DELAY", - " Trace \\I_BUF --> \\I_DDR", - " Trace \\I_BUF_DS --> \\I_DELAY", - " Trace \\I_BUF_DS --> \\I_DDR", - " Trace \\I_DELAY --> \\I_DDR", - " Trace \\O_BUF --> \\O_DELAY", - " Trace \\O_BUF --> \\O_DDR", - " Trace \\O_BUFT --> \\O_DELAY", - " Trace \\O_BUFT --> \\O_DDR", - " Trace \\O_BUF_DS --> \\O_DELAY", - " Trace \\O_BUF_DS --> \\O_DDR", - " Trace \\O_BUFT_DS --> \\O_DELAY", - " Trace \\O_BUFT_DS --> \\O_DDR", - " Trace \\O_DELAY --> \\O_DDR", - " Trace gearbox clock source", - " Assign location HP_1_CC_10_5P (and properties) to Port clk", - " Assign location HP_1_0_0P (and properties) to Port din", - " Assign location HP_1_1_0N (and properties) to Port dout", - "End of IO Analysis" - ], - "instances" : [ - { - "module" : "I_BUF", - "name" : "$iopadmap$top.clk", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "clk", - "O" : "$iopadmap$clk" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - "CLK_BUF" - ], - "route_clock_to" : { - } - }, - { - "module" : "CLK_BUF", - "name" : "clk_buf", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" - } - } - }, - "connectivity" : { - "I" : "$iopadmap$clk", - "O" : "clkbuf" - }, - "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" - }, - "pre_primitive" : "I_BUF", - "post_primitives" : [ - "PLL" - ], - "route_clock_to" : { - } - }, - { - "module" : "PLL", - "name" : "pll", - "linked_object" : "clk", - "linked_objects" : { - "clk" : { - "location" : "HP_1_CC_10_5P", - "properties" : { - "OUT3_ROUTE_TO_FABRIC_CLK" : "1" - } - } - }, - "connectivity" : { - "CLK_IN" : "clkbuf", - "CLK_OUT_DIV4" : "pll_clk" - }, - "parameters" : { - "OUT3_ROUTE_TO_FABRIC_CLK" : "1", - "PLL_DIV" : "1", - "PLL_MULT" : "16", - "PLL_POST_DIV" : "34" - }, - "pre_primitive" : "CLK_BUF", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "I_BUF", - "name" : "$iopadmap$top.din", - "linked_object" : "din", - "linked_objects" : { - "din" : { - "location" : "HP_1_0_0P", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "din", - "O" : "$iopadmap$din" - }, - "parameters" : { - "WEAK_KEEPER" : "NONE" - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - }, - { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", - "linked_object" : "dout", - "linked_objects" : { - "dout" : { - "location" : "HP_1_1_0N", - "properties" : { - } - } - }, - "connectivity" : { - "I" : "$iopadmap$dout", - "O" : "dout" - }, - "parameters" : { - }, - "pre_primitive" : "", - "post_primitives" : [ - ], - "route_clock_to" : { - } - } - ] -} diff --git a/icb_bitstream/golden/pll/design_edit.sdc b/icb_bitstream/golden/pll/design_edit.sdc new file mode 100644 index 00000000..b8e24eff --- /dev/null +++ b/icb_bitstream/golden/pll/design_edit.sdc @@ -0,0 +1,74 @@ +############# +# +# Fabric clock assignment +# +############# +# This clock need to route to fabric slot #0 +# set_clock_pin -device_clock clk[0] -design_clock clk (Physical port name, clock module: PLL pll) +# set_clock_pin -device_clock clk[0] -design_clock pll_clk (Original clock primitive out-net to fabric) +set_clock_pin -device_clock clk[0] -design_clock pll_clk + +############# +# +# Each pin mode and location assignment +# +############# +# Object clk is primitive \PLL but data signal is not defined +# Pin clk :: I_BUF |-> CLK_BUF |-> PLL + +# Pin din :: I_BUF +# set_mode MODE_BP_DIR_A_RX HP_1_0_0P +# set_io din HP_1_0_0P --> (original) +set_io $ibuf_din HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin g2f_rx_in[0]_A + +# Pin dout :: O_BUFT +# set_mode MODE_BP_DIR_B_TX HP_1_1_0N +# set_io dout HP_1_1_0N --> (original) +set_io $obuf_dout HP_1_0_0P -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_out[5]_A + +############# +# +# Internal Control Signals +# +############# +# Module: I_BUF +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_415 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: PLL +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: LOCK +# Signal: out:TO_BE_DETERMINED +# Skip reason: User design does not utilize linked-object clk wrapped-instance port LOCK + +# Module: PLL +# LinkedObject: clk +# Location: HP_1_CC_18_9P +# Port: PLL_EN +# Signal: in:TO_BE_DETERMINED +# Skip reason: TO_BE_DETERMINED +# set_io $auto_418 HP_1_CC_18_9P -mode MODE_BP_DIR_A_RX -internal_pin TO_BE_DETERMINED + +# Module: I_BUF +# LinkedObject: din +# Location: HP_1_0_0P +# Port: EN +# Signal: in:f2g_in_en_{A|B} +set_io $auto_416 HP_1_0_0P -mode MODE_BP_DIR_A_RX -internal_pin f2g_in_en_A + +# Module: O_BUFT +# LinkedObject: dout +# Location: HP_1_1_0N +# Port: T +# Signal: in:f2g_tx_oe_{A|B} +set_io $auto_417 HP_1_1_0N -mode MODE_BP_DIR_B_TX -internal_pin f2g_tx_oe_B + +############# +# +# Each gearbox core clock +# +############# diff --git a/icb_bitstream/golden/pll/io_bitstream.detail.bit b/icb_bitstream/golden/pll/io_bitstream.detail.bit new file mode 100644 index 00000000..537915a1 --- /dev/null +++ b/icb_bitstream/golden/pll/io_bitstream.detail.bit @@ -0,0 +1,5962 @@ +// Feature Bitstream: IO +// Model: PERIPHERY +// Total Bits: 10513 +// Timestamp: +// Format: DETAIL +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_19 [HR_3_CC_39_19N] + Attributes: + RATE - Addr: 0x00000000, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000004, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000005, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000006, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000007, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000009, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000000A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000000C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000012, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000014, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000015, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000001B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000001D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000001E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000001F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000020, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000021, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000022, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000023, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000024, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000025, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000026, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_19 [HR_3_CC_38_19P] + Attributes: + RATE - Addr: 0x0000002A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000002E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000002F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000030, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000031, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000033, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000034, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000036, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000003C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000003E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000003F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000045, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000047, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000048, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000049, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000004A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000004B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000004C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000004D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000004E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000004F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000050, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_18 [HR_3_37_18N] + Attributes: + RATE - Addr: 0x00000054, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000058, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000059, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000005A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000005B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000005D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000005E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000060, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000066, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000068, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000069, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000006F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000071, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000072, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000073, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000074, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000075, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000076, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000077, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000078, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000079, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000007A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_18 [HR_3_36_18P] + Attributes: + RATE - Addr: 0x0000007E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000082, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000083, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000084, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000085, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000087, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000088, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000008A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000090, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000092, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000093, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000099, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000009B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000009C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000009D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000009E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000009F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_17 [HR_3_35_17N] + Attributes: + RATE - Addr: 0x000000A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_17 [HR_3_34_17P] + Attributes: + RATE - Addr: 0x000000D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000000D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000000D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000000D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000000D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000000DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000000DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000000DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000000E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000000E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000000E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000000ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000000EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000000F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000000F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000000F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000000F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000000F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000000F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000000F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000000F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000000F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_16 [HR_3_33_16N] + Attributes: + RATE - Addr: 0x000000FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000100, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000101, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000102, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000103, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000105, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000106, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000108, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000010E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000110, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000111, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000117, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000119, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000011A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000011B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000011C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000011D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000011E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000011F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000120, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000121, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000122, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_16 [HR_3_32_16P] + Attributes: + RATE - Addr: 0x00000126, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000012A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000012B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000012C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000012D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000012F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000130, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000132, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000138, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000013A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000013B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000141, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000143, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000144, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000145, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000146, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000147, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000148, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000149, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000014A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000014B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000014C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_15 [HR_3_31_15N] + Attributes: + RATE - Addr: 0x00000150, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000154, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000155, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000156, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000157, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000159, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000015A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000015C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000162, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000164, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000165, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000016B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000016D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000016E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000016F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000170, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000171, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000172, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000173, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000174, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000175, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000176, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_15 [HR_3_30_15P] + Attributes: + RATE - Addr: 0x0000017A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000017E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000017F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000180, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000181, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000183, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000184, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000186, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000018C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000018E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000018F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000195, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000197, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000198, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000199, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000019A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000019B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000019C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000019D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000019E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000019F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_14 [HR_3_29_14N] + Attributes: + RATE - Addr: 0x000001A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_14 [HR_3_28_14P] + Attributes: + RATE - Addr: 0x000001CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000001D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000001D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000001DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000001E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000001E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000001E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000001E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000001EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000001EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000001ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000001EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000001EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000001F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000001F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000001F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000001F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000001F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_13 [HR_3_27_13N] + Attributes: + RATE - Addr: 0x000001F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000001FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000001FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000001FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000001FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000201, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000202, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000204, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000020A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000020C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000020D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000213, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000215, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000216, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000217, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000218, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000219, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000021A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000021B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000021C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000021D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000021E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_13 [HR_3_26_13P] + Attributes: + RATE - Addr: 0x00000222, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000226, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000227, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000228, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000229, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000022B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000022C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000022E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000234, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000236, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000237, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000023D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000023F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000240, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000241, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000242, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000243, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000244, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000245, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000246, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000247, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000248, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_12 [HR_3_25_12N] + Attributes: + RATE - Addr: 0x0000024C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000250, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000251, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000252, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000253, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000255, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000256, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000258, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000025E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000260, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000261, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000267, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000269, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000026A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000026B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000026C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000026D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000026E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000026F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000270, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000271, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000272, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_12 [HR_3_24_12P] + Attributes: + RATE - Addr: 0x00000276, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000027A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000027B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000027C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000027D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000027F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000280, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000282, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000288, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000028A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000028B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000291, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000293, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000294, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000295, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000296, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000297, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000298, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000299, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000029A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000029B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000029C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_11 [HR_3_23_11N] + Attributes: + RATE - Addr: 0x000002A0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002A4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002A5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002A6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002A7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002A9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002AA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002AC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002B2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002B4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002B5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002BB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002BD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002BE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002BF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002C0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002C1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002C2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002C3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002C4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002C5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002C6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_11 [HR_3_22_11P] + Attributes: + RATE - Addr: 0x000002CA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002CE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002CF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002D0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002D1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002D3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002D4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000002D6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000002DC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000002DE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000002DF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000002E5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000002E7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000002E8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000002E9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000002EA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000002EB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000002EC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000002ED, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000002EE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000002EF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000002F0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_10 [HR_3_21_10N] + Attributes: + RATE - Addr: 0x000002F4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000002F8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000002F9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000002FA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000002FB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000002FD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000002FE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000300, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000306, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000308, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000309, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000030F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000311, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000312, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000313, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000314, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000315, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000316, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000317, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000318, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000319, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000031A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_10 [HR_3_20_10P] + Attributes: + RATE - Addr: 0x0000031E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000322, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000323, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000324, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000325, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000327, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000328, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000032A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000330, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000332, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000333, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000339, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000033B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000033C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000033D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000033E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000033F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000340, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000341, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000342, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000343, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000344, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_9 [HR_3_CC_19_9N] + Attributes: + RATE - Addr: 0x00000348, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000034C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000034D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000034E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000034F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000351, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000352, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000354, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000035A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000035C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000035D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000363, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000365, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000366, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000367, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000368, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000369, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000036A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000036B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000036C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000036D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000036E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_9 [HR_3_CC_18_9P] + Attributes: + RATE - Addr: 0x00000372, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000376, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000377, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000378, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000379, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000037B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000037C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000037E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000384, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000386, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000387, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000038D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000038F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000390, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000391, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000392, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000393, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000394, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000395, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000396, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000397, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000398, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_8 [HR_3_17_8N] + Attributes: + RATE - Addr: 0x0000039C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003A0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003A1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003A2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003A3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003A5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003A6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003A8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003AE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003B0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003B1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003B7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003B9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003BA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003BB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003BC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003BD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003BE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003BF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003C0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003C1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003C2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_8 [HR_3_16_8P] + Attributes: + RATE - Addr: 0x000003C6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003CA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003CB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003CC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003CD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003CF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003D0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003D2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000003D8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000003DA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000003DB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000003E1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000003E3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000003E4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000003E5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000003E6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000003E7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000003E8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000003E9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000003EA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000003EB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000003EC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_7 [HR_3_15_7N] + Attributes: + RATE - Addr: 0x000003F0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000003F4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000003F5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000003F6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000003F7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000003F9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000003FA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000003FC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000402, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000404, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000405, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000040B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000040D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000040E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000040F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000410, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000411, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000412, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000413, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000414, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000415, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000416, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_7 [HR_3_14_7P] + Attributes: + RATE - Addr: 0x0000041A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000041E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000041F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000420, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000421, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000423, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000424, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000426, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000042C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000042E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000042F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000435, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000437, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000438, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000439, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000043A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000043B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000043C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000043D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000043E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000043F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000440, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_6 [HR_3_13_6N] + Attributes: + RATE - Addr: 0x00000444, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000448, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000449, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000044A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000044B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000044D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000044E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000450, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000456, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000458, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000459, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000045F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000461, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000462, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000463, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000464, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000465, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000466, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000467, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000468, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000469, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000046A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_6 [HR_3_12_6P] + Attributes: + RATE - Addr: 0x0000046E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000472, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000473, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000474, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000475, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000477, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000478, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000047A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000480, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000482, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000483, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000489, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000048B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000048C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000048D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000048E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000048F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000490, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000491, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000492, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000493, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000494, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_5 [HR_3_11_5N] + Attributes: + RATE - Addr: 0x00000498, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000049C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000049D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000049E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000049F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004A1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004A2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004A4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004AA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004AC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004AD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004B3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004B5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004B6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004B7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004B8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004B9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004BA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004BB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004BC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004BD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004BE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_5 [HR_3_10_5P] + Attributes: + RATE - Addr: 0x000004C2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004C6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004C7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004C8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004C9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004CB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004CC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004CE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004D4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000004D6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000004D7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000004DD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000004DF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000004E0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000004E1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000004E2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000004E3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000004E4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000004E5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000004E6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000004E7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000004E8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_4 [HR_3_9_4N] + Attributes: + RATE - Addr: 0x000004EC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000004F0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000004F1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000004F2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000004F3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000004F5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000004F6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000004F8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000004FE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000500, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000501, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000507, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000509, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000050A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000050B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000050C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000050D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000050E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000050F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000510, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000511, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000512, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_4 [HR_3_8_4P] + Attributes: + RATE - Addr: 0x00000516, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000051A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000051B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000051C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000051D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000051F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000520, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000522, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000528, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000052A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000052B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000531, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000533, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000534, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000535, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000536, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000537, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000538, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000539, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000053A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000053B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000053C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_3 [HR_3_7_3N] + Attributes: + RATE - Addr: 0x00000540, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000544, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000545, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000546, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000547, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000549, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000054A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000054C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000552, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000554, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000555, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000055B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000055D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000055E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000055F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000560, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000561, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000562, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000563, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000564, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000565, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000566, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_3 [HR_3_6_3P] + Attributes: + RATE - Addr: 0x0000056A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000056E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000056F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000570, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000571, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000573, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000574, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000576, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000057C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000057E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000057F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000585, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000587, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000588, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000589, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000058A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000058B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000058C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000058D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000058E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000058F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000590, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_2 [HR_3_5_2N] + Attributes: + RATE - Addr: 0x00000594, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000598, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000599, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000059A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000059B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000059D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000059E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005A0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005A6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005A8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005A9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005AF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005B1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005B2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005B3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005B4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005B5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005B6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005B7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005B8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005B9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005BA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_2 [HR_3_4_2P] + Attributes: + RATE - Addr: 0x000005BE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005C2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005C3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005C4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005C5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005C7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005C8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005CA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005D0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005D2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005D3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000005D9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000005DB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000005DC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000005DD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000005DE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000005DF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000005E0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000005E1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000005E2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000005E3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000005E4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_1 [HR_3_3_1N] + Attributes: + RATE - Addr: 0x000005E8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000005EC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000005ED, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000005EE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000005EF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000005F1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000005F2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000005F4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000005FA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000005FC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000005FD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000603, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000605, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000606, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000607, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000608, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000609, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000060A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000060B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000060C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000060D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000060E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_1 [HR_3_2_1P] + Attributes: + RATE - Addr: 0x00000612, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000616, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000617, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000618, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000619, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000061B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000061C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000061E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000624, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000626, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000627, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000062D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000062F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000630, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000631, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000632, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000633, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000634, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000635, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000636, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000637, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000638, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_B_0 [HR_3_1_0N] + Attributes: + RATE - Addr: 0x0000063C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000640, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000641, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000642, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000643, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000645, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000646, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000648, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000064E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000650, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000651, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000657, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000659, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000065A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000065B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000065C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000065D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000065E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000065F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000660, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000661, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000662, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK0_A_0 [HR_3_0_0P] + Attributes: + RATE - Addr: 0x00000666, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000066A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000066B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000066C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000066D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000066F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000670, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000672, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000678, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000067A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000067B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000681, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000683, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000684, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000685, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000686, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000687, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000688, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000689, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000068A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000068B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000068C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_19 [HR_5_CC_39_19N] + Attributes: + RATE - Addr: 0x00000690, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000694, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000695, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000696, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000697, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000699, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000069A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000069C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006A2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006A4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006A5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006AB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006AD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006AE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006AF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006B0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006B1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006B2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006B3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006B4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006B5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006B6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_19 [HR_5_CC_38_19P] + Attributes: + RATE - Addr: 0x000006BA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006BE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006BF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006C0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006C1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006C3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006C4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006C6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006CC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006CE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006CF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006D5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000006D7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000006D8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000006D9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000006DA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000006DB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000006DC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000006DD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000006DE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000006DF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000006E0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_18 [HR_5_37_18N] + Attributes: + RATE - Addr: 0x000006E4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000006E8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000006E9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000006EA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000006EB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000006ED, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000006EE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000006F0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000006F6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000006F8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000006F9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000006FF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000701, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000702, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000703, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000704, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000705, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000706, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000707, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000708, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000709, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000070A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_18 [HR_5_36_18P] + Attributes: + RATE - Addr: 0x0000070E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000712, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000713, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000714, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000715, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000717, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000718, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000071A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000720, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000722, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000723, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000729, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000072B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000072C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000072D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000072E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000072F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000730, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000731, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000732, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000733, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000734, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_17 [HR_5_35_17N] + Attributes: + RATE - Addr: 0x00000738, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000073C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000073D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000073E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000073F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000741, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000742, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000744, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000074A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000074C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000074D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000753, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000755, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000756, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000757, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000758, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000759, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000075A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000075B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000075C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000075D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000075E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_17 [HR_5_34_17P] + Attributes: + RATE - Addr: 0x00000762, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000766, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000767, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000768, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000769, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000076B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000076C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000076E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000774, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000776, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000777, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000077D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000077F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000780, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000781, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000782, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000783, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000784, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000785, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000786, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000787, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000788, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_16 [HR_5_33_16N] + Attributes: + RATE - Addr: 0x0000078C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000790, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000791, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000792, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000793, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000795, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000796, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000798, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000079E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007A0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007A1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007A7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007A9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007AA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007AB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007AC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007AD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007AE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007AF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007B0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007B1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007B2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_16 [HR_5_32_16P] + Attributes: + RATE - Addr: 0x000007B6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007BA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007BB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007BC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007BD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007BF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007C0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007C2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007C8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007CA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007CB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007D1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007D3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007D4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007D5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000007D6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000007D7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000007D8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000007D9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000007DA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000007DB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000007DC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_15 [HR_5_31_15N] + Attributes: + RATE - Addr: 0x000007E0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000007E4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000007E5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000007E6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000007E7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000007E9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000007EA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000007EC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000007F2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000007F4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000007F5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000007FB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000007FD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000007FE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000007FF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000800, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000801, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000802, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000803, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000804, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000805, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000806, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_15 [HR_5_30_15P] + Attributes: + RATE - Addr: 0x0000080A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000080E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000080F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000810, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000811, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000813, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000814, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000816, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000081C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000081E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000081F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000825, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000827, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000828, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000829, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000082A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000082B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000082C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000082D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000082E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000082F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000830, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_14 [HR_5_29_14N] + Attributes: + RATE - Addr: 0x00000834, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000838, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000839, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000083A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000083B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000083D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000083E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000840, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000846, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000848, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000849, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000084F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000851, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000852, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000853, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000854, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000855, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000856, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000857, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000858, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000859, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000085A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_14 [HR_5_28_14P] + Attributes: + RATE - Addr: 0x0000085E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000862, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000863, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000864, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000865, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000867, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000868, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000086A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000870, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000872, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000873, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000879, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000087B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000087C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000087D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000087E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000087F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000880, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000881, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000882, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000883, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000884, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_13 [HR_5_27_13N] + Attributes: + RATE - Addr: 0x00000888, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000088C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000088D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000088E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000088F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000891, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000892, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000894, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000089A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000089C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000089D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008A3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008A5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008A6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008A7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008A8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008A9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008AA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008AB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008AC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008AD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008AE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_13 [HR_5_26_13P] + Attributes: + RATE - Addr: 0x000008B2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008B6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008B7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008B8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008B9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008BB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008BC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008BE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008C4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008C6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008C7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008CD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008CF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008D0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008D1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008D2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008D3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008D4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008D5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000008D6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000008D7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000008D8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_12 [HR_5_25_12N] + Attributes: + RATE - Addr: 0x000008DC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000008E0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000008E1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000008E2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000008E3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000008E5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000008E6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000008E8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000008EE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000008F0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000008F1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000008F7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000008F9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000008FA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000008FB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000008FC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000008FD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000008FE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000008FF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000900, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000901, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000902, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_12 [HR_5_24_12P] + Attributes: + RATE - Addr: 0x00000906, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000090A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000090B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000090C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000090D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000090F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000910, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000912, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000918, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000091A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000091B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000921, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000923, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000924, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000925, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000926, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000927, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000928, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000929, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000092A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000092B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000092C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_11 [HR_5_23_11N] + Attributes: + RATE - Addr: 0x00000930, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000934, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000935, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000936, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000937, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000939, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000093A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000093C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000942, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000944, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000945, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000094B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000094D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000094E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000094F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000950, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000951, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000952, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000953, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000954, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000955, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000956, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_11 [HR_5_22_11P] + Attributes: + RATE - Addr: 0x0000095A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000095E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000095F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000960, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000961, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000963, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000964, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000966, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000096C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000096E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000096F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000975, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000977, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000978, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000979, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000097A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000097B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000097C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000097D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000097E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000097F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000980, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_10 [HR_5_21_10N] + Attributes: + RATE - Addr: 0x00000984, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000988, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000989, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000098A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000098B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000098D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000098E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000990, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000996, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000998, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000999, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000099F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009A1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009A2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009A3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009A4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009A5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009A6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009A7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009A8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009A9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009AA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_10 [HR_5_20_10P] + Attributes: + RATE - Addr: 0x000009AE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009B2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009B3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009B4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009B5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009B7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009B8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009BA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009C0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009C2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009C3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009C9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009CB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009CC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009CD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009CE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009CF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009D0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009D1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009D2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009D3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009D4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_9 [HR_5_CC_19_9N] + Attributes: + RATE - Addr: 0x000009D8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000009DC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000009DD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000009DE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000009DF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000009E1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000009E2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000009E4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000009EA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000009EC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000009ED, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000009F3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000009F5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000009F6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000009F7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000009F8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000009F9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000009FA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000009FB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000009FC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000009FD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000009FE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_9 [HR_5_CC_18_9P] + Attributes: + RATE - Addr: 0x00000A02, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A06, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A07, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A08, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A09, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A0B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A0C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A0E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A14, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A16, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A17, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A1D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A1F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A20, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A21, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A22, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A23, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A24, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A25, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A26, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A27, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A28, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_8 [HR_5_17_8N] + Attributes: + RATE - Addr: 0x00000A2C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A30, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A31, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A32, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A33, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A35, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A36, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A38, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A3E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A40, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A41, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A47, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A49, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A4A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A4B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A4C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A4D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A4E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A4F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A50, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A51, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A52, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_8 [HR_5_16_8P] + Attributes: + RATE - Addr: 0x00000A56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000A76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000A77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000A78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000A79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000A7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000A7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000A7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_7 [HR_5_15_7N] + Attributes: + RATE - Addr: 0x00000A80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000A84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000A85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000A86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000A87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000A89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000A8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000A8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000A92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000A94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000A95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000A9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000A9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000A9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000A9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_7 [HR_5_14_7P] + Attributes: + RATE - Addr: 0x00000AAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000AB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000AB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000AB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000AB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000ABC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000ABE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000ABF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000ACA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000ACB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000ACC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000ACD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ACE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ACF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_6 [HR_5_13_6N] + Attributes: + RATE - Addr: 0x00000AD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000AD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000AD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ADA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ADB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ADD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000ADE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000AE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000AE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000AE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000AE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000AEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000AF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000AF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000AF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000AF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000AF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000AF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000AF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000AF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000AF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000AFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_6 [HR_5_12_6P] + Attributes: + RATE - Addr: 0x00000AFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_5 [HR_5_11_5N] + Attributes: + RATE - Addr: 0x00000B28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_5 [HR_5_10_5P] + Attributes: + RATE - Addr: 0x00000B52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000B76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000B77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000B78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_4 [HR_5_9_4N] + Attributes: + RATE - Addr: 0x00000B7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000B80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000B81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000B82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000B83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000B85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000B86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000B88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000B8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000B90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000B91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000B97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000B99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000B9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000B9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000B9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000B9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000B9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000B9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_4 [HR_5_8_4P] + Attributes: + RATE - Addr: 0x00000BA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000BAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000BAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000BAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000BB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000BB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000BBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000BBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000BC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000BC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000BC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000BC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000BC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BCA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BCB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BCC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_3 [HR_5_7_3N] + Attributes: + RATE - Addr: 0x00000BD0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BD4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BD5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000BD6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000BD7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000BD9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000BDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000BDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000BE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000BE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000BE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000BEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000BED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000BEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000BEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000BF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000BF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000BF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000BF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000BF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000BF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000BF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_3 [HR_5_6_3P] + Attributes: + RATE - Addr: 0x00000BFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000BFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000BFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_2 [HR_5_5_2N] + Attributes: + RATE - Addr: 0x00000C24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_2 [HR_5_4_2P] + Attributes: + RATE - Addr: 0x00000C4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_1 [HR_5_3_1N] + Attributes: + RATE - Addr: 0x00000C78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000C7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000C7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000C7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000C7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000C81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000C82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000C84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000C8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000C8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000C8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000C93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000C95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000C96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000C97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000C98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000C99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000C9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000C9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000C9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000C9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000C9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_1 [HR_5_2_1P] + Attributes: + RATE - Addr: 0x00000CA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000CAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000CAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000CB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000CB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000CBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000CC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000CC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000CC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000CC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000CC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_B_0 [HR_5_1_0N] + Attributes: + RATE - Addr: 0x00000CCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000CD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000CD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000CDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000CE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000CE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000CE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000CE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000CEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000CEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000CEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000CED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000CEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000CEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000CF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000CF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000CF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_GBOX_BK1_A_0 [HR_5_0_0P] + Attributes: + RATE - Addr: 0x00000CF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000CFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000CFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000CFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000CFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000CFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D00, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D02, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D08, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D0A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D0B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D11, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D13, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D14, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D15, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D16, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D17, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D18, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D19, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D1A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D1B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D1C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x00000D20, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x00000D21, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00000D22, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00000D23, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00000D24, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00000D25, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00000D26, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00000D27, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00000D28, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00000D29, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00000D2A, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00000D2B, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00000D2C, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00000D2D, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D2E, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D33, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D38, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D3D, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VR.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00000D42, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00000D47, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00000D4C, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00000D51, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_19 [HP_2_CC_39_19N] + Attributes: + RATE - Addr: 0x00000D56, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D5A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D5B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D5C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D5D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D5F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D60, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D62, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D68, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D6A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D6B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D71, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D73, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D74, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D75, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000D76, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000D77, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000D78, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000D79, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000D7A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000D7B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000D7C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_19 [HP_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00000D80, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000D84, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000D85, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000D86, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000D87, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000D89, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000D8A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000D8C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000D92, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000D94, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000D95, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000D9B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000D9D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000D9E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000D9F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DA0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DA1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DA2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DA3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DA4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DA5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DA6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_18 [HP_2_37_18N] + Attributes: + RATE - Addr: 0x00000DAA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DAE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DAF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DB0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DB1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DB3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DB4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DB6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DBC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DBE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DBF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DC5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DC7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DC8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DC9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DCA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DCB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DCC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DCD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DCE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DCF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DD0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_18 [HP_2_36_18P] + Attributes: + RATE - Addr: 0x00000DD4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000DD8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000DD9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000DDA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000DDB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000DDD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000DDE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000DE0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000DE6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000DE8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000DE9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000DEF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000DF1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000DF2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000DF3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000DF4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000DF5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000DF6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000DF7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000DF8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000DF9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000DFA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_17 [HP_2_35_17N] + Attributes: + RATE - Addr: 0x00000DFE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E02, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E03, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E04, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E05, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E07, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E08, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E0A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E10, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E12, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E13, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E19, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E1B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E1C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E1D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E1E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E1F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E20, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E21, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E22, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E23, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E24, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_17 [HP_2_34_17P] + Attributes: + RATE - Addr: 0x00000E28, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E2C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E2D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E2E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E2F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E31, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E32, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E34, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E3A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E3C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E3D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E43, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E45, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E46, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E47, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E48, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E49, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E4A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E4B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E4C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E4D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E4E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_16 [HP_2_33_16N] + Attributes: + RATE - Addr: 0x00000E52, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E56, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E57, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E58, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E59, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E5B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E5C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E5E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E64, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E66, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E67, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E6D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E6F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E70, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E71, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E72, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E73, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E74, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E75, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000E76, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000E77, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000E78, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_16 [HP_2_32_16P] + Attributes: + RATE - Addr: 0x00000E7C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000E80, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000E81, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000E82, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000E83, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000E85, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000E86, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000E88, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000E8E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000E90, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000E91, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000E97, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000E99, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000E9A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000E9B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000E9C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000E9D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000E9E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000E9F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EA0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EA1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EA2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_15 [HP_2_31_15N] + Attributes: + RATE - Addr: 0x00000EA6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EAA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EAB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000EAC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000EAD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000EAF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EB0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EB2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EB8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EBA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EBB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EC1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EC3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EC4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EC5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EC6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EC7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EC8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EC9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000ECA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000ECB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000ECC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_15 [HP_2_30_15P] + Attributes: + RATE - Addr: 0x00000ED0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000ED4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000ED5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000ED6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000ED7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000ED9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000EDA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000EDC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000EE2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000EE4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000EE5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000EEB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000EED, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000EEE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000EEF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000EF0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000EF1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000EF2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000EF3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000EF4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000EF5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000EF6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_14 [HP_2_29_14N] + Attributes: + RATE - Addr: 0x00000EFA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000EFE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000EFF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F00, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F01, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F03, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F04, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F06, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F0C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F0E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F0F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F15, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F17, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F18, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F19, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F1A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F1B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F1C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F1D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F1E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F1F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F20, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_14 [HP_2_28_14P] + Attributes: + RATE - Addr: 0x00000F24, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F28, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F29, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F2A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F2B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F2D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F2E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F30, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F36, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F38, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F39, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F3F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F41, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F42, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F43, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F44, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F45, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F46, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F47, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F48, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F49, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F4A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_13 [HP_2_27_13N] + Attributes: + RATE - Addr: 0x00000F4E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F52, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F53, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F54, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F55, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F57, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F58, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F5A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F60, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F62, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F63, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F69, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F6B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F6C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F6D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F6E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F6F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F70, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F71, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F72, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F73, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F74, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_13 [HP_2_26_13P] + Attributes: + RATE - Addr: 0x00000F78, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000F7C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000F7D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000F7E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000F7F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000F81, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000F82, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000F84, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000F8A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000F8C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000F8D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000F93, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000F95, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000F96, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000F97, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000F98, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000F99, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000F9A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000F9B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000F9C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000F9D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000F9E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_12 [HP_2_25_12N] + Attributes: + RATE - Addr: 0x00000FA2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FA6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FA7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FA8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FA9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FAB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FAC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FAE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FB4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FB6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FB7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FBD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FBF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FC0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FC1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FC2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FC3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FC4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FC5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FC6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FC7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FC8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_12 [HP_2_24_12P] + Attributes: + RATE - Addr: 0x00000FCC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FD0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FD1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FD2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FD3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FD5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00000FD6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00000FD8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00000FDE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00000FE0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00000FE1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00000FE7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00000FE9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00000FEA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00000FEB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00000FEC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00000FED, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00000FEE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00000FEF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00000FF0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00000FF1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00000FF2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_11 [HP_2_23_11N] + Attributes: + RATE - Addr: 0x00000FF6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00000FFA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00000FFB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00000FFC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00000FFD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00000FFF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001000, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001002, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001008, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000100A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000100B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001011, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001013, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001014, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001015, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001016, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001017, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001018, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001019, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000101A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000101B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000101C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_11 [HP_2_22_11P] + Attributes: + RATE - Addr: 0x00001020, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001024, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001025, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001026, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001027, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001029, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000102A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000102C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001032, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001034, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001035, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000103B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000103D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000103E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000103F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001040, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001041, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001042, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001043, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001044, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001045, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001046, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_10 [HP_2_21_10N] + Attributes: + RATE - Addr: 0x0000104A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000104E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000104F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001050, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001051, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001053, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001054, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001056, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000105C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000105E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000105F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001065, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001067, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001068, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001069, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000106A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000106B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000106C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000106D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000106E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000106F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001070, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_10 [HP_2_20_10P] + Attributes: + RATE - Addr: 0x00001074, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001078, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001079, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000107A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000107B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000107D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000107E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001080, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001086, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001088, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001089, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000108F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001091, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001092, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001093, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001094, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001095, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001096, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001097, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001098, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001099, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000109A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_9 [HP_2_CC_19_9N] + Attributes: + RATE - Addr: 0x0000109E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010A2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010A3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010A4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010A5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010A7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010A8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010AA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010B0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010B2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010B3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010B9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010BB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010BC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010BD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010BE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010BF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010C0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010C1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010C2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010C3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010C4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_9 [HP_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000010C8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010CC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010CD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010CE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010CF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010D1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010D2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010D4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000010DA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000010DC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000010DD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000010E3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000010E5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000010E6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000010E7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000010E8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000010E9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000010EA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000010EB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000010EC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000010ED, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000010EE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_8 [HP_2_17_8N] + Attributes: + RATE - Addr: 0x000010F2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000010F6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000010F7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000010F8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000010F9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000010FB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000010FC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000010FE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001104, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001106, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001107, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000110D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000110F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001110, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001111, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001112, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001113, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001114, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001115, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001116, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001117, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001118, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_8 [HP_2_16_8P] + Attributes: + RATE - Addr: 0x0000111C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001120, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001121, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001122, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001123, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001125, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001126, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001128, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000112E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001130, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001131, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001137, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001139, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000113A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000113B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000113C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000113D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000113E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000113F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001140, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001141, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001142, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_7 [HP_2_15_7N] + Attributes: + RATE - Addr: 0x00001146, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000114A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000114B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000114C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000114D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000114F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001150, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001152, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001158, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000115A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000115B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001161, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001163, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001164, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001165, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001166, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001167, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001168, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001169, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000116A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000116B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000116C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_7 [HP_2_14_7P] + Attributes: + RATE - Addr: 0x00001170, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001174, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001175, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001176, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001177, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001179, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000117A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000117C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001182, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001184, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001185, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000118B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000118D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000118E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000118F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001190, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001191, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001192, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001193, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001194, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001195, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001196, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_6 [HP_2_13_6N] + Attributes: + RATE - Addr: 0x0000119A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000119E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000119F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011A0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011A1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011A3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011A4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011A6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011AC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011AE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011AF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011B5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011B7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011B8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011B9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011BA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011BB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011BC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011BD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011BE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011BF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011C0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_6 [HP_2_12_6P] + Attributes: + RATE - Addr: 0x000011C4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011C8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011C9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011CA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011CB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011CD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011CE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011D0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000011D6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000011D8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000011D9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000011DF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000011E1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000011E2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000011E3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000011E4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000011E5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000011E6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000011E7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000011E8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000011E9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000011EA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_5 [HP_2_11_5N] + Attributes: + RATE - Addr: 0x000011EE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000011F2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000011F3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000011F4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000011F5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000011F7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000011F8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000011FA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001200, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001202, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001203, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001209, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000120B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000120C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000120D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000120E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000120F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001210, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001211, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001212, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001213, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001214, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_5 [HP_2_10_5P] + Attributes: + RATE - Addr: 0x00001218, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000121C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000121D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000121E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000121F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001221, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001222, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001224, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000122A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000122C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000122D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001233, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001235, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001236, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001237, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001238, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001239, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000123A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000123B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000123C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000123D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000123E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_4 [HP_2_9_4N] + Attributes: + RATE - Addr: 0x00001242, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001246, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001247, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001248, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001249, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000124B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000124C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000124E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001254, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001256, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001257, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000125D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000125F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001260, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001261, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001262, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001263, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001264, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001265, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001266, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001267, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001268, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_4 [HP_2_8_4P] + Attributes: + RATE - Addr: 0x0000126C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001270, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001271, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001272, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001273, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001275, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001276, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001278, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000127E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001280, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001281, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001287, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001289, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000128A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000128B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000128C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000128D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000128E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000128F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001290, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001291, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001292, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_3 [HP_2_7_3N] + Attributes: + RATE - Addr: 0x00001296, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000129A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000129B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000129C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000129D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000129F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012A0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012A2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012A8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012AA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012AB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012B1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012B3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012B4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012B5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012B6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012B7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012B8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012B9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012BA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012BB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012BC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_3 [HP_2_6_3P] + Attributes: + RATE - Addr: 0x000012C0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012C4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012C5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012C6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012C7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012C9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012CA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012CC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012D2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012D4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012D5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000012DB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000012DD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000012DE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000012DF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000012E0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000012E1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000012E2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000012E3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000012E4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000012E5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000012E6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_2 [HP_2_5_2N] + Attributes: + RATE - Addr: 0x000012EA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000012EE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000012EF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000012F0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000012F1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000012F3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000012F4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000012F6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000012FC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000012FE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000012FF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001305, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001307, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001308, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001309, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000130A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000130B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000130C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000130D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000130E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000130F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001310, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_2 [HP_2_4_2P] + Attributes: + RATE - Addr: 0x00001314, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001318, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001319, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000131A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000131B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000131D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000131E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001320, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001326, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001328, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001329, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000132F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001331, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001332, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001333, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001334, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001335, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001336, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001337, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001338, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001339, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000133A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_1 [HP_2_3_1N] + Attributes: + RATE - Addr: 0x0000133E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001342, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001343, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001344, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001345, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001347, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001348, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000134A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001350, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001352, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001353, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001359, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000135B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000135C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000135D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000135E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000135F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001360, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001361, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001362, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001363, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001364, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_1 [HP_2_2_1P] + Attributes: + RATE - Addr: 0x00001368, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000136C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000136D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000136E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000136F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001371, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001372, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001374, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000137A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000137C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000137D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001383, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001385, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001386, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001387, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001388, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001389, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000138A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000138B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000138C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000138D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000138E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_B_0 [HP_2_1_0N] + Attributes: + RATE - Addr: 0x00001392, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001396, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001397, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001398, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001399, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000139B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000139C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000139E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013A4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013A6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013A7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013AD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013AF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013B0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013B1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013B2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013B3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013B4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013B5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013B6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013B7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013B8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK1_A_0 [HP_2_0_0P] + Attributes: + RATE - Addr: 0x000013BC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013C0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013C1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013C2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013C3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013C5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013C6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013C8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013CE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013D0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013D1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000013D7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000013D9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000013DA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000013DB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000013DC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000013DD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000013DE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000013DF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000013E0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000013E1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000013E2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_19 [HP_1_CC_39_19N] + Attributes: + RATE - Addr: 0x000013E6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000013EA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000013EB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000013EC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000013ED, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000013EF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000013F0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000013F2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000013F8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000013FA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000013FB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001401, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001403, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001404, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001405, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001406, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001407, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001408, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001409, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000140A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000140B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000140C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_19 [HP_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001410, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001414, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001415, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001416, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001417, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001419, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000141A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000141C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001422, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001424, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001425, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000142B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000142D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000142E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000142F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001430, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001431, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001432, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001433, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001434, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001435, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001436, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_18 [HP_1_37_18N] + Attributes: + RATE - Addr: 0x0000143A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000143E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000143F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001440, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001441, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001443, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001444, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001446, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000144C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000144E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000144F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001455, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001457, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001458, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001459, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000145A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000145B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000145C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000145D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000145E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000145F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001460, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_18 [HP_1_36_18P] + Attributes: + RATE - Addr: 0x00001464, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001468, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001469, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000146A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000146B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000146D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000146E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001470, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001476, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001478, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001479, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000147F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001481, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001482, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001483, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001484, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001485, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001486, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001487, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001488, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001489, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000148A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_17 [HP_1_35_17N] + Attributes: + RATE - Addr: 0x0000148E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001492, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001493, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001494, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001495, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001497, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001498, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000149A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014A0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014A2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014A3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014A9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014AB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014AC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014AD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014AE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014AF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014B0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014B1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014B2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014B3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014B4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_17 [HP_1_34_17P] + Attributes: + RATE - Addr: 0x000014B8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014BC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014BD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014BE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014BF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014C1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014C2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014C4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014CA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014CC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014CD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014D3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014D5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000014D6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000014D7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000014D8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000014D9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000014DA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000014DB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000014DC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000014DD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000014DE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_16 [HP_1_33_16N] + Attributes: + RATE - Addr: 0x000014E2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000014E6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000014E7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000014E8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000014E9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000014EB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000014EC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000014EE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000014F4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000014F6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000014F7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000014FD, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000014FF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001500, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001501, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001502, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001503, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001504, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001505, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001506, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001507, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001508, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_16 [HP_1_32_16P] + Attributes: + RATE - Addr: 0x0000150C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001510, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001511, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001512, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001513, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001515, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001516, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001518, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000151E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001520, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001521, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001527, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001529, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000152A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000152B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000152C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000152D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000152E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000152F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001530, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001531, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001532, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_15 [HP_1_31_15N] + Attributes: + RATE - Addr: 0x00001536, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000153A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000153B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000153C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000153D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000153F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001540, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001542, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001548, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000154A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000154B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001551, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001553, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001554, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001555, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001556, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001557, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001558, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001559, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000155A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000155B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000155C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_15 [HP_1_30_15P] + Attributes: + RATE - Addr: 0x00001560, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001564, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001565, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001566, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001567, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001569, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000156A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000156C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001572, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001574, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001575, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000157B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000157D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000157E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000157F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001580, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001581, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001582, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001583, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001584, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001585, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001586, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_14 [HP_1_29_14N] + Attributes: + RATE - Addr: 0x0000158A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000158E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000158F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001590, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001591, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001593, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001594, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001596, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000159C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000159E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000159F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015A5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015A7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015A8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015A9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015AA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015AB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015AC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015AD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015AE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015AF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015B0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_14 [HP_1_28_14P] + Attributes: + RATE - Addr: 0x000015B4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015B8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015B9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015BA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015BB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015BD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015BE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015C0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015C6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015C8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015C9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015CF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015D1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015D2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015D3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015D4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015D5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000015D6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000015D7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000015D8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000015D9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000015DA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_13 [HP_1_27_13N] + Attributes: + RATE - Addr: 0x000015DE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000015E2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000015E3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000015E4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000015E5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000015E7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000015E8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000015EA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000015F0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000015F2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000015F3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000015F9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000015FB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000015FC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000015FD, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000015FE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000015FF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001600, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001601, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001602, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001603, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001604, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_13 [HP_1_26_13P] + Attributes: + RATE - Addr: 0x00001608, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000160C, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000160D, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000160E, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000160F, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001611, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001612, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001614, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000161A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000161C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000161D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001623, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001625, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001626, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001627, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001628, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001629, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000162A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000162B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000162C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000162D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000162E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_12 [HP_1_25_12N] + Attributes: + RATE - Addr: 0x00001632, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001636, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001637, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001638, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001639, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000163B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000163C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000163E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001644, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001646, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001647, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000164D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000164F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001650, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001651, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001652, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001653, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001654, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001655, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001656, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001657, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001658, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_12 [HP_1_24_12P] + Attributes: + RATE - Addr: 0x0000165C, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001660, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001661, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001662, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001663, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001665, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001666, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001668, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000166E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001670, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001671, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001677, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001679, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000167A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000167B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000167C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000167D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000167E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000167F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001680, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001681, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001682, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_11 [HP_1_23_11N] + Attributes: + RATE - Addr: 0x00001686, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000168A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000168B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000168C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000168D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000168F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001690, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001692, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001698, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000169A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000169B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016A1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016A3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016A4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016A5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016A6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016A7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016A8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016A9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016AA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016AB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016AC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_11 [HP_1_22_11P] + Attributes: + RATE - Addr: 0x000016B0, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016B4, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016B5, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016B6, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016B7, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016B9, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016BA, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016BC, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016C2, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016C4, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016C5, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016CB, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016CD, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016CE, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016CF, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016D0, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016D1, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016D2, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016D3, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016D4, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016D5, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000016D6, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_10 [HP_1_21_10N] + Attributes: + RATE - Addr: 0x000016DA, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000016DE, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000016DF, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000016E0, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000016E1, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000016E3, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000016E4, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000016E6, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000016EC, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000016EE, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000016EF, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000016F5, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000016F7, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000016F8, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000016F9, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000016FA, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000016FB, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000016FC, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000016FD, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000016FE, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000016FF, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001700, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_10 [HP_1_20_10P] + Attributes: + RATE - Addr: 0x00001704, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001708, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001709, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000170A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000170B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000170D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000170E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001710, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001716, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001718, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001719, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000171F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001721, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001722, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001723, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001724, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001725, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001726, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001727, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001728, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001729, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000172A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_9 [HP_1_CC_19_9N] + Attributes: + RATE - Addr: 0x0000172E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001732, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001733, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001734, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001735, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001737, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001738, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000173A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001740, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001742, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001743, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001749, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000174B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000174C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000174D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000174E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000174F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001750, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001751, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001752, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001753, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001754, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_9 [HP_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001758, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x0000175C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x0000175D, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x0000175E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x0000175F, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001761, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001762, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001764, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000176A, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x0000176C, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + RX_DLY - Addr: 0x0000176D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001773, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001775, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001776, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001777, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001778, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT], clk_buf [CLK_BUF] [CLK_BUF:GBOX_TOP_SRC==DEFAULT] } + DFEN - Addr: 0x00001779, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x0000177A, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x0000177B, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x0000177C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x0000177D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x0000177E, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_clk [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_8 [HP_1_17_8N] + Attributes: + RATE - Addr: 0x00001782, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001786, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001787, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001788, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001789, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000178B, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000178C, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000178E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001794, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001796, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001797, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000179D, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000179F, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017A0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017A1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017A2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017A3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017A4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017A5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017A6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017A7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017A8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_8 [HP_1_16_8P] + Attributes: + RATE - Addr: 0x000017AC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017B0, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017B1, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017B2, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017B3, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017B5, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017B6, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017B8, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017BE, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017C0, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017C1, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017C7, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017C9, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017CA, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017CB, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017CC, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017CD, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017CE, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017CF, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017D0, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017D1, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017D2, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_7 [HP_1_15_7N] + Attributes: + RATE - Addr: 0x000017D6, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000017DA, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000017DB, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000017DC, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000017DD, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000017DF, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000017E0, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000017E2, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000017E8, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000017EA, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000017EB, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000017F1, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000017F3, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000017F4, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000017F5, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000017F6, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000017F7, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000017F8, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000017F9, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000017FA, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000017FB, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000017FC, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_7 [HP_1_14_7P] + Attributes: + RATE - Addr: 0x00001800, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001804, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001805, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001806, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001807, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001809, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000180A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000180C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001812, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001814, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001815, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000181B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000181D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000181E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000181F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001820, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001821, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001822, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001823, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001824, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001825, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001826, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_6 [HP_1_13_6N] + Attributes: + RATE - Addr: 0x0000182A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000182E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000182F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001830, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001831, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001833, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001834, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001836, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000183C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000183E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000183F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001845, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001847, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001848, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001849, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000184A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000184B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000184C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000184D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000184E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000184F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001850, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_6 [HP_1_12_6P] + Attributes: + RATE - Addr: 0x00001854, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001858, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001859, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000185A, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000185B, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000185D, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000185E, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001860, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001866, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001868, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001869, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000186F, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001871, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001872, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001873, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001874, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001875, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001876, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001877, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001878, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001879, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000187A, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_5 [HP_1_11_5N] + Attributes: + RATE - Addr: 0x0000187E, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001882, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001883, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001884, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001885, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001887, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001888, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000188A, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001890, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001892, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001893, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001899, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000189B, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000189C, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000189D, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000189E, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000189F, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018A0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018A1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018A2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018A3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018A4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_5 [HP_1_10_5P] + Attributes: + RATE - Addr: 0x000018A8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018AC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018AD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018AE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018AF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018B1, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018B2, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018B4, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018BA, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018BC, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018BD, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018C3, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018C5, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018C6, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018C7, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018C8, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018C9, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018CA, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018CB, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018CC, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018CD, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018CE, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_4 [HP_1_9_4N] + Attributes: + RATE - Addr: 0x000018D2, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000018D6, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000018D7, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000018D8, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000018D9, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000018DB, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000018DC, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000018DE, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000018E4, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000018E6, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000018E7, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000018ED, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000018EF, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000018F0, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000018F1, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000018F2, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000018F3, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000018F4, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000018F5, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000018F6, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000018F7, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000018F8, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_4 [HP_1_8_4P] + Attributes: + RATE - Addr: 0x000018FC, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001900, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001901, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001902, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001903, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001905, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001906, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001908, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000190E, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001910, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001911, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001917, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001919, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000191A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000191B, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000191C, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000191D, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000191E, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000191F, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001920, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001921, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001922, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_3 [HP_1_7_3N] + Attributes: + RATE - Addr: 0x00001926, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000192A, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000192B, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000192C, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000192D, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000192F, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001930, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001932, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001938, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000193A, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000193B, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001941, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001943, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001944, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001945, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001946, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001947, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001948, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001949, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000194A, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000194B, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000194C, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_3 [HP_1_6_3P] + Attributes: + RATE - Addr: 0x00001950, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001954, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001955, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001956, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001957, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001959, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000195A, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000195C, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001962, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001964, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001965, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000196B, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000196D, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000196E, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000196F, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001970, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001971, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001972, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001973, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001974, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001975, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001976, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_2 [HP_1_5_2N] + Attributes: + RATE - Addr: 0x0000197A, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000197E, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000197F, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001980, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001981, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001983, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001984, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001986, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000198C, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000198E, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000198F, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001995, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001997, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001998, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001999, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000199A, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000199B, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000199C, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000199D, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000199E, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000199F, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019A0, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_2 [HP_1_4_2P] + Attributes: + RATE - Addr: 0x000019A4, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019A8, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019A9, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019AA, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019AB, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019AD, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019AE, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019B0, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019B6, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019B8, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000019B9, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019BF, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019C1, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019C2, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019C3, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019C4, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019C5, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019C6, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019C7, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019C8, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019C9, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019CA, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_1 [HP_1_3_1N] + Attributes: + RATE - Addr: 0x000019CE, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019D2, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019D3, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019D4, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019D5, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000019D7, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000019D8, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000019DA, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000019E0, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000019E2, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000019E3, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000019E9, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000019EB, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000019EC, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000019ED, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000019EE, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000019EF, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000019F0, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000019F1, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000019F2, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000019F3, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000019F4, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_1 [HP_1_2_1P] + Attributes: + RATE - Addr: 0x000019F8, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000019FC, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000019FD, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000019FE, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000019FF, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001A01, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001A02, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001A04, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A0A, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001A0C, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001A0D, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A13, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001A15, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001A16, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A17, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A18, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A19, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001A1A, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001A1B, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A1C, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A1D, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001A1E, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_B_0 [HP_1_1_0N] + Attributes: + RATE - Addr: 0x00001A22, Size: 4, Value: (0x00000003) 3 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A26, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A27, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A28, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A29, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A2B, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A2C, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A2E, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A34, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A36, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A37, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A3D, Size: 2, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A3F, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A40, Size: 1, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + RX_MODE - Addr: 0x00001A41, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001A42, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001A43, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A44, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A45, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001A46, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001A47, Size: 1, Value: (0x00000000) 0 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A48, Size: 4, Value: (0x00000001) 1 { $obuf$top.$obuf_dout [O_BUFT] [O_BUFT:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_GBOX_BK0_A_0 [HP_1_0_0P] + Attributes: + RATE - Addr: 0x00001A4C, Size: 4, Value: (0x00000003) 3 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MASTER_SLAVE - Addr: 0x00001A50, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PEER_IS_ON - Addr: 0x00001A51, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLOCK_IO - Addr: 0x00001A52, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DDR_MODE - Addr: 0x00001A53, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_BYPASS - Addr: 0x00001A55, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_CLK_PHASE - Addr: 0x00001A56, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_DLY - Addr: 0x00001A58, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001A5E, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_BYPASS - Addr: 0x00001A60, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_DLY - Addr: 0x00001A61, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001A67, Size: 2, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_MIPI_MODE - Addr: 0x00001A69, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + TX_MODE - Addr: 0x00001A6A, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001A6B, Size: 1, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + RX_CLOCK_IO - Addr: 0x00001A6C, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + DFEN - Addr: 0x00001A6D, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + SR - Addr: 0x00001A6E, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + PE - Addr: 0x00001A6F, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + PUD - Addr: 0x00001A70, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:WEAK_KEEPER==NONE] } + DFODTEN - Addr: 0x00001A71, Size: 1, Value: (0x00000000) 0 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } + MC - Addr: 0x00001A72, Size: 4, Value: (0x00000001) 1 { $ibuf$top.$ibuf_din [I_BUF] [I_BUF:IOSTANDARD==DEFAULT] } +Block u_GBOX_HP_40X2.u_HP_PGEN_dummy [] + Attributes: + hp_cfg_RCAL_MSTR_0 - Addr: 0x00001A76, Size: 1, Value: (0x00000000) 0 + hp_cfg_RCAL_MSTR_1 - Addr: 0x00001A77, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_0 - Addr: 0x00001A78, Size: 1, Value: (0x00000000) 0 + hp_cfg_EN_1 - Addr: 0x00001A79, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_0 - Addr: 0x00001A7A, Size: 1, Value: (0x00000000) 0 + hp_cfg_PGEN_1 - Addr: 0x00001A7B, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x00001A7C, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x00001A7D, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x00001A7E, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x00001A7F, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x00001A80, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x00001A81, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x00001A82, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x00001A83, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x00001A84, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x00001A85, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x00001A86, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x00001A87, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A88, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001A8D, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001A92, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001A97, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x00001A9C, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00001AA1, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00001AA6, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x00001AAB, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB0, Size: 6, Value: (0x00000023) 35 { pll [PLL] [ROOT_MUX_SEL:35] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_1 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AB6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_2 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ABC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_3 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_4 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AC8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_5 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ACE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_6 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AD4, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_7 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001ADA, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_8 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE0, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_9 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AE6, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_10 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AEC, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_11 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF2, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_12 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AF8, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_13 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001AFE, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_14 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B04, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_15 [] + Attributes: + ROOT_MUX_SEL - Addr: 0x00001B0A, Size: 6, Value: (0x0000003F) 63 +Block u_GBOX_HP_40X2.u_bank_osc [] + Attributes: + cfg_bank_osc_rsv - Addr: 0x00001B10, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_bgr - Addr: 0x00001B13, Size: 3, Value: (0x00000000) 0 + cfg_bank_osc_pd - Addr: 0x00001B16, Size: 1, Value: (0x00000000) 0 + cfg_bank_osc_ib_cop - Addr: 0x00001B17, Size: 2, Value: (0x00000000) 0 + cfg_bank_osc_cal - Addr: 0x00001B19, Size: 6, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B1F, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_DSKEWCALIN - Addr: 0x00001B20, Size: 12, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_DSKEWCALCNT - Addr: 0x00001B2C, Size: 3, Value: (0x00000002) 2 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_DSKEWFASTCAL - Addr: 0x00001B2F, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_DSKEWCALEN - Addr: 0x00001B30, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_FRAC - Addr: 0x00001B31, Size: 24, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_FBDIV - Addr: 0x00001B49, Size: 12, Value: (0x00000010) 16 { pll [PLL] [pll_FBDIV:16] [from HP_1_CC_18_9P] } + pll_REFDIV - Addr: 0x00001B55, Size: 6, Value: (0x00000001) 1 { pll [PLL] [pll_REFDIV:1] [from HP_1_CC_18_9P] } + pll_PLLEN - Addr: 0x00001B5B, Size: 1, Value: (0x00000000) 0 { pll [PLL] [pll_PLLEN:0] [from HP_1_CC_18_9P] } + pll_POSTDIV1 - Addr: 0x00001B5C, Size: 3, Value: (0x00000002) 2 { pll [PLL] [pll_POSTDIV1:2] [from HP_1_CC_18_9P] } + pll_POSTDIV2 - Addr: 0x00001B5F, Size: 3, Value: (0x00000002) 2 { pll [PLL] [pll_POSTDIV2:2] [from HP_1_CC_18_9P] } + pll_DSMEN - Addr: 0x00001B62, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } + pll_DACEN - Addr: 0x00001B63, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLL_SRC==DEFAULT] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_0 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001B64, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001B65, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001B67, Size: 2, Value: (0x00000000) 0 { pll [PLL] [PLL:PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0] [from HP_1_CC_18_9P] } + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001B69, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0] [from HP_1_CC_18_9P] } + cfg_pllref_use_hv - Addr: 0x00001B6A, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0] [from HP_1_CC_18_9P] } + cfg_pllref_use_rosc - Addr: 0x00001B6B, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0] [from HP_1_CC_18_9P] } + cfg_pllref_use_div - Addr: 0x00001B6C, Size: 1, Value: (0x00000000) 0 { pll [PLL] [PLL:PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0] [from HP_1_CC_18_9P] } +Block u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_1 [] + Attributes: + pll_DSKEWCALBYP - Addr: 0x00001B6D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALIN - Addr: 0x00001B6E, Size: 12, Value: (0x00000000) 0 + pll_DSKEWCALCNT - Addr: 0x00001B7A, Size: 3, Value: (0x00000000) 0 + pll_DSKEWFASTCAL - Addr: 0x00001B7D, Size: 1, Value: (0x00000000) 0 + pll_DSKEWCALEN - Addr: 0x00001B7E, Size: 1, Value: (0x00000000) 0 + pll_FRAC - Addr: 0x00001B7F, Size: 24, Value: (0x00000000) 0 + pll_FBDIV - Addr: 0x00001B97, Size: 12, Value: (0x00000000) 0 + pll_REFDIV - Addr: 0x00001BA3, Size: 6, Value: (0x00000000) 0 + pll_PLLEN - Addr: 0x00001BA9, Size: 1, Value: (0x00000000) 0 + pll_POSTDIV1 - Addr: 0x00001BAA, Size: 3, Value: (0x00000000) 0 + pll_POSTDIV2 - Addr: 0x00001BAD, Size: 3, Value: (0x00000000) 0 + pll_DSMEN - Addr: 0x00001BB0, Size: 1, Value: (0x00000000) 0 + pll_DACEN - Addr: 0x00001BB1, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HP_40X2.u_gbox_pll_refmux_1 [] + Attributes: + cfg_pllref_hv_rx_io_sel - Addr: 0x00001BB2, Size: 1, Value: (0x00000000) 0 + cfg_pllref_hv_bank_rx_io_sel - Addr: 0x00001BB3, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_rx_io_sel - Addr: 0x00001BB5, Size: 2, Value: (0x00000000) 0 + cfg_pllref_hp_bank_rx_io_sel - Addr: 0x00001BB7, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_hv - Addr: 0x00001BB8, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_rosc - Addr: 0x00001BB9, Size: 1, Value: (0x00000000) 0 + cfg_pllref_use_div - Addr: 0x00001BBA, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_19 [HR_1_CC_39_19N] + Attributes: + RATE - Addr: 0x00001BBB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BBF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BC0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BC1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BC2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BC4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BC5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BC7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BCD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BCF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BD0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001BD6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001BD8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001BD9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001BDA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001BDB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001BDC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001BDD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001BDE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001BDF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001BE0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001BE1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_19 [HR_1_CC_38_19P] + Attributes: + RATE - Addr: 0x00001BE5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001BE9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001BEA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001BEB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001BEC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001BEE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001BEF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001BF1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001BF7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001BF9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001BFA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C00, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C02, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C03, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C04, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C05, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C06, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C07, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C08, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C09, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C0A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C0B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_18 [HR_1_37_18N] + Attributes: + RATE - Addr: 0x00001C0F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C13, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C14, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C15, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C16, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C18, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C19, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C1B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C21, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C23, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C24, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C2A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C2C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C2D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C2E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C2F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C30, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C31, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C32, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C33, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C34, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C35, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_18 [HR_1_36_18P] + Attributes: + RATE - Addr: 0x00001C39, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C3D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C3E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C3F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C40, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C42, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C43, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C45, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C4B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C4D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C4E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C54, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C56, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C57, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C58, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C59, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C5A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C5B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C5C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C5D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C5E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C5F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_17 [HR_1_35_17N] + Attributes: + RATE - Addr: 0x00001C63, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C67, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C68, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C69, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C6A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C6C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C6D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C6F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C75, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001C77, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001C78, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001C7E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001C80, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001C81, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001C82, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001C83, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001C84, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001C85, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001C86, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001C87, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001C88, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001C89, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_17 [HR_1_34_17P] + Attributes: + RATE - Addr: 0x00001C8D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001C91, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001C92, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001C93, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001C94, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001C96, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001C97, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001C99, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001C9F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CA1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CA2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CA8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CAA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CAB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CAC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CAD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CAE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CAF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CB0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CB1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CB2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CB3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_16 [HR_1_33_16N] + Attributes: + RATE - Addr: 0x00001CB7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CBB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CBC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CBD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CBE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CC0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CC1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CC3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CC9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CCB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CCC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CD2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CD4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CD5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001CD6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001CD7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001CD8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001CD9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001CDA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001CDB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001CDC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001CDD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_16 [HR_1_32_16P] + Attributes: + RATE - Addr: 0x00001CE1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001CE5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001CE6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001CE7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001CE8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001CEA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001CEB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001CED, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001CF3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001CF5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001CF6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001CFC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001CFE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001CFF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D00, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D01, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D02, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D03, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D04, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D05, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D06, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D07, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_15 [HR_1_31_15N] + Attributes: + RATE - Addr: 0x00001D0B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D0F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D10, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D11, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D12, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D14, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D15, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D17, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D1D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D1F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D20, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D26, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D28, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D29, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D2A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D2B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D2C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D2D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D2E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D2F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D30, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D31, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_15 [HR_1_30_15P] + Attributes: + RATE - Addr: 0x00001D35, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D39, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D3A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D3B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D3C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D3E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D3F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D41, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D47, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D49, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D4A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D50, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D52, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D53, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D54, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D55, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D56, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D57, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D58, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D59, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D5A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D5B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_14 [HR_1_29_14N] + Attributes: + RATE - Addr: 0x00001D5F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D63, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D64, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D65, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D66, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D68, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D69, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D6B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D71, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D73, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D74, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001D7A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001D7C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001D7D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001D7E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001D7F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001D80, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001D81, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001D82, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001D83, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001D84, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001D85, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_14 [HR_1_28_14P] + Attributes: + RATE - Addr: 0x00001D89, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001D8D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001D8E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001D8F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001D90, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001D92, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001D93, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001D95, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001D9B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001D9D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001D9E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DA4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DA6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DA7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DA8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DA9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DAA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DAB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DAC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DAD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DAE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DAF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_13 [HR_1_27_13N] + Attributes: + RATE - Addr: 0x00001DB3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DB7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DB8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DB9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DBA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DBC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DBD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DBF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DC5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DC7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DC8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DCE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DD0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DD1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DD2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DD3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DD4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DD5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001DD6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001DD7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001DD8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001DD9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_13 [HR_1_26_13P] + Attributes: + RATE - Addr: 0x00001DDD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001DE1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001DE2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001DE3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001DE4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001DE6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001DE7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001DE9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001DEF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001DF1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001DF2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001DF8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001DFA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001DFB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001DFC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001DFD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001DFE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001DFF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E00, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E01, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E02, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E03, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_12 [HR_1_25_12N] + Attributes: + RATE - Addr: 0x00001E07, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E0B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E0C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E0D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E0E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E10, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E11, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E13, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E19, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E1B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E1C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E22, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E24, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E25, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E26, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E27, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E28, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E29, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E2A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E2B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E2C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E2D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_12 [HR_1_24_12P] + Attributes: + RATE - Addr: 0x00001E31, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E35, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E36, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E37, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E38, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E3A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E3B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E3D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E43, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E45, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E46, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E4C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E4E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E4F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E50, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E51, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E52, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E53, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E54, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E55, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E56, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E57, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_11 [HR_1_23_11N] + Attributes: + RATE - Addr: 0x00001E5B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E5F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E60, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E61, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E62, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E64, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E65, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E67, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E6D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E6F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E70, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001E76, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001E78, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001E79, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001E7A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001E7B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001E7C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001E7D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001E7E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001E7F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001E80, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001E81, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_11 [HR_1_22_11P] + Attributes: + RATE - Addr: 0x00001E85, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001E89, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001E8A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001E8B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001E8C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001E8E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001E8F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001E91, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001E97, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001E99, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001E9A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EA0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EA2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EA3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EA4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EA5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EA6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EA7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EA8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EA9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EAA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EAB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_10 [HR_1_21_10N] + Attributes: + RATE - Addr: 0x00001EAF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EB3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EB4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EB5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EB6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EB8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EB9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EBB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EC1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EC3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EC4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001ECA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001ECC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001ECD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001ECE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001ECF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001ED0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001ED1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001ED2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001ED3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001ED4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001ED5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_10 [HR_1_20_10P] + Attributes: + RATE - Addr: 0x00001ED9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001EDD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001EDE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001EDF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001EE0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001EE2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001EE3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001EE5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001EEB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001EED, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001EEE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001EF4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001EF6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001EF7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001EF8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001EF9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001EFA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001EFB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001EFC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001EFD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001EFE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001EFF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_9 [HR_1_CC_19_9N] + Attributes: + RATE - Addr: 0x00001F03, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F07, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F08, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F09, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F0A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F0C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F0D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F0F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F15, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F17, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F18, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F1E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F20, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F21, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F22, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F23, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F24, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F25, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F26, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F27, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F28, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F29, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_9 [HR_1_CC_18_9P] + Attributes: + RATE - Addr: 0x00001F2D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F31, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F32, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F33, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F34, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F36, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F37, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F39, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F3F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F41, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F42, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F48, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F4A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F4B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F4C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F4D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F4E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F4F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F50, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F51, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F52, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F53, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_8 [HR_1_17_8N] + Attributes: + RATE - Addr: 0x00001F57, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F5B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F5C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F5D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F5E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F60, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F61, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F63, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F69, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F6B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F6C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F72, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F74, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F75, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001F76, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001F77, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001F78, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001F79, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001F7A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001F7B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001F7C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001F7D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_8 [HR_1_16_8P] + Attributes: + RATE - Addr: 0x00001F81, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001F85, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001F86, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001F87, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001F88, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001F8A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001F8B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001F8D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001F93, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001F95, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001F96, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001F9C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001F9E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001F9F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FA0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FA1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FA2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FA3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FA4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FA5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FA6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FA7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_7 [HR_1_15_7N] + Attributes: + RATE - Addr: 0x00001FAB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FAF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FB0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FB1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FB2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FB4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FB5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FB7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FBD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FBF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FC0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FC6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FC8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FC9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FCA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FCB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FCC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FCD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FCE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FCF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FD0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FD1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_7 [HR_1_14_7P] + Attributes: + RATE - Addr: 0x00001FD5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00001FD9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00001FDA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00001FDB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00001FDC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00001FDE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00001FDF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00001FE1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00001FE7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00001FE9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00001FEA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00001FF0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00001FF2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00001FF3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00001FF4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00001FF5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00001FF6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00001FF7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00001FF8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00001FF9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00001FFA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00001FFB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_6 [HR_1_13_6N] + Attributes: + RATE - Addr: 0x00001FFF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002003, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002004, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002005, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002006, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002008, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002009, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000200B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002011, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002013, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002014, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000201A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000201C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000201D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000201E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000201F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002020, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002021, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002022, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002023, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002024, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002025, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_6 [HR_1_12_6P] + Attributes: + RATE - Addr: 0x00002029, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000202D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000202E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000202F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002030, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002032, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002033, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002035, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000203B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000203D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000203E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002044, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002046, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002047, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002048, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002049, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000204A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000204B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000204C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000204D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000204E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000204F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_5 [HR_1_11_5N] + Attributes: + RATE - Addr: 0x00002053, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002057, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002058, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002059, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000205A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000205C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000205D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000205F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002065, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002067, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002068, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000206E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002070, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002071, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002072, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002073, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002074, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002075, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002076, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002077, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002078, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002079, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_5 [HR_1_10_5P] + Attributes: + RATE - Addr: 0x0000207D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002081, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002082, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002083, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002084, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002086, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002087, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002089, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000208F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002091, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002092, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002098, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000209A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000209B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000209C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000209D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000209E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000209F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020A0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020A1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020A2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020A3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_4 [HR_1_9_4N] + Attributes: + RATE - Addr: 0x000020A7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020AB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020AC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020AD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020AE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020B0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020B1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020B3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020B9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020BB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020BC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020C2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020C4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020C5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020C6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020C7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020C8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020C9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020CA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020CB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020CC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020CD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_4 [HR_1_8_4P] + Attributes: + RATE - Addr: 0x000020D1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020D5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000020D6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000020D7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000020D8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000020DA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000020DB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000020DD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000020E3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000020E5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000020E6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000020EC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000020EE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000020EF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000020F0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000020F1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000020F2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000020F3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000020F4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000020F5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000020F6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000020F7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_3 [HR_1_7_3N] + Attributes: + RATE - Addr: 0x000020FB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000020FF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002100, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002101, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002102, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002104, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002105, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002107, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000210D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000210F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002110, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002116, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002118, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002119, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000211A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000211B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000211C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000211D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000211E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000211F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002120, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002121, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_3 [HR_1_6_3P] + Attributes: + RATE - Addr: 0x00002125, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002129, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000212A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000212B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000212C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000212E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000212F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002131, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002137, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002139, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000213A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002140, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002142, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002143, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002144, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002145, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002146, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002147, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002148, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002149, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000214A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000214B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_2 [HR_1_5_2N] + Attributes: + RATE - Addr: 0x0000214F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002153, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002154, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002155, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002156, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002158, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002159, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000215B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002161, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002163, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002164, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000216A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000216C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000216D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000216E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000216F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002170, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002171, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002172, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002173, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002174, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002175, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_2 [HR_1_4_2P] + Attributes: + RATE - Addr: 0x00002179, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000217D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000217E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000217F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002180, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002182, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002183, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002185, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000218B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000218D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000218E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002194, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002196, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002197, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002198, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002199, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000219A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000219B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000219C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000219D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000219E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000219F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_1 [HR_1_3_1N] + Attributes: + RATE - Addr: 0x000021A3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021A7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021A8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021A9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021AA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021AC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021AD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021AF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021B5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021B7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021B8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021BE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021C0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021C1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021C2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021C3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021C4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021C5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021C6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021C7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021C8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021C9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_1 [HR_1_2_1P] + Attributes: + RATE - Addr: 0x000021CD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021D1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021D2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021D3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021D4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000021D6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000021D7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000021D9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000021DF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000021E1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000021E2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000021E8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000021EA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000021EB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000021EC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000021ED, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000021EE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000021EF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000021F0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000021F1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000021F2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000021F3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_B_0 [HR_1_1_0N] + Attributes: + RATE - Addr: 0x000021F7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000021FB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000021FC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000021FD, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000021FE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002200, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002201, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002203, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002209, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000220B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000220C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002212, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002214, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002215, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002216, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002217, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002218, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002219, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000221A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000221B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000221C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000221D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK0_A_0 [HR_1_0_0P] + Attributes: + RATE - Addr: 0x00002221, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002225, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002226, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002227, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002228, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000222A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000222B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000222D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002233, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002235, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002236, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000223C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000223E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000223F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002240, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002241, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002242, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002243, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002244, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002245, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002246, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002247, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_19 [HR_2_CC_39_19N] + Attributes: + RATE - Addr: 0x0000224B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000224F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002250, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002251, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002252, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002254, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002255, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002257, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000225D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000225F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002260, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002266, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002268, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002269, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000226A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000226B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000226C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000226D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000226E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000226F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002270, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002271, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_19 [HR_2_CC_38_19P] + Attributes: + RATE - Addr: 0x00002275, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002279, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000227A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000227B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000227C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000227E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000227F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002281, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002287, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002289, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000228A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002290, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002292, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002293, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002294, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002295, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002296, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002297, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002298, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002299, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000229A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000229B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_18 [HR_2_37_18N] + Attributes: + RATE - Addr: 0x0000229F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022A3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022A4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022A5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022A6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022A8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022A9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022AB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022B1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022B3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022B4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022BA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022BC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022BD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022BE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022BF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022C0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022C1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022C2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022C3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022C4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022C5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_18 [HR_2_36_18P] + Attributes: + RATE - Addr: 0x000022C9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022CD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022CE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022CF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022D0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022D2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022D3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022D5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000022DB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000022DD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000022DE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000022E4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000022E6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000022E7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000022E8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000022E9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000022EA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000022EB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000022EC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000022ED, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000022EE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000022EF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_17 [HR_2_35_17N] + Attributes: + RATE - Addr: 0x000022F3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000022F7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000022F8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000022F9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000022FA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000022FC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000022FD, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000022FF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002305, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002307, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002308, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000230E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002310, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002311, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002312, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002313, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002314, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002315, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002316, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002317, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002318, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002319, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_17 [HR_2_34_17P] + Attributes: + RATE - Addr: 0x0000231D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002321, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002322, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002323, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002324, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002326, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002327, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002329, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000232F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002331, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002332, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002338, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000233A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000233B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000233C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000233D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000233E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000233F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002340, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002341, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002342, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002343, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_16 [HR_2_33_16N] + Attributes: + RATE - Addr: 0x00002347, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000234B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000234C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000234D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000234E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002350, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002351, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002353, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002359, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000235B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000235C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002362, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002364, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002365, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002366, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002367, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002368, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002369, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000236A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000236B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000236C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000236D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_16 [HR_2_32_16P] + Attributes: + RATE - Addr: 0x00002371, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002375, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002376, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002377, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002378, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000237A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000237B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000237D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002383, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002385, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002386, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000238C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000238E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000238F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002390, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002391, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002392, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002393, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002394, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002395, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002396, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002397, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_15 [HR_2_31_15N] + Attributes: + RATE - Addr: 0x0000239B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000239F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023A0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023A1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023A2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023A4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023A5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023A7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023AD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023AF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023B0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023B6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023B8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023B9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023BA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023BB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023BC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023BD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023BE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023BF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023C0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023C1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_15 [HR_2_30_15P] + Attributes: + RATE - Addr: 0x000023C5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023C9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023CA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023CB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023CC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023CE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023CF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023D1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000023D7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000023D9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000023DA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000023E0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000023E2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000023E3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000023E4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000023E5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000023E6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000023E7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000023E8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000023E9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000023EA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000023EB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_14 [HR_2_29_14N] + Attributes: + RATE - Addr: 0x000023EF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000023F3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000023F4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000023F5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000023F6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000023F8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000023F9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000023FB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002401, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002403, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002404, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000240A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000240C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000240D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000240E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000240F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002410, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002411, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002412, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002413, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002414, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002415, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_14 [HR_2_28_14P] + Attributes: + RATE - Addr: 0x00002419, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000241D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000241E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000241F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002420, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002422, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002423, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002425, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000242B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000242D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000242E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002434, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002436, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002437, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002438, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002439, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000243A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000243B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000243C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000243D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000243E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000243F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_13 [HR_2_27_13N] + Attributes: + RATE - Addr: 0x00002443, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002447, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002448, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002449, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000244A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000244C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000244D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000244F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002455, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002457, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002458, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000245E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002460, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002461, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002462, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002463, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002464, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002465, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002466, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002467, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002468, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002469, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_13 [HR_2_26_13P] + Attributes: + RATE - Addr: 0x0000246D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002471, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002472, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002473, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002474, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002476, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002477, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002479, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000247F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002481, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002482, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002488, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000248A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000248B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000248C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000248D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000248E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000248F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002490, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002491, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002492, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002493, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_12 [HR_2_25_12N] + Attributes: + RATE - Addr: 0x00002497, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000249B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000249C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000249D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000249E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024A0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024A1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024A3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024A9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024AB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024AC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024B2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024B4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024B5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024B6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024B7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024B8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024B9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024BA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024BB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024BC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024BD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_12 [HR_2_24_12P] + Attributes: + RATE - Addr: 0x000024C1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024C5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024C6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024C7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024C8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024CA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024CB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024CD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024D3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024D5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000024D6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000024DC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000024DE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000024DF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000024E0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000024E1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000024E2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000024E3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000024E4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000024E5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000024E6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000024E7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_11 [HR_2_23_11N] + Attributes: + RATE - Addr: 0x000024EB, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000024EF, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000024F0, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000024F1, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000024F2, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000024F4, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000024F5, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000024F7, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000024FD, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000024FF, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002500, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002506, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002508, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002509, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000250A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000250B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000250C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000250D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000250E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000250F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002510, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002511, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_11 [HR_2_22_11P] + Attributes: + RATE - Addr: 0x00002515, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002519, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000251A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000251B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000251C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000251E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000251F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002521, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002527, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002529, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000252A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002530, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002532, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002533, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002534, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002535, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002536, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002537, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002538, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002539, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000253A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000253B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_10 [HR_2_21_10N] + Attributes: + RATE - Addr: 0x0000253F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002543, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002544, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002545, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002546, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002548, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002549, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000254B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002551, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002553, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002554, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000255A, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000255C, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000255D, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000255E, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000255F, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002560, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002561, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002562, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002563, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002564, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002565, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_10 [HR_2_20_10P] + Attributes: + RATE - Addr: 0x00002569, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000256D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000256E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000256F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002570, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002572, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002573, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002575, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000257B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000257D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000257E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002584, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002586, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002587, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002588, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002589, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000258A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000258B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000258C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000258D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000258E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000258F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_9 [HR_2_CC_19_9N] + Attributes: + RATE - Addr: 0x00002593, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002597, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002598, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002599, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000259A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000259C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000259D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000259F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025A5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025A7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025A8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025AE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025B0, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025B1, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025B2, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025B3, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025B4, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025B5, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025B6, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025B7, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025B8, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025B9, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_9 [HR_2_CC_18_9P] + Attributes: + RATE - Addr: 0x000025BD, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025C1, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025C2, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025C3, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025C4, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025C6, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025C7, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025C9, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025CF, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025D1, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025D2, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000025D8, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000025DA, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000025DB, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000025DC, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000025DD, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000025DE, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000025DF, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000025E0, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000025E1, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000025E2, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000025E3, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_8 [HR_2_17_8N] + Attributes: + RATE - Addr: 0x000025E7, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000025EB, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000025EC, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000025ED, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000025EE, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000025F0, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000025F1, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000025F3, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000025F9, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000025FB, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000025FC, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002602, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002604, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002605, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002606, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002607, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002608, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002609, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000260A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000260B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000260C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000260D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_8 [HR_2_16_8P] + Attributes: + RATE - Addr: 0x00002611, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002615, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002616, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002617, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002618, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000261A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000261B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000261D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002623, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002625, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002626, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000262C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000262E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000262F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002630, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002631, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002632, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002633, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002634, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002635, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002636, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002637, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_7 [HR_2_15_7N] + Attributes: + RATE - Addr: 0x0000263B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000263F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002640, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002641, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002642, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002644, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002645, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002647, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000264D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000264F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002650, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002656, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002658, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002659, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000265A, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000265B, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000265C, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000265D, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000265E, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000265F, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002660, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002661, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_7 [HR_2_14_7P] + Attributes: + RATE - Addr: 0x00002665, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002669, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000266A, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000266B, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000266C, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000266E, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000266F, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002671, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002677, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002679, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000267A, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002680, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002682, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002683, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002684, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002685, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002686, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002687, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002688, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002689, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000268A, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000268B, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_6 [HR_2_13_6N] + Attributes: + RATE - Addr: 0x0000268F, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002693, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002694, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002695, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002696, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002698, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002699, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000269B, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026A1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026A3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026A4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026AA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026AC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026AD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026AE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026AF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026B0, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026B1, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026B2, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026B3, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026B4, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026B5, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_6 [HR_2_12_6P] + Attributes: + RATE - Addr: 0x000026B9, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026BD, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026BE, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026BF, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026C0, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026C2, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026C3, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026C5, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026CB, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026CD, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026CE, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026D4, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000026D6, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000026D7, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000026D8, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000026D9, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000026DA, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000026DB, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000026DC, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000026DD, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000026DE, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000026DF, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_5 [HR_2_11_5N] + Attributes: + RATE - Addr: 0x000026E3, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000026E7, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000026E8, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000026E9, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000026EA, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000026EC, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000026ED, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000026EF, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000026F5, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000026F7, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000026F8, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000026FE, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002700, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002701, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002702, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002703, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002704, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002705, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002706, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002707, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002708, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002709, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_5 [HR_2_10_5P] + Attributes: + RATE - Addr: 0x0000270D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002711, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002712, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002713, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002714, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002716, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002717, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002719, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000271F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002721, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002722, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002728, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000272A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000272B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000272C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000272D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000272E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000272F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002730, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002731, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002732, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002733, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_4 [HR_2_9_4N] + Attributes: + RATE - Addr: 0x00002737, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000273B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000273C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000273D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000273E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002740, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002741, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002743, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002749, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000274B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000274C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002752, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002754, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002755, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002756, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002757, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002758, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002759, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000275A, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000275B, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000275C, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000275D, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_4 [HR_2_8_4P] + Attributes: + RATE - Addr: 0x00002761, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002765, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002766, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002767, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002768, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000276A, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000276B, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000276D, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002773, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002775, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002776, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000277C, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000277E, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000277F, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002780, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002781, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002782, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002783, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002784, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002785, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002786, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002787, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_3 [HR_2_7_3N] + Attributes: + RATE - Addr: 0x0000278B, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000278F, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002790, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002791, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002792, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002794, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002795, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002797, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000279D, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000279F, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027A0, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027A6, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027A8, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027A9, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027AA, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027AB, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027AC, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027AD, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027AE, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027AF, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027B0, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027B1, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_3 [HR_2_6_3P] + Attributes: + RATE - Addr: 0x000027B5, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027B9, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027BA, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027BB, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027BC, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027BE, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027BF, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027C1, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027C7, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027C9, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027CA, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027D0, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027D2, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027D3, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027D4, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027D5, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000027D6, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000027D7, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000027D8, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000027D9, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000027DA, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000027DB, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_2 [HR_2_5_2N] + Attributes: + RATE - Addr: 0x000027DF, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000027E3, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000027E4, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000027E5, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000027E6, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000027E8, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000027E9, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000027EB, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000027F1, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000027F3, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000027F4, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000027FA, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000027FC, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000027FD, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000027FE, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000027FF, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002800, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002801, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002802, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002803, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002804, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002805, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_2 [HR_2_4_2P] + Attributes: + RATE - Addr: 0x00002809, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000280D, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000280E, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000280F, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002810, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002812, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002813, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002815, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000281B, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000281D, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000281E, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002824, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002826, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002827, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002828, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002829, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000282A, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000282B, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x0000282C, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x0000282D, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x0000282E, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x0000282F, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_1 [HR_2_3_1N] + Attributes: + RATE - Addr: 0x00002833, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002837, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002838, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002839, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000283A, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x0000283C, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x0000283D, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x0000283F, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002845, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002847, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002848, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x0000284E, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x00002850, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x00002851, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x00002852, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x00002853, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x00002854, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x00002855, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002856, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002857, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002858, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002859, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_1 [HR_2_2_1P] + Attributes: + RATE - Addr: 0x0000285D, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x00002861, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x00002862, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x00002863, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x00002864, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002866, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002867, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002869, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x0000286F, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x00002871, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x00002872, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x00002878, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x0000287A, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x0000287B, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x0000287C, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x0000287D, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x0000287E, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x0000287F, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x00002880, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x00002881, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x00002882, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x00002883, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_B_0 [HR_2_1_0N] + Attributes: + RATE - Addr: 0x00002887, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x0000288B, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x0000288C, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x0000288D, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x0000288E, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x00002890, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x00002891, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x00002893, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x00002899, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x0000289B, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x0000289C, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028A2, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028A4, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028A5, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028A6, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028A7, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028A8, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028A9, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028AA, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028AB, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028AC, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028AD, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_GBOX_BK1_A_0 [HR_2_0_0P] + Attributes: + RATE - Addr: 0x000028B1, Size: 4, Value: (0x00000000) 0 + MASTER_SLAVE - Addr: 0x000028B5, Size: 1, Value: (0x00000000) 0 + PEER_IS_ON - Addr: 0x000028B6, Size: 1, Value: (0x00000000) 0 + TX_CLOCK_IO - Addr: 0x000028B7, Size: 1, Value: (0x00000000) 0 + TX_DDR_MODE - Addr: 0x000028B8, Size: 2, Value: (0x00000000) 0 + TX_BYPASS - Addr: 0x000028BA, Size: 1, Value: (0x00000000) 0 + TX_CLK_PHASE - Addr: 0x000028BB, Size: 2, Value: (0x00000000) 0 + TX_DLY - Addr: 0x000028BD, Size: 6, Value: (0x00000000) 0 + RX_DDR_MODE - Addr: 0x000028C3, Size: 2, Value: (0x00000000) 0 + RX_BYPASS - Addr: 0x000028C5, Size: 1, Value: (0x00000000) 0 + RX_DLY - Addr: 0x000028C6, Size: 6, Value: (0x00000000) 0 + RX_DPA_MODE - Addr: 0x000028CC, Size: 2, Value: (0x00000000) 0 + RX_MIPI_MODE - Addr: 0x000028CE, Size: 1, Value: (0x00000000) 0 + TX_MODE - Addr: 0x000028CF, Size: 1, Value: (0x00000000) 0 + RX_MODE - Addr: 0x000028D0, Size: 1, Value: (0x00000000) 0 + RX_CLOCK_IO - Addr: 0x000028D1, Size: 1, Value: (0x00000000) 0 + DFEN - Addr: 0x000028D2, Size: 1, Value: (0x00000000) 0 + SR - Addr: 0x000028D3, Size: 1, Value: (0x00000000) 0 + PE - Addr: 0x000028D4, Size: 1, Value: (0x00000000) 0 + PUD - Addr: 0x000028D5, Size: 1, Value: (0x00000000) 0 + DFODTEN - Addr: 0x000028D6, Size: 1, Value: (0x00000000) 0 + MC - Addr: 0x000028D7, Size: 4, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_HV_PGEN_dummy [] + Attributes: + hv_cfg_EN_BK0 - Addr: 0x000028DB, Size: 1, Value: (0x00000000) 0 + hv_cfg_EN_BK1 - Addr: 0x000028DC, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_fclk_mux_all [] + Attributes: + cfg_rxclk_phase_sel_B_0 - Addr: 0x000028DD, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_B_1 - Addr: 0x000028DE, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_0 - Addr: 0x000028DF, Size: 1, Value: (0x00000000) 0 + cfg_rxclk_phase_sel_A_1 - Addr: 0x000028E0, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_0 - Addr: 0x000028E1, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_B_1 - Addr: 0x000028E2, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_0 - Addr: 0x000028E3, Size: 1, Value: (0x00000000) 0 + cfg_rx_fclkio_sel_A_1 - Addr: 0x000028E4, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_0 - Addr: 0x000028E5, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_B_1 - Addr: 0x000028E6, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_0 - Addr: 0x000028E7, Size: 1, Value: (0x00000000) 0 + cfg_vco_clk_sel_A_1 - Addr: 0x000028E8, Size: 1, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_0 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028E9, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x000028EE, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x000028F3, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x000028F8, Size: 5, Value: (0x00000000) 0 +Block u_GBOX_HV_40X2_VL.u_gbox_root_bank_clkmux_1 [] + Attributes: + CDR_CLK_ROOT_SEL_B - Addr: 0x000028FD, Size: 5, Value: (0x00000000) 0 + CDR_CLK_ROOT_SEL_A - Addr: 0x00002902, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_B - Addr: 0x00002907, Size: 5, Value: (0x00000000) 0 + CORE_CLK_ROOT_SEL_A - Addr: 0x0000290C, Size: 5, Value: (0x00000000) 0 diff --git a/icb_bitstream/golden/pll/io_config.json b/icb_bitstream/golden/pll/io_config.json new file mode 100644 index 00000000..8e05c1d7 --- /dev/null +++ b/icb_bitstream/golden/pll/io_config.json @@ -0,0 +1,272 @@ +{ + "messages" : [ + "Start of IO Analysis", + " Get Ports", + " Detect input port \\clk (index=0, width=1, offset=0)", + " Detect input port \\din (index=0, width=1, offset=0)", + " Detect output port \\dout (index=0, width=1, offset=0)", + " Get Port/Standalone Primitives", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_clk", + " Cell port \\I is connected to input port \\clk", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\I_BUF $ibuf$top.$ibuf_din", + " Cell port \\I is connected to input port \\din", + " Parameter \\WEAK_KEEPER: \"NONE\"", + " Data Width: -2", + " Get important connection of cell \\O_BUFT $obuf$top.$obuf_dout", + " Cell port \\O is connected to output port \\dout", + " Data Width: -2", + " Trace \\I_BUF --> \\CLK_BUF", + " Try \\I_BUF $ibuf$top.$ibuf_clk out connection: $ibuf_clk -> \\clk_buf", + " Connected \\clk_buf", + " Data Width: -2", + " Trace \\I_BUF_DS --> \\CLK_BUF", + " Trace \\CLK_BUF --> \\PLL", + " Try \\CLK_BUF \\clk_buf out connection: \\clkbuf -> \\pll", + " Connected \\pll", + " Parameter \\DEV_FAMILY: \"VIRGO\"", + " Parameter \\DIVIDE_CLK_IN_BY_2: \"FALSE\"", + " Parameter \\PLL_DIV: 1", + " Parameter \\PLL_MULT: 16", + " Parameter \\PLL_MULT_FRAC: 0", + " Parameter \\PLL_POST_DIV: 34", + " Data Width: -2", + " Trace \\BOOT_CLOCK --> \\PLL", + " Trace \\I_BUF --> \\I_DELAY", + " Trace \\I_BUF --> \\I_DDR", + " Trace \\I_BUF --> \\I_SERDES", + " Trace \\I_BUF_DS --> \\I_DELAY", + " Trace \\I_BUF_DS --> \\I_DDR", + " Trace \\I_BUF_DS --> \\I_SERDES", + " Trace \\I_DELAY --> \\I_DDR", + " Trace \\I_DELAY --> \\I_SERDES", + " Trace \\O_BUF --> \\O_DELAY", + " Trace \\O_BUF --> \\O_DDR", + " Trace \\O_BUF --> \\O_SERDES", + " Trace \\O_BUFT --> \\O_DELAY", + " Trace \\O_BUFT --> \\O_DDR", + " Trace \\O_BUFT --> \\O_SERDES", + " Trace \\O_BUF_DS --> \\O_DELAY", + " Trace \\O_BUF_DS --> \\O_DDR", + " Trace \\O_BUF_DS --> \\O_SERDES", + " Trace \\O_BUFT_DS --> \\O_DELAY", + " Trace \\O_BUFT_DS --> \\O_DDR", + " Trace \\O_BUFT_DS --> \\O_SERDES", + " Trace \\O_DELAY --> \\O_DDR", + " Trace \\O_DELAY --> \\O_SERDES", + " Trace \\O_BUF --> \\O_SERDES_CLK", + " Trace \\O_BUFT --> \\O_SERDES_CLK", + " Trace \\O_BUF_DS --> \\O_SERDES_CLK", + " Trace \\O_BUFT_DS --> \\O_SERDES_CLK", + " Trace fabric clock buffer", + " Trace gearbox fast clock source", + " Trace Core/Fabric Clock", + " Module \\CLK_BUF \\clk_buf: clock port \\O, net \\clkbuf", + " Connected to cell \\PLL \\pll", + " Which is a primitive", + " Does not meet core_clk checking criteria. Not sending to fabric", + " Module \\PLL \\pll: clock port \\CLK_OUT_DIV4, net \\pll_clk", + " Connected to cell \\DFFRE $abc$193$auto_194", + " Which is not a IO primitive. Send to fabric", + " Use slot 0", + " Double check Core/Fabric Clock", + " Summary", + " |----------------------------------------------------------------------|", + " | *********************************************************** |", + " IN | clk * I_BUF |-> CLK_BUF |-> PLL * |", + " IN | din * I_BUF * |", + " OUT | * O_BUFT * dout |", + " | *********************************************************** |", + " |----------------------------------------------------------------------|", + " Final checking is good", + " Assign location HP_1_CC_18_9P (and properties) to Port clk", + " Assign location HP_1_0_0P (and properties) to Port din", + " Assign location HP_1_1_0N (and properties) to Port dout", + " Cross-check instances vs wrapped-instances", + " Generate SDC", + " Determine data signals", + " Pin object=clk, location: HP_1_CC_18_9P", + " Data signal from object clk", + " Fail reason: Object clk is primitive \\PLL but data signal is not defined", + " Pin object=din, location: HP_1_0_0P", + " Data signal from object din", + " Module=I_BUF Linked-object=din Port=O Net=$ibuf_din - Found", + " Pin object=dout, location: HP_1_1_0N", + " Data signal from object dout", + " Module=O_BUFT Linked-object=dout Port=I Net=$obuf_dout - Found", + " Determine internal control signals", + " Module=I_BUF LinkedObject=clk Location=HP_1_CC_18_9P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=PLL LinkedObject=clk Location=HP_1_CC_18_9P Port=LOCK Signal=out:TO_BE_DETERMINED", + " Skip reason: User design does not utilize linked-object clk wrapped-instance port LOCK", + " Module=PLL LinkedObject=clk Location=HP_1_CC_18_9P Port=PLL_EN Signal=in:TO_BE_DETERMINED", + " Skip reason: TO_BE_DETERMINED", + " Module=I_BUF LinkedObject=din Location=HP_1_0_0P Port=EN Signal=in:f2g_in_en_{A|B}", + " Module=O_BUFT LinkedObject=dout Location=HP_1_1_0N Port=T Signal=in:f2g_tx_oe_{A|B}", + "End of IO Analysis" + ], + "instances" : [ + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "clk", + "O" : "$ibuf_clk" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "CLK_BUF", + "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$ibuf_clk", + "O" : "clkbuf" + }, + "parameters" : { + }, + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + "PLL" + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "PLL", + "name" : "pll", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", + "linked_object" : "clk", + "linked_objects" : { + "clk" : { + "location" : "HP_1_CC_18_9P", + "properties" : { + "OUT3_ROUTE_TO_FABRIC_CLK" : "0" + } + } + }, + "connectivity" : { + "CLK_IN" : "clkbuf", + "CLK_OUT_DIV4" : "pll_clk" + }, + "parameters" : { + "DEV_FAMILY" : "VIRGO", + "DIVIDE_CLK_IN_BY_2" : "FALSE", + "OUT3_ROUTE_TO_FABRIC_CLK" : "0", + "PLL_DIV" : "1", + "PLL_MULT" : "16", + "PLL_MULT_FRAC" : "0", + "PLL_POST_DIV" : "34" + }, + "flags" : [ + "PLL" + ], + "pre_primitive" : "CLK_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "I_BUF", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", + "linked_object" : "din", + "linked_objects" : { + "din" : { + "location" : "HP_1_0_0P", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "din", + "O" : "$ibuf_din" + }, + "parameters" : { + "WEAK_KEEPER" : "NONE" + }, + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + }, + { + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", + "linked_object" : "dout", + "linked_objects" : { + "dout" : { + "location" : "HP_1_1_0N", + "properties" : { + } + } + }, + "connectivity" : { + "I" : "$obuf_dout", + "O" : "dout" + }, + "parameters" : { + }, + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "errors" : [ + ] + } + ] +} diff --git a/icb_bitstream/golden/pll/model_config.ppdb.json b/icb_bitstream/golden/pll/model_config.ppdb.json index af537b00..90165b93 100644 --- a/icb_bitstream/golden/pll/model_config.ppdb.json +++ b/icb_bitstream/golden/pll/model_config.ppdb.json @@ -1,12 +1,98 @@ { + "messages" : [ + "Netlist PPDB: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/pll/top/run_1/synth_1_1/synthesis/io_config.json", + "Config Mapping: /home/cschai/github/Raptor/build/share/raptor/configuration/Virgo/config_attributes.mapping.json", + "Property JSON: model_config.property.json", + "Preparing Python file: /home/cschai/github/Jira_Testcase/icb_bitstream/auto_run_results/pll/top/run_1/synth_1_1/impl_1_1_1/bitstream/config.py", + "Read resources", + "Validate Instances", + "Merge properties into instances", + "Re-location instances", + "Configure Mapping file initialization", + "Validation using '__primary_validation__' rule", + "Internal error validations", + "Assign instance-without-location", + "Allocate FCLK routing resource", + " CLKBUF clk_buf (location:HP_1_CC_18_9P)", + "Allocate ROOT BANK routing resource (and set configuration attributes)", + "Set CLKBUF remaining configuration attributes (FCLK)", + "Allocate PLL resource (and set PLLREF configuration attributes)", + " PLL pll (location:HP_1_CC_18_9P) uses FCLK ''", + " Pin resource: 3, PLL FCLK requested resource: 0, PLL availability: 3", + " Warning: PLL request resource is 0 - does not need to route PLL output to FCLK. Only need to configure PLLREF configuration attributes", + " It is flexible to use more than one PLL. Decide later", + " PLL pll (location:HP_1_CC_18_9P) uses FCLK ''", + " Pin resource: 3, PLL FCLK requested resource: 0, PLL availability: 3", + " Warning: PLL request resource is 0 - does not need to route PLL output to FCLK. Only need to configure PLLREF configuration attributes", + " Force to use first found resource", + " Use PLL: pll_0", + " Set PLLREF configuration attributes", + "Set PLL remaining configuration attributes (FCLK)", + " Set FCLK configuration attributes", + " Skip for PLL:HP_1_CC_18_9P", + "Validation using '__secondary_validation__' rule", + "Set configuration attributes", + " Module: I_BUF ($ibuf$top.$ibuf_clk)", + " Object: clk", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: CLK_BUF (clk_buf)", + " Object: clk", + " Parameter", + " Property", + " Rule CLK_BUF.GBOX_TOP", + " Match", + " Rule CLK_BUF.ROOT_BANK_CLKMUX", + " Mismatch", + " Rule CLK_BUF.ROOT_MUX", + " Mismatch", + " Module: PLL (pll)", + " Object: clk", + " Parameter", + " Rule PLL.PLL", + " Match", + " Defined function: parse_pll_parameter", + " Rule PLL.PLLREF_MUX", + " Match", + " Rule PLL.ROOT_MUX0", + " Mismatch", + " Rule PLL.ROOT_MUX1", + " Mismatch", + " Rule PLL.ROOT_MUX2", + " Mismatch", + " Rule PLL.ROOT_MUX3", + " Match", + " Defined function: parse_pll_root_mux", + " Property", + " Module: I_BUF ($ibuf$top.$ibuf_din)", + " Object: din", + " Parameter", + " Rule I_BUF.WEAK_KEEPER", + " Match", + " Property", + " Rule I_BUF.IOSTANDARD", + " Mismatch", + " Module: O_BUFT ($obuf$top.$obuf_dout)", + " Object: dout", + " Parameter", + " Property", + " Rule O_BUFT.IOSTANDARD", + " Mismatch" + ], "instances" : [ { "module" : "I_BUF", - "name" : "$iopadmap$top.clk", + "name" : "$ibuf$top.$ibuf_clk", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { }, "config_attributes" : [ @@ -21,49 +107,97 @@ }, "connectivity" : { "I" : "clk", - "O" : "$iopadmap$clk" + "O" : "$ibuf_clk" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + "CLK_BUF" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { "module" : "CLK_BUF", "name" : "clk_buf", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { - "ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "CLK_BUF" : "GBOX_TOP_SRC==DEFAULT" + } ] } }, "connectivity" : { - "I" : "$iopadmap$clk", + "I" : "$ibuf_clk", "O" : "clkbuf" }, "parameters" : { - "ROUTE_TO_FABRIC_CLK" : "0" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" + "flags" : [ + "CLK_BUF" + ], + "pre_primitive" : "I_BUF", + "post_primitives" : [ + "PLL" + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__clock_pin_is_valid__,__check_fabric_clock_resource__,__update_fabric_clock_resource__" }, { "module" : "PLL", "name" : "pll", + "location_object" : "clk", + "location" : "HP_1_CC_18_9P", "linked_object" : "clk", "linked_objects" : { "clk" : { - "location" : "HP_1_CC_10_5P", + "location" : "HP_1_CC_18_9P", "properties" : { - "OUT3_ROUTE_TO_FABRIC_CLK" : "1" + "OUT3_ROUTE_TO_FABRIC_CLK" : "0" }, "config_attributes" : [ + { + "PLL" : "PLL_SRC==DEFAULT", + "__location__" : "u_GBOX_HP_40X2.u_gbox_PLLTS16FFCFRACF_0", + "pll_FBDIV" : "16", + "pll_PLLEN" : "0", + "pll_POSTDIV1" : "2", + "pll_POSTDIV2" : "2", + "pll_REFDIV" : "1" + }, + { + "PLL" : "PLLREF_SRC==HP --#PIN=0 --#BANK=0 --#DIV=0", + "__location__" : "u_GBOX_HP_40X2.u_gbox_pll_refmux_0" + }, + { + "ROOT_MUX_SEL" : "35", + "__location__" : "u_GBOX_HP_40X2.u_gbox_clkmux_52x1_left_0" + } ] } }, @@ -72,17 +206,40 @@ "CLK_OUT_DIV4" : "pll_clk" }, "parameters" : { - "OUT3_ROUTE_TO_FABRIC_CLK" : "1", + "DEV_FAMILY" : "VIRGO", + "DIVIDE_CLK_IN_BY_2" : "FALSE", + "OUT3_ROUTE_TO_FABRIC_CLK" : "0", "PLL_DIV" : "1", "PLL_MULT" : "16", + "PLL_MULT_FRAC" : "0", "PLL_POST_DIV" : "34" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pll_clock_pin_is_valid__,__check_fabric_clock_resource__,__check_pll_clock_pin_resource__,__allocate_pll_clock_pin_resource__,__update_fabric_clock_resource__" + "flags" : [ + "PLL" + ], + "pre_primitive" : "CLK_BUF", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__BANK__" : "0", + "__DIV__" : "0", + "__PIN__" : "0", + "__SRC__" : "HP", + "__pll_enable__" : "0", + "__pll_resource__" : "0", + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pll_clock_pin_is_valid__,__check_fabric_clock_resource__,__check_pll_parameter__,__update_fabric_clock_resource__" }, { "module" : "I_BUF", - "name" : "$iopadmap$top.din", + "name" : "$ibuf$top.$ibuf_din", + "location_object" : "din", + "location" : "HP_1_0_0P", "linked_object" : "din", "linked_objects" : { "din" : { @@ -101,17 +258,31 @@ }, "connectivity" : { "I" : "din", - "O" : "$iopadmap$din" + "O" : "$ibuf_din" }, "parameters" : { "WEAK_KEEPER" : "NONE" }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "I_BUF" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" }, { - "module" : "O_BUF", - "name" : "$iopadmap$top.dout", + "module" : "O_BUFT", + "name" : "$obuf$top.$obuf_dout", + "location_object" : "dout", + "location" : "HP_1_1_0N", "linked_object" : "dout", "linked_objects" : { "dout" : { @@ -120,19 +291,31 @@ }, "config_attributes" : [ { - "O_BUF" : "IOSTANDARD==DEFAULT" + "O_BUFT" : "IOSTANDARD==DEFAULT" } ] } }, "connectivity" : { - "I" : "$iopadmap$dout", + "I" : "$obuf_dout", "O" : "dout" }, "parameters" : { }, - "__location_validation__" : "TRUE", - "__location_validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" + "flags" : [ + "O_BUFT" + ], + "pre_primitive" : "", + "post_primitives" : [ + ], + "route_clock_to" : { + }, + "route_clock_result" : { + }, + "errors" : [ + ], + "__validation__" : "TRUE", + "__validation_msg__" : "Pass:__pin_is_valid__,__check_pin_resource__" } ] } diff --git a/icb_bitstream/io_buf_ds/constraints.sdc b/icb_bitstream/io_buf_ds/constraints.sdc index 02c1f5cb..e87fed84 100644 --- a/icb_bitstream/io_buf_ds/constraints.sdc +++ b/icb_bitstream/io_buf_ds/constraints.sdc @@ -1,12 +1,8 @@ # pin locations -set_property mode MODE_RATE_3_A_RX HP_1_4_2P set_pin_loc din_p HP_1_4_2P -set_property mode MODE_RATE_3_B_RX HP_1_5_2N set_pin_loc din_n HP_1_5_2N -set_property mode MODE_RATE_3_A_TX HP_1_6_3P set_pin_loc dout_p HP_1_6_3P -set_property mode MODE_RATE_3_B_TX HP_1_7_3N -set_pin_loc dout_n HP_1_7_3N \ No newline at end of file +set_pin_loc dout_n HP_1_7_3N diff --git a/icb_bitstream/io_buf_ds_io_ddr/constraints.sdc b/icb_bitstream/io_buf_ds_io_ddr/constraints.sdc index 5fd5aa5a..d3c9fd5c 100644 --- a/icb_bitstream/io_buf_ds_io_ddr/constraints.sdc +++ b/icb_bitstream/io_buf_ds_io_ddr/constraints.sdc @@ -1,24 +1,14 @@ -# Clock -create_clock -period 5 -name clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_2_1P set_pin_loc reset HP_1_2_1P -set_property mode Mode_BP_SDR_B_RX HP_1_3_1N set_pin_loc enable HP_1_3_1N -set_property mode MODE_RATE_3_A_RX HP_1_4_2P set_pin_loc din_p HP_1_4_2P -set_property mode MODE_RATE_3_B_RX HP_1_5_2N set_pin_loc din_n HP_1_5_2N -set_property mode MODE_RATE_3_A_TX HP_1_6_3P set_pin_loc dout_p HP_1_6_3P -set_property mode MODE_RATE_3_B_TX HP_1_7_3N set_pin_loc dout_n HP_1_7_3N diff --git a/icb_bitstream/io_ddr/constraints.sdc b/icb_bitstream/io_ddr/constraints.sdc index 0bd1b280..aa0dd0d4 100644 --- a/icb_bitstream/io_ddr/constraints.sdc +++ b/icb_bitstream/io_ddr/constraints.sdc @@ -1,19 +1,10 @@ -# Clock -create_clock -period 5 -name clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N -set_property mode Mode_BP_SDR_A_RX HP_1_2_1P set_pin_loc reset HP_1_2_1P -set_property mode Mode_BP_SDR_B_RX HP_1_3_1N set_pin_loc enable HP_1_3_1N - diff --git a/icb_bitstream/io_delay/constraints.sdc b/icb_bitstream/io_delay/constraints.sdc index c4f1832e..0a7363f9 100644 --- a/icb_bitstream/io_delay/constraints.sdc +++ b/icb_bitstream/io_delay/constraints.sdc @@ -1,58 +1,37 @@ -# Clock -create_clock -period 5 -name clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N -set_property mode Mode_BP_SDR_A_RX HR_1_0_0P set_pin_loc delay_load HR_1_0_0P -set_property mode Mode_BP_SDR_B_RX HR_1_1_0N set_pin_loc delay_adj HR_1_1_0N # There is issue to use HR_1_2_1P for 62x44 -set_property mode Mode_BP_SDR_B_RX HR_1_3_1N set_pin_loc delay_incdec HR_1_3_1N -set_property mode Mode_BP_SDR_A_TX HR_5_0_0P set_pin_loc {i_delay_value[0]} HR_5_0_0P -set_property mode Mode_BP_SDR_B_TX HR_5_1_0N set_pin_loc {i_delay_value[1]} HR_5_1_0N -set_property mode Mode_BP_SDR_A_TX HR_5_2_1P set_pin_loc {i_delay_value[2]} HR_5_2_1P -set_property mode Mode_BP_SDR_B_TX HR_5_3_1N set_pin_loc {i_delay_value[3]} HR_5_3_1N -set_property mode Mode_BP_SDR_A_TX HR_5_4_2P set_pin_loc {i_delay_value[4]} HR_5_4_2P -set_property mode Mode_BP_SDR_B_TX HR_5_5_2N set_pin_loc {i_delay_value[5]} HR_5_5_2N -set_property mode Mode_BP_SDR_A_TX HR_5_6_3P set_pin_loc {o_delay_value[0]} HR_5_6_3P -set_property mode Mode_BP_SDR_B_TX HR_5_7_3N set_pin_loc {o_delay_value[1]} HR_5_7_3N -set_property mode Mode_BP_SDR_A_TX HR_5_8_4P set_pin_loc {o_delay_value[2]} HR_5_8_4P -set_property mode Mode_BP_SDR_B_TX HR_5_9_4N set_pin_loc {o_delay_value[3]} HR_5_9_4N -set_property mode Mode_BP_SDR_A_TX HR_5_CC_10_5P -set_pin_loc {o_delay_value[4]} HR_5_CC_10_5P +set_pin_loc {o_delay_value[4]} HR_5_CC_18_9P -set_property mode Mode_BP_SDR_B_TX HR_5_CC_11_5N -set_pin_loc {o_delay_value[5]} HR_5_CC_11_5N +set_pin_loc {o_delay_value[5]} HR_5_CC_19_9N diff --git a/icb_bitstream/io_delay_io_ddr/constraints.sdc b/icb_bitstream/io_delay_io_ddr/constraints.sdc index 3c33b424..b1161778 100644 --- a/icb_bitstream/io_delay_io_ddr/constraints.sdc +++ b/icb_bitstream/io_delay_io_ddr/constraints.sdc @@ -1,64 +1,41 @@ -# Clock -create_clock -period 5 -name clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N -set_property mode Mode_BP_SDR_A_RX HP_1_2_1P set_pin_loc reset HP_1_2_1P -set_property mode Mode_BP_SDR_B_RX HP_1_3_1N set_pin_loc enable HP_1_3_1N -set_property mode Mode_BP_SDR_A_RX HR_1_0_0P set_pin_loc delay_load HR_1_0_0P -set_property mode Mode_BP_SDR_B_RX HR_1_1_0N set_pin_loc delay_adj HR_1_1_0N # There is issue to use HR_1_2_1P for 62x44 -set_property mode Mode_BP_SDR_B_RX HR_1_3_1N set_pin_loc delay_incdec HR_1_3_1N -set_property mode Mode_BP_SDR_A_TX HR_5_0_0P set_pin_loc {i_delay_value[0]} HR_5_0_0P -set_property mode Mode_BP_SDR_B_TX HR_5_1_0N set_pin_loc {i_delay_value[1]} HR_5_1_0N -set_property mode Mode_BP_SDR_A_TX HR_5_2_1P set_pin_loc {i_delay_value[2]} HR_5_2_1P -set_property mode Mode_BP_SDR_B_TX HR_5_3_1N set_pin_loc {i_delay_value[3]} HR_5_3_1N -set_property mode Mode_BP_SDR_A_TX HR_5_4_2P set_pin_loc {i_delay_value[4]} HR_5_4_2P -set_property mode Mode_BP_SDR_B_TX HR_5_5_2N set_pin_loc {i_delay_value[5]} HR_5_5_2N -set_property mode Mode_BP_SDR_A_TX HR_5_6_3P set_pin_loc {o_delay_value[0]} HR_5_6_3P -set_property mode Mode_BP_SDR_B_TX HR_5_7_3N set_pin_loc {o_delay_value[1]} HR_5_7_3N -set_property mode Mode_BP_SDR_A_TX HR_5_8_4P set_pin_loc {o_delay_value[2]} HR_5_8_4P -set_property mode Mode_BP_SDR_B_TX HR_5_9_4N set_pin_loc {o_delay_value[3]} HR_5_9_4N -set_property mode Mode_BP_SDR_A_TX HR_5_CC_10_5P -set_pin_loc {o_delay_value[4]} HR_5_CC_10_5P +set_pin_loc {o_delay_value[4]} HR_5_CC_18_9P -set_property mode Mode_BP_SDR_B_TX HR_5_CC_11_5N -set_pin_loc {o_delay_value[5]} HR_5_CC_11_5N +set_pin_loc {o_delay_value[5]} HR_5_CC_19_9N diff --git a/icb_bitstream/o_buft/constraints.sdc b/icb_bitstream/o_buft/constraints.sdc index 7df79802..6ecbcb18 100644 --- a/icb_bitstream/o_buft/constraints.sdc +++ b/icb_bitstream/o_buft/constraints.sdc @@ -1,9 +1,6 @@ # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N -set_property mode Mode_BP_SDR_B_RX HP_1_3_1N set_pin_loc enable HP_1_3_1N diff --git a/icb_bitstream/o_buft_ds/constraints.sdc b/icb_bitstream/o_buft_ds/constraints.sdc index 69c225d0..88081e49 100644 --- a/icb_bitstream/o_buft_ds/constraints.sdc +++ b/icb_bitstream/o_buft_ds/constraints.sdc @@ -1,12 +1,8 @@ # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_RX HP_1_3_1N set_pin_loc enable HP_1_3_1N -set_property mode MODE_RATE_3_A_TX HP_1_6_3P set_pin_loc dout_p HP_1_6_3P -set_property mode MODE_RATE_3_B_TX HP_1_7_3N set_pin_loc dout_n HP_1_7_3N \ No newline at end of file diff --git a/icb_bitstream/pll/constraints.sdc b/icb_bitstream/pll/constraints.sdc index 53618a17..b5cd80ca 100644 --- a/icb_bitstream/pll/constraints.sdc +++ b/icb_bitstream/pll/constraints.sdc @@ -1,12 +1,6 @@ -# Clock -create_clock -period 5 -name pll_clk - # pin locations -set_property mode Mode_BP_SDR_A_RX HP_1_CC_10_5P -set_pin_loc clk HP_1_CC_10_5P +set_pin_loc clk HP_1_CC_18_9P -set_property mode Mode_BP_SDR_A_RX HP_1_0_0P set_pin_loc din HP_1_0_0P -set_property mode Mode_BP_SDR_B_TX HP_1_1_0N set_pin_loc dout HP_1_1_0N diff --git a/icb_bitstream/run_test.py b/icb_bitstream/run_test.py index 1667988c..6d3459ef 100644 --- a/icb_bitstream/run_test.py +++ b/icb_bitstream/run_test.py @@ -22,6 +22,45 @@ def execute(self): ) print(" Run command: {cmd:s}".format(cmd=cmd)) self.status = os.system(cmd) == 0 + self.io_config_errors = [] + self.sdc_errors = [] + self.config_status = True + if self.status: + file = open( + "auto_run_results/{proj:s}/top/run_1/synth_1_1/synthesis/io_config.json".format( + proj=self.project + ) + ) + for line in file: + if line.find("Error: ") != -1: + line = line[line.find("Error: ") :] + line = line.strip() + if line[-1] == '"': + line = line[:-1] + self.io_config_errors.append(line) + file.close() + if self.status: + file = open( + "auto_run_results/{proj:s}/top/run_1/synth_1_1/synthesis/design_edit.sdc".format( + proj=self.project + ) + ) + for line in file: + if line.find("# Fail reason: ") != -1: + line = line.strip() + self.sdc_errors.append(line) + file.close() + if self.status: + file = open( + "auto_run_results/{proj:s}/top/run_1/synth_1_1/impl_1_1_1/bitstream/model_config.ppdb.json".format( + proj=self.project + ) + ) + for line in file: + if line.find("__validation__") != -1 and line.find("FALSE") != -1: + self.config_status = False + break + file.close() def get_all_projects(): projects = [] @@ -53,8 +92,8 @@ def get_run_porjects(projects, exclude_projects): if proj in run_projects: print("Info: Exclude project {proj:s}".format(proj=proj)) run_projects.remove(proj) - if len(run_projects) == 0: - print("Warning: No project to be run") + if len(run_projects) == 0: + print("Warning: No project to be run") return run_projects def get_thread_count(threads): @@ -63,7 +102,11 @@ def get_thread_count(threads): print("Warning: Set threads count to 1") threads_count = 1 elif threads > MAX_THREADS: - print("Warning: Reduce/set threads count to {max_thread:d}".format(max_thread=MAX_THREADS)) + print( + "Warning: Reduce/set threads count to {max_thread:d}".format( + max_thread=MAX_THREADS + ) + ) threads_count = MAX_THREADS else: threads_count = threads @@ -78,7 +121,7 @@ def get_tcl_controls(keyword, control): temp = control.split(",") for t in temp: controls.append("##__{k:s}__{c:s}__##".format(k=keyword, c=t.upper())) - print(controls[-1]) + print(controls[-1]) return controls def prepare_project(proj, device, add_controls, remove_controls): @@ -114,7 +157,6 @@ def format_file(): for file in all_files: lines = [] ifile = open(file) - change = False for line in ifile: lines.append(line.rstrip()) ifile.close() @@ -157,10 +199,11 @@ def update_golden(project): for file in files: filename = os.path.basename(file) os.system("mkdir -p golden/{proj:s}".format(proj=project)) - print(" Update {file:s}".format(file=filename)) + print(" Update {file:s}".format(file=filename)) os.system("cp -rf {file:s} golden/{proj:s}/.".format(file=file, proj=project)) - + def compare_golden(project): + print(" Golden files:") status = True files = glob.glob("golden/{proj:s}/*".format(proj=project)) for file in files: @@ -181,21 +224,21 @@ def compare_golden(project): break status = status and current_status if current_status: - print(" Compare golden {file:s} pass".format(file=filename)) + print(" Compare golden {file:s} pass".format(file=filename)) else: print( - " Error: Compare golden {file:s} failed".format( + " Error: Compare golden {file:s} failed".format( file=filename ) ) else: - print(" Error: Compare golden {file:s} failed".format(file=filename)) + print(" Error: Compare golden {file:s} failed".format(file=filename)) status = False g.close() r.close() else: print( - " Error: Result summary file {file:s} does not exist".format( + " Error: Result summary file {file:s} does not exist".format( file=result_file ) ) @@ -209,14 +252,50 @@ def main(): subparsers = parser.add_subparsers(dest="subparser_name") format_parser = subparsers.add_parser("format") clean_parser = subparsers.add_parser("clean") - parser.add_argument("-p", "--projects", default=None, help="A list of project(s) to run (seperated by ','). By default run all projects") - parser.add_argument("-e", "--exclude_projects", default=None, help="A list of project(s) to exclude (seperated by ','). By default exclude none") - parser.add_argument("-t", "--threads", type=int, default=1, help="Multi-threading count. By default is 1") - parser.add_argument("-d", "--device", default="GEMINI_COMPACT_62x44", help="Targeted device. By default is GEMINI_COMPACT_10x8") - parser.add_argument("-r", "--raptor_tool", default=None, help="Raptor tool path. Must be specified") - parser.add_argument("-u", "--update", action="store_true", help="Update result instead of compare result") - parser.add_argument("--add_tcl_control", default=None, help="Control feature(s) to add (seperated by ',') in Raptor TCL") - parser.add_argument("--remove_tcl_control", default=None, help="Control feature(s) to remove (seperated by ',') in Raptor TCL") + parser.add_argument( + "-p", + "--projects", + default=None, + help="A list of project(s) to run (seperated by ','). By default run all projects", + ) + parser.add_argument( + "-e", + "--exclude_projects", + default=None, + help="A list of project(s) to exclude (seperated by ','). By default exclude none", + ) + parser.add_argument( + "-t", + "--threads", + type=int, + default=1, + help="Multi-threading count. By default is 1", + ) + parser.add_argument( + "-d", + "--device", + default="1VG28", + help="Targeted device. By default is GEMINI_COMPACT_10x8", + ) + parser.add_argument( + "-r", "--raptor_tool", default=None, help="Raptor tool path. Must be specified" + ) + parser.add_argument( + "-u", + "--update", + action="store_true", + help="Update result instead of compare result", + ) + parser.add_argument( + "--add_tcl_control", + default=None, + help="Control feature(s) to add (seperated by ',') in Raptor TCL", + ) + parser.add_argument( + "--remove_tcl_control", + default=None, + help="Control feature(s) to remove (seperated by ',') in Raptor TCL", + ) args = parser.parse_args() if args.subparser_name == "format": format_file() @@ -252,19 +331,33 @@ def main(): os.system("rm -rf auto_run_results/summary") os.mkdir("auto_run_results/summary") summary_files = [ - "run_1/synth_1_1/synthesis/config.json", + "run_1/synth_1_1/synthesis/io_config.json", + "run_1/synth_1_1/synthesis/design_edit.sdc", "run_1/synth_1_1/impl_1_1_1/bitstream/model_config.ppdb.json", - "run_1/synth_1_1/impl_1_1_1/bitstream/io_bitstream.detail.txt", + "run_1/synth_1_1/impl_1_1_1/bitstream/io_bitstream.detail.bit", ] print("Result/Status:") status = True for result in results: print( - " Project {proj:s} raptor status: {status:s}".format( + " Project {proj:s}. Raptor status: {status:s}".format( proj=result.project, status="TRUE" if result.status else "FALSE", ) ) + if len(result.io_config_errors): + print(" IO Config Error:") + for error in result.io_config_errors: + print(" {error:s}".format(error=error)) + status = False + if len(result.sdc_errors): + print(" SDC Error:") + for error in result.sdc_errors: + print(" {error:s}".format(error=error)) + status = False + if not result.config_status: + print(" Config Model status: FALSE") + status = False status = status and result.status if result.status: os.mkdir( @@ -278,11 +371,15 @@ def main(): proj=result.project, file=file ) ) - if args.update : + if args.update: update_golden(result.project) - else : + else: status = compare_golden(result.project) and status - print("\nOverall result: {status:s}\n".format(status="True" if status else "False")) + print( + "\nOverall result: {status:s}\n".format( + status="True" if status else "False" + ) + ) else: if isinstance(args.raptor_tool, str):