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CSR bit positions #4

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SiFiveHolland opened this issue Nov 1, 2024 · 1 comment
Open

CSR bit positions #4

SiFiveHolland opened this issue Nov 1, 2024 · 1 comment

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@SiFiveHolland
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Since Zimte depends on XLEN >= 64, Smpnpm, and Ssnpm, it should use CSR bits in the high half of the envcfg CSRs, like pointer masking does. (The register diagrams should be updated to include the PMM field.)

Also, why is there no MT_ASYNC field in senvcfg? It would be supervisor software's policy whether or not it allows asynchronous reporting in U-mode.

@deepak0414
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Yeah good point. I'll revise to add CSR bits in high half.

Also, why is there no MT_ASYNC field in senvcfg? It would be supervisor software's policy whether or not it allows asynchronous reporting in U-mode.

A bug. yeah thanks for pointing it out. Seems like I missed it.

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