diff --git a/sample.axf b/sample.axf new file mode 100644 index 0000000..4e5acdc Binary files /dev/null and b/sample.axf differ diff --git a/sample.build_log.htm b/sample.build_log.htm new file mode 100644 index 0000000..25d53ab --- /dev/null +++ b/sample.build_log.htm @@ -0,0 +1,74 @@ + +
+++ + diff --git a/sample.c b/sample.c new file mode 100644 index 0000000..c01fbd7 --- /dev/null +++ b/sample.c @@ -0,0 +1,97 @@ +/*---------------------------------------------------------------------------- + * Name: sample.c + * Purpose: SnakeGame implementation + *---------------------------------------------------------------------------- + * Computer Architectures Special Project + *Copyright (c) 2018 Politecnico di Torino. All rights reserved. + *---------------------------------------------------------------------------- + *Carlos José Peña Agreda s250953@studenti.polito.it + *Roberth Reynel Rosero Osorio s251640@studenti.polito.it*/ + +#includeµVision Build Log
+Tool Versions:
+IDE-Version: µVision V5.24.2.0 +Copyright (C) 2017 ARM Ltd and ARM Germany GmbH. All rights reserved. +License Information: Carlos Peña, Politecnico, LIC=---- + +Tool Versions: +Toolchain: MDK-Lite Version: 5.24.1 +Toolchain Path: C:\Keil_P\ARM\ARMCC\Bin +C Compiler: Armcc.exe V5.06 update 5 (build 528) +Assembler: Armasm.exe V5.06 update 5 (build 528) +Linker/Locator: ArmLink.exe V5.06 update 5 (build 528) +Library Manager: ArmAr.exe V5.06 update 5 (build 528) +Hex Converter: FromElf.exe V5.06 update 5 (build 528) +CPU DLL: SARMCM3.DLL V5.24.1 +Dialog DLL: DARMP1.DLL V1.27.0.0 +Target DLL: UL2CM3.DLL V1.160.3.0 +Dialog DLL: TARMP1.DLL V1.26.0.0 + +Project:
+C:\Users\Roberth\Documents\11 Polito 1\Computer Arquitectures\Proyecto\Escritorio\Snake (20Mayo2018)\Snake\sample.uvprojx +Project File Date: 03/07/2018 + +Output:
+*** Using Compiler 'V5.06 update 5 (build 528)', folder: 'C:\Keil_P\ARM\ARMCC\Bin' +Rebuild target 'Target 1' +assembling startup_LPC17xx.s... +compiling core_cm3.c... +compiling sample.c... +compiling system_LPC17xx.c... +compiling IRQ.c... +compiling GLCD_SPI_LPC1700.c... +compiling lib_button.c... +compiling IRQ_button.c... +compiling IRQ_potenciometer.c... +compiling Lib_potenciometer.c... +compiling joystick.c... +compiling funct_timer.c... +compiling IRQ_timer.c... +compiling lib_timer.c... +compiling lib_movement.c... +compiling menu.c... +linking... +Program Size: Code=13546 RO-data=6542 RW-data=276 ZI-data=836 +".\sample.axf" - 0 Error(s), 0 Warning(s). + +Software Packages used:
+ +Package Vendor: ARM + http://www.keil.com/pack/ARM.CMSIS.5.2.0.pack + ARM.CMSIS.5.2.0 + CMSIS (Cortex Microcontroller Software Interface Standard) + * Component: CORE Version: 5.0.2 + +Package Vendor: Keil + http://www.keil.com/pack/Keil.LPC1700_DFP.2.4.0.pack + Keil.LPC1700_DFP.2.4.0 + NXP LPC1700 Series Device Support, Drivers and Examples for MCB1700 and LPC1788-32 + +Collection of Component include folders:
+ .\RTE\_Target_1 + C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include + C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include + +Collection of Component Files used:
+ + * Component: ARM::CMSIS:CORE:5.0.2 +Build Time Elapsed: 00:00:09 +
#<CALLGRAPH># ARM Linker, 5060528: Last Updated: Thu May 24 22:15:34 2018
+
+
+
+
+
+
__main (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
+
[Calls]
__scatterload (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
+
[Called By]
__scatterload_rt2 (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
+
[Calls]
__scatterload_rt2_thumb_only (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +
__scatterload_null (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +
__scatterload_copy (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
+
[Calls]
__scatterload_zeroinit (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED) + +
__rt_lib_init (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
+
[Called By]
__rt_lib_init_fp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002)) + +
__rt_lib_init_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A)) + +
__rt_lib_init_preinit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004)) + +
__rt_lib_init_rand_2 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000D))
+
[Stack]
__rt_lib_init_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C)) + +
__rt_lib_init_alloca_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E)) + +
__rt_lib_init_argv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C)) + +
__rt_lib_init_atexit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B)) + +
__rt_lib_init_clock_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021)) + +
__rt_lib_init_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032)) + +
__rt_lib_init_exceptions_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030)) + +
__rt_lib_init_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F)) + +
__rt_lib_init_getenv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023)) + +
__rt_lib_init_lc_collate_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011)) + +
__rt_lib_init_lc_ctype_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013)) + +
__rt_lib_init_lc_monetary_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015)) + +
__rt_lib_init_lc_numeric_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017)) + +
__rt_lib_init_lc_time_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019)) + +
__rt_lib_init_rand_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E)) + +
__rt_lib_init_return (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033)) + +
__rt_lib_init_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D)) + +
__rt_lib_init_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025)) + +
__rt_lib_shutdown (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
+
[Called By]
__rt_lib_shutdown_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002)) + +
__rt_lib_shutdown_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)) + +
__rt_lib_shutdown_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)) + +
__rt_lib_shutdown_return (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)) + +
__rt_lib_shutdown_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)) + +
__rt_lib_shutdown_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)) + +
__rt_lib_shutdown_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)) + +
__rt_entry (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
+
[Called By]
__rt_entry_presh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002)) + +
__rt_entry_sh (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
+
[Stack]
__rt_entry_li (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
+
[Calls]
__rt_entry_postsh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009)) + +
__rt_entry_main (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
+
[Stack]
__rt_entry_postli_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)) + +
__rt_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
+
[Called By]
__rt_exit_ls (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
+
[Calls]
__rt_exit_prels_1 (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002)) + +
__rt_exit_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
+
[Calls]
wait (Thumb, 4 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.emb_text))
+
[Called By]
rand (Thumb, 48 bytes, Stack size 0 bytes, rand.o(.emb_text))
+
[Called By]
Reset_Handler (Thumb, 4 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
HardFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
BOD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Calls]
CANActivity_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
CAN_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
DMA_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
EINT3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
ENET_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
I2C0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
I2C1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
I2C2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
I2S_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
MCPWM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
PLL0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
PLL1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
PWM1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
QEI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
RIT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
RTC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
SPI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
SSP0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
SSP1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
TIMER2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
TIMER3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
UART0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
UART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
UART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
UART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
USBActivity_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
USB_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
WDT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text))
+
[Address Reference Count : 1]
__user_initial_stackheap (Thumb, 0 bytes, Stack size unknown bytes, startup_lpc17xx.o(.text))
+
[Called By]
SysTick_Handler (Thumb, 116 bytes, Stack size 0 bytes, irq.o(.text))
+
[Address Reference Count : 1]
EINT0_IRQHandler (Thumb, 16 bytes, Stack size 0 bytes, irq_button.o(.text))
+
[Address Reference Count : 1]
EINT1_IRQHandler (Thumb, 16 bytes, Stack size 0 bytes, irq_button.o(.text))
+
[Address Reference Count : 1]
EINT2_IRQHandler (Thumb, 16 bytes, Stack size 0 bytes, irq_button.o(.text))
+
[Address Reference Count : 1]
TIMER0_IRQHandler (Thumb, 28 bytes, Stack size 0 bytes, irq_timer.o(.text))
+
[Address Reference Count : 1]
TIMER1_IRQHandler (Thumb, 8 bytes, Stack size 0 bytes, irq_timer.o(.text))
+
[Address Reference Count : 1]
__use_two_region_memory (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
__rt_heap_escrow$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
__rt_heap_expand$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
exit (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
+
[Stack]
__user_libspace (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +
__user_perproc_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
+
[Called By]
__user_perthread_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +
_sys_exit (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
+
[Called By]
__I$use$semihosting (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +
__use_no_semihosting_swi (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +
__semihosting_library_function (Thumb, 0 bytes, Stack size unknown bytes, indicate_semi.o(.text), UNUSED) + +
main (Thumb, 296 bytes, Stack size 0 bytes, sample.o(.text))
+
[Stack]
SystemCoreClockUpdate (Thumb, 408 bytes, Stack size 32 bytes, system_lpc17xx.o(.text), UNUSED)
+
[Calls]
SystemInit (Thumb, 310 bytes, Stack size 0 bytes, system_lpc17xx.o(.text))
+
[Called By]
wait_delay (Thumb, 12 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
GLCD_Init (Thumb, 2068 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_SetWindow (Thumb, 148 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_WindowMax (Thumb, 18 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_PutPixel (Thumb, 96 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(.text), UNUSED)
+
[Calls]
GLCD_SetTextColor (Thumb, 6 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
GLCD_SetBackColor (Thumb, 6 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
GLCD_Clear (Thumb, 96 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_DrawChar_U8 (Thumb, 120 bytes, Stack size 40 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_DrawChar_U16 (Thumb, 120 bytes, Stack size 40 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_DisplayChar (Thumb, 84 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_DisplayString (Thumb, 44 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_DisplayStringTime (Thumb, 54 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_ClearLn (Thumb, 94 bytes, Stack size 80 bytes, glcd_spi_lpc1700.o(.text), UNUSED)
+
[Calls]
GLCD_Bargraph (Thumb, 138 bytes, Stack size 32 bytes, glcd_spi_lpc1700.o(.text), UNUSED)
+
[Calls]
GLCD_SetBar (Thumb, 122 bytes, Stack size 32 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_SetClr (Thumb, 114 bytes, Stack size 32 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
GLCD_Bitmap (Thumb, 98 bytes, Stack size 40 bytes, glcd_spi_lpc1700.o(.text), UNUSED)
+
[Calls]
GLCD_Bmp (Thumb, 108 bytes, Stack size 40 bytes, glcd_spi_lpc1700.o(.text), UNUSED)
+
[Calls]
GLCD_ScrollVertical (Thumb, 2 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text), UNUSED) + +
BUTTON_init (Thumb, 100 bytes, Stack size 8 bytes, lib_button.o(.text))
+
[Stack]
ADC_IRQHandler (Thumb, 122 bytes, Stack size 8 bytes, irq_potenciometer.o(.text))
+
[Stack]
Potenciometer_init (Thumb, 84 bytes, Stack size 0 bytes, lib_potenciometer.o(.text))
+
[Called By]
joystick (Thumb, 110 bytes, Stack size 0 bytes, joystick.o(.text))
+
[Called By]
enable_timer (Thumb, 20 bytes, Stack size 0 bytes, lib_timer.o(.text))
+
[Called By]
disable_timer (Thumb, 20 bytes, Stack size 0 bytes, lib_timer.o(.text), UNUSED) + +
reset_timer (Thumb, 30 bytes, Stack size 0 bytes, lib_timer.o(.text), UNUSED) + +
init_timer (Thumb, 60 bytes, Stack size 16 bytes, lib_timer.o(.text))
+
[Stack]
black_screen (Thumb, 10 bytes, Stack size 0 bytes, lib_movement.o(.text))
+
[Stack]
delay_ms (Thumb, 26 bytes, Stack size 0 bytes, lib_movement.o(.text))
+
[Called By]
Winner (Thumb, 562 bytes, Stack size 48 bytes, lib_movement.o(.text))
+
[Stack]
print_point (Thumb, 64 bytes, Stack size 8 bytes, lib_movement.o(.text))
+
[Stack]
colition (Thumb, 164 bytes, Stack size 24 bytes, lib_movement.o(.text))
+
[Stack]
findeljuego (Thumb, 792 bytes, Stack size 48 bytes, lib_movement.o(.text))
+
[Stack]
print (Thumb, 52 bytes, Stack size 8 bytes, lib_movement.o(.text))
+
[Stack]
erase (Thumb, 138 bytes, Stack size 16 bytes, lib_movement.o(.text))
+
[Stack]
Direction_change_print (Thumb, 336 bytes, Stack size 8 bytes, lib_movement.o(.text))
+
[Stack]
direction_change (Thumb, 312 bytes, Stack size 8 bytes, lib_movement.o(.text))
+
[Stack]
movement (Thumb, 298 bytes, Stack size 8 bytes, lib_movement.o(.text))
+
[Stack]
movementOriginal (Thumb, 476 bytes, Stack size 8 bytes, lib_movement.o(.text), UNUSED)
+
[Calls]
press_select (Thumb, 52 bytes, Stack size 8 bytes, menu.o(.text))
+
[Stack]
configuration (Thumb, 1370 bytes, Stack size 48 bytes, menu.o(.text))
+
[Stack]
play_game (Thumb, 116 bytes, Stack size 8 bytes, menu.o(.text))
+
[Stack]
instructions (Thumb, 516 bytes, Stack size 40 bytes, menu.o(.text))
+
[Stack]
complete_menu (Thumb, 1054 bytes, Stack size 32 bytes, menu.o(.text))
+
[Stack]
introduction (Thumb, 350 bytes, Stack size 40 bytes, menu.o(.text))
+
[Stack]
opening (Thumb, 44 bytes, Stack size 8 bytes, menu.o(.text))
+
[Stack]
__aeabi_uldivmod (Thumb, 0 bytes, Stack size 48 bytes, lludivv7m.o(.text), UNUSED)
+
[Called By]
_ll_udiv (Thumb, 238 bytes, Stack size 48 bytes, lludivv7m.o(.text), UNUSED) + +
srand (Thumb, 42 bytes, Stack size 8 bytes, rand.o(.text))
+
[Stack]
_rand_init (Thumb, 4 bytes, Stack size 0 bytes, rand.o(.text))
+
[Stack]
__user_setup_stackheap (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
+
[Stack]
+
delay (Thumb, 14 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
lcd_send (Thumb, 44 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
wr_cmd (Thumb, 44 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
wr_dat (Thumb, 44 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
wr_reg (Thumb, 36 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
rd_reg (Thumb, 38 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
wr_dat_start (Thumb, 10 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
wr_dat_stop (Thumb, 10 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(.text))
+
[Called By]
wr_dat_only (Thumb, 32 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
rd_dat (Thumb, 98 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(.text))
+
[Stack]
__NVIC_EnableIRQ (Thumb, 26 bytes, Stack size 0 bytes, lib_button.o(.text))
+
[Called By]
__NVIC_EnableIRQ (Thumb, 26 bytes, Stack size 0 bytes, lib_timer.o(.text))
+
[Called By]
+
+µVision Build Log
+Project:
+C:\Users\Barbara Rizzioli\Desktop\sample\sample.uvproj +Project File Date: 10/01/2014 + +Output:
+Build target 'Target 1' +assembling startup_LPC17xx.s... +compiling sample.c... +compiling core_cm3.c... +compiling system_LPC17xx.c... +compiling funct_timer.c... +compiling IRQ_timer.c... +compiling lib_timer.c... +compiling funct_led.c... +compiling lib_led.c... +compiling lib_adc.c... +compiling IRQ_adc.c... +adc\IRQ_adc.c(47): warning: #223-D: function "sprintf" declared implicitly +compiling IRQ_systick.c... +compiling IRQ_button.c... +compiling lib_button.c... +compiling AsciiLib.c... +compiling GLCD.c... +compiling HzLib.c... +compiling lib_Serial.c... +compiling IRQ_serial.c... +linking... +Program Size: Code=16944 RO-data=1852 RW-data=56 ZI-data=608 +"sample.axf" - 0 Error(s), 1 Warning(s). +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +USB Communication Failure +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +USB Communication Failure +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +USB Communication Failure +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +USB Communication Failure +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +USB Communication Failure +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +Set JLink Project File to "C:\Users\Barbara Rizzioli\Desktop\sample\JLinkSettings.ini" + +JLink info: +------------ +DLL: V4.20c, compiled Sep 24 2010 19:46:42 +Firmware: J-Link ARM-OB STM32 compiled Aug 22 2012 19:52:04 +Hardware: V7.00 +Feature(s) : RDI,FlashDL,FlashBP,JFlash,GDBFull + +* JLink Info: TotalIRLen = 4, IRPrint = 0x01 +* JLink Info: Found Cortex-M3 r2p0, Little endian. +* JLink Info: TPIU fitted. +* JLink Info: ETM fitted. +* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots +ROMTableAddr = 0xE00FF003 + +Target info: +------------ +Device: LPC1768 +VTarget = 3.300V +State of Pins: +TCK: 1, TDI: 0, TDO: 1, TMS: 0, TRES: 1, TRST: 1 +* JLink Info: TotalIRLen = 4, IRPrint = 0x01 +* JLink Info: Found Cortex-M3 r2p0, Little endian. +* JLink Info: TPIU fitted. +* JLink Info: ETM fitted. +* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots +Hardware-Breakpoints: 6 +Software-Breakpoints: 2048 +Watchpoints: 4 +JTAG speed: 2000 kHz + +No Algorithm found for: 00000000H - 000049A3H +Erase skipped! +Load "C:\\Users\\Barbara Rizzioli\\Desktop\\sample\\sample.AXF" +Set JLink Project File to "C:\Users\Barbara Rizzioli\Desktop\sample\JLinkSettings.ini" + +JLink info: +------------ +DLL: V4.20c, compiled Sep 24 2010 19:46:42 +Firmware: J-Link ARM-OB STM32 compiled Aug 22 2012 19:52:04 +Hardware: V7.00 +Feature(s) : RDI,FlashDL,FlashBP,JFlash,GDBFull + +* JLink Info: TotalIRLen = 4, IRPrint = 0x01 +* JLink Info: Found Cortex-M3 r2p0, Little endian. +* JLink Info: TPIU fitted. +* JLink Info: ETM fitted. +* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots +ROMTableAddr = 0xE00FF003 + +Target info: +------------ +Device: LPC1768 +VTarget = 3.300V +State of Pins: +TCK: 1, TDI: 0, TDO: 1, TMS: 0, TRES: 1, TRST: 1 +* JLink Info: TotalIRLen = 4, IRPrint = 0x01 +* JLink Info: Found Cortex-M3 r2p0, Little endian. +* JLink Info: TPIU fitted. +* JLink Info: ETM fitted. +* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots +Hardware-Breakpoints: 6 +Software-Breakpoints: 2048 +Watchpoints: 4 +JTAG speed: 2000 kHz + +No Algorithm found for: 00000000H - 000049A3H +Erase skipped! +Build target 'Target 1' +assembling startup_LPC17xx.s... +compiling sample.c... +compiling core_cm3.c... +compiling system_LPC17xx.c... +compiling funct_led.c... +compiling lib_led.c... +compiling IRQ_button.c... +compiling lib_button.c... +linking... +sample.axf: Error: L6218E: Undefined symbol AD_current (referred from irq_button.o). +sample.axf: Error: L6218E: Undefined symbol LED_DISPLAY (referred from irq_button.o). +Target not created +Build target 'Target 1' +assembling startup_LPC17xx.s... +compiling sample.c... +compiling core_cm3.c... +compiling system_LPC17xx.c... +compiling funct_led.c... +compiling lib_led.c... +compiling IRQ_button.c... +compiling lib_button.c... +linking... +Program Size: Code=1256 RO-data=236 RW-data=8 ZI-data=608 +"sample.axf" - 0 Error(s), 0 Warning(s). diff --git a/sample.sct b/sample.sct new file mode 100644 index 0000000..5e74379 --- /dev/null +++ b/sample.sct @@ -0,0 +1,18 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00080000 { ; load region size_region + ER_IROM1 0x00000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x10000000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } + RW_IRAM2 0x2007C000 0x00008000 { + .ANY (+RW +ZI) + } +} + diff --git a/sample.tra b/sample.tra new file mode 100644 index 0000000..4e9c4da --- /dev/null +++ b/sample.tra @@ -0,0 +1,26 @@ +*** Creating Trace Output File 'sample.tra' Ok. +### Preparing for ADS-LD. +### Creating ADS-LD Command Line +### List of Objects: adding '"startup_lpc17xx.o"' +### List of Objects: adding '"sample.o"' +### List of Objects: adding '"core_cm3.o"' +### List of Objects: adding '"system_lpc17xx.o"' +### List of Objects: adding '"funct_led.o"' +### List of Objects: adding '"lib_led.o"' +### List of Objects: adding '"irq_button.o"' +### List of Objects: adding '"lib_button.o"' +### ADS-LD Command completed: +--cpu Cortex-M3 "startup_lpc17xx.o" "sample.o" "core_cm3.o" "system_lpc17xx.o" "funct_led.o" "lib_led.o" "irq_button.o" "lib_button.o" --strict --scatter "sample.sct" +--autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols +--info sizes --info totals --info unused --info veneers + --list ".\sample.map" -o "sample.axf"### Preparing Environment (PrepEnvAds) +### ADS-LD Output File: 'sample.axf' +### ADS-LD Command File: 'sample.lnp' +### Checking for dirty Components... +### Creating CmdFile 'sample.lnp', Handle=0x0000082C +### Writing '.lnp' file +### ADS-LD Command file 'sample.lnp' is ready. +### ADS-LD: About to start ADS-LD Thread. +### ADS-LD: executed with 0 errors +### Updating obj list +### LDADS_file() completed. diff --git a/sample.uvgui.Barbara Rizzioli b/sample.uvgui.Barbara Rizzioli new file mode 100644 index 0000000..e0b478e --- /dev/null +++ b/sample.uvgui.Barbara Rizzioli @@ -0,0 +1,1442 @@ + ++ + diff --git a/sample.uvgui.Paolo b/sample.uvgui.Paolo new file mode 100644 index 0000000..4f24e26 --- /dev/null +++ b/sample.uvgui.Paolo @@ -0,0 +1,2644 @@ + +-4.1 + +### uVision Project, (C) Keil Software + ++ + + + ++ +38003 +Registers +115 102 ++ +346 +Code Coverage +735 160 ++ +204 +Performance Analyzer +895 ++ + ++ +1506 +Symbols ++ 133 133 133 ++ +1936 +Watch 1 ++ 133 133 133 ++ +1937 +Watch 2 ++ 133 133 133 ++ +1935 +Call Stack + Locals ++ 133 133 133 ++ +2506 +Trace Data ++ 75 135 130 95 70 230 200 ++ + ++ +0 +0 +0 ++ + ++ + +44 +2 +3 ++ +-1 +-1 ++ +-1 +-1 ++ +182 +182 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++ +0 +1366 +768 ++ + +1 +0 ++ +100 +1 ++ +.\startup_LPC17xx.s +61 +88 +80 +1 ++ 0 ++ +.\sample.c +60 +70 +93 +1 ++ 0 ++ + diff --git a/sample.uvoptx b/sample.uvoptx new file mode 100644 index 0000000..a5b8db7 --- /dev/null +++ b/sample.uvoptx @@ -0,0 +1,591 @@ + +1.0 + +### uVision Project, (C) Keil Software + ++ + +*.c +*.s*; *.src; *.a* +*.obj +*.lib +*.txt; *.h; *.inc +*.plm +*.cpp ++ + +0 +0 ++ + +Target 1 +0x4 +ARM-ADS ++ +12000000 ++ +1 +1 +1 +0 ++ +1 +65535 +0 +0 +0 ++ +79 +66 +8 +.\ ++ +1 +1 +1 +0 +1 +1 +0 +1 +0 +0 +0 +0 ++ +1 +1 +1 +1 +1 +1 +1 +0 +0 ++ +1 +0 +1 +8 ++ ++ +0 +Data Sheet +DATASHTS\PHILIPS\LPC176x_DS.pdf ++ +1 +User Manual +C:\Users\paolo\Documents\My Courses\BUONARROTI_Trento\materiale_corso\sample\DATASHTS\PHILIPS\LPC17xx_UM.pdf ++ +2 +Errata Sheet +DATASHTS\PHILIPS\LPC1768_ES.pdf ++ +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +1 +0 +1 +1 +0 +0 +0 +1 ++ + + + + + + + + + BIN\UL2CM3.DLL ++ ++ +0 +JL2CM3 +-U4294967295 -O47 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC800 -FN0 ++ +0 +DLGTARM +(1010=27,222,393,768,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=666,489,905,733,1)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=-1,-1,-1,-1,0)(291=-1,-1,-1,-1,0)(302=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=919,126,1290,743,1)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=293,283,881,457,1)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=850,2,1366,479,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) ++ +0 +DLGUARM +(105=-1,-1,-1,-1,0) ++ +0 +DLGDARM +(1010=514,206,880,752,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=-1,-1,-1,-1,0)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=151,60,1015,585,0)(291=314,243,617,418,0)(302=-1,-1,-1,-1,0)(110=388,206,724,524,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=618,77,989,694,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=665,298,1253,493,0)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(199=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) ++ +0 +ARMDBGFLAGS +-T0 ++ +0 +UL2CM3 +-UV0010M9E -O271 -S7 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 ++ ++ +0 +0 +21 +1 + 546 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + +1 +0 +14 +1 + 516 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + +2 +0 +7 +1 + 492 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + ++ +0 +1 +led_value ++ +1 +1 +on_off ++ +2 +1 +ON_OFF ++ +3 +1 +ON_OFF ++ +4 +1 +ON_OFF ++ ++ +0 +2 +ON_OFF ++ +0 ++ +0 +1 +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ + + + +startup_file +0 +0 +0 +0 ++ +1 +1 +2 +0 +0 +0 +0 +0 +0 +0 +.\startup_LPC17xx.s +startup_LPC17xx.s +0 +0 ++ + +main +1 +0 +0 +0 ++ +2 +2 +1 +0 +0 +14 +0 +1 +21 +0 +.\sample.c +sample.c +0 +0 ++ + +lib_SoC_board +0 +0 +0 +0 ++ +3 +3 +1 +0 +0 +0 +0 +0 +0 +0 +.\core_cm3.c +core_cm3.c +0 +0 ++ +3 +4 +1 +1 +0 +0 +0 +0 +0 +0 +.\system_LPC17xx.c +system_LPC17xx.c +0 +0 ++ + +led +1 +0 +0 +0 ++ +4 +5 +1 +0 +0 +0 +0 +0 +0 +0 +.\led\funct_led.c +funct_led.c +0 +0 ++ +4 +6 +1 +0 +0 +0 +0 +1 +23 +0 +.\led\lib_led.c +lib_led.c +0 +0 ++ +4 +7 +5 +0 +0 +15 +0 +0 +0 +0 +.\led\led.h +led.h +0 +0 ++ + +button_EINT +1 +0 +0 +0 ++ +5 +8 +5 +0 +0 +0 +0 +0 +0 +0 +.\button_EXINT\button.h +button.h +0 +0 ++ +5 +9 +1 +0 +0 +0 +0 +1 +17 +0 +.\button_EXINT\IRQ_button.c +IRQ_button.c +0 +0 ++ +5 +10 +1 +0 +0 +0 +0 +1 +24 +0 +.\button_EXINT\lib_button.c +lib_button.c +0 +0 ++ + diff --git a/sample.uvproj.saved_uv4 b/sample.uvproj.saved_uv4 new file mode 100644 index 0000000..307cc85 --- /dev/null +++ b/sample.uvproj.saved_uv4 @@ -0,0 +1,484 @@ + +1.0 + +### uVision Project, (C) Keil Software + ++ + +*.c +*.s*; *.src; *.a* +*.obj; *.o +*.lib +*.txt; *.h; *.inc +*.plm +*.cpp +0 ++ + +0 +0 ++ + +Target 1 +0x4 +ARM-ADS ++ +12000000 ++ +1 +1 +1 +0 +0 ++ +1 +65535 +0 +0 +0 ++ +79 +66 +8 +.\ ++ +1 +1 +1 +0 +1 +1 +0 +1 +0 +0 +0 +0 ++ +1 +1 +1 +1 +1 +1 +1 +0 +0 ++ +1 +0 +1 +8 ++ +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +1 +0 +1 +1 +0 +0 +1 +0 ++ + + + + + + + + + BIN\UL2CM3.DLL ++ ++ +0 +ARMRTXEVENTFLAGS +-L70 -Z18 -C0 -M0 -T1 ++ +0 +UL2CM3 +-UV0010M9E -O463 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512.FLM -FS00 -FL080000 -FP0($$Device:LPC1768$Flash\LPC_IAP_512.FLM) ++ +0 +DLGTARM +(1010=27,222,393,768,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=666,489,915,743,1)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=-1,-1,-1,-1,0)(291=-1,-1,-1,-1,0)(302=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=777,141,1158,768,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=293,283,891,467,0)(335=150,186,748,370,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=850,2,1366,479,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=270,203,712,707,0)(240=-1,-1,-1,-1,0) ++ +0 +DLGUARM +(105=-1,-1,-1,-1,0) ++ +0 +DLGDARM +(1010=514,206,880,752,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=-1,-1,-1,-1,0)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=151,60,1015,585,0)(291=314,243,617,418,0)(302=-1,-1,-1,-1,0)(110=388,206,724,524,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=618,77,989,694,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=665,298,1253,493,0)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(199=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) ++ +0 +ARMDBGFLAGS +-T0 ++ + ++ +0 +1 +led_value ++ +1 +1 +on_off ++ +2 +1 +ON_OFF ++ +3 +1 +ON_OFF ++ +4 +1 +ON_OFF ++ ++ +0 +2 +ON_OFF ++ +0 ++ +0 +1 +1 +0 +0 +0 +0 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ + 0 +0 +0 ++ + + + + + + + + +1 +0 +2 +10000000 ++ + +startup_file +1 +0 +0 +0 ++ +1 +1 +2 +0 +0 +0 +.\startup_LPC17xx.s +startup_LPC17xx.s +0 +0 ++ + +main +1 +0 +0 +0 ++ +2 +2 +1 +0 +0 +0 +.\sample.c +sample.c +0 +0 ++ + +lib_SoC_board +1 +0 +0 +0 ++ +3 +3 +1 +0 +0 +0 +.\core_cm3.c +core_cm3.c +0 +0 ++ +3 +4 +1 +0 +0 +0 +.\system_LPC17xx.c +system_LPC17xx.c +0 +0 ++ +3 +5 +5 +0 +0 +0 +.\GLCD.h +GLCD.h +0 +0 ++ +3 +6 +1 +0 +0 +0 +.\GLCD_SPI_LPC1700.c +GLCD_SPI_LPC1700.c +0 +0 ++ +3 +7 +1 +1 +0 +0 +.\IRQ.c +IRQ.c +0 +0 ++ + +button_EXINT +1 +0 +0 +0 ++ +4 +8 +5 +0 +0 +0 +.\button_EXINT\button.h +button.h +0 +0 ++ +4 +9 +1 +0 +0 +0 +.\button_EXINT\IRQ_button.c +IRQ_button.c +0 +0 ++ +4 +10 +1 +0 +0 +0 +.\button_EXINT\lib_button.c +lib_button.c +0 +0 ++ + +Potenciometer +1 +0 +0 +0 ++ +5 +11 +1 +0 +0 +0 +.\potenciometer\IRQ_potenciometer.c +IRQ_potenciometer.c +0 +0 ++ +5 +12 +1 +0 +0 +0 +.\potenciometer\Lib_potenciometer.c +Lib_potenciometer.c +0 +0 ++ +5 +13 +5 +0 +0 +0 +.\potenciometer\Potenciometer.h +Potenciometer.h +0 +0 ++ + +Joystick +1 +0 +0 +0 ++ +6 +14 +1 +0 +0 +0 +.\Joystick\joystick.c +joystick.c +0 +0 ++ +6 +15 +5 +0 +0 +0 +.\Joystick\joystick.h +joystick.h +0 +0 ++ + +timer +1 +0 +0 +0 ++ +7 +16 +1 +0 +0 +0 +.\timer\funct_timer.c +funct_timer.c +0 +0 ++ +7 +17 +1 +0 +0 +0 +.\timer\IRQ_timer.c +IRQ_timer.c +0 +0 ++ +7 +18 +1 +0 +0 +0 +.\timer\lib_timer.c +lib_timer.c +0 +0 ++ +7 +19 +5 +0 +0 +0 +.\timer\timer.h +timer.h +0 +0 ++ + +movement +1 +0 +0 +0 ++ +8 +20 +1 +0 +0 +0 +.\movement\lib_movement.c +lib_movement.c +0 +0 ++ +8 +21 +5 +0 +0 +0 +.\movement\movement.h +movement.h +0 +0 ++ + +menu +1 +0 +0 +0 ++ +9 +22 +1 +0 +0 +0 +.\menu\menu.c +menu.c +0 +0 ++ +9 +23 +5 +0 +0 +0 +.\menu\menu.h +menu.h +0 +0 ++ + +::CMSIS +0 +0 +0 +1 ++ + diff --git a/sample.uvprojx b/sample.uvprojx new file mode 100644 index 0000000..bd80724 --- /dev/null +++ b/sample.uvprojx @@ -0,0 +1,560 @@ + +1.1 + +### uVision Project, (C) Keil Software + ++ + ++ +Target 1 +0x4 +ARM-ADS ++ ++ +LPC1768 +NXP (founded by Philips) +IRAM(0x10000000-0x10007FFF) IRAM2(0x2007C000-0x20083FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3") ++ "STARTUP\NXP\LPC17xx\startup_LPC17xx.s" ("NXP LPC17xx Startup Code") +UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000) +4868 +LPC17xx.H ++ + + + + + + + + + 0 +0 ++ + + NXP\LPC17xx\ +NXP\LPC17xx\ ++ +0 +0 +0 +0 +1 +.\ +sample +1 +0 +0 +1 +1 +.\ +1 +0 +0 ++ +0 +0 ++ + 0 +0 +0 +0 ++ +0 +0 ++ + 0 +0 ++ +0 +0 ++ + 0 +0 +0 ++ + +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +3 ++ + 1 ++ +SARMCM3.DLL +-MPU +DARMP1.DLL +-pLPC1768 +SARMCM3.DLL +-MPU +TARMP1.DLL +-pLPC1768 ++ ++ +1 +0 +0 +0 +16 ++ +0 +1 +1 +1 +1 +1 +1 +1 +0 +1 ++ +1 +1 +1 +1 +1 +1 +0 +1 +0 +1 +0 +0 +1 ++ ++ + + + + + ++ + + + + BIN\UL2CM3.DLL ++ ++ +1 +0 +0 +1 +1 +4096 +0 +BIN\UL2CM3.DLL +"" () ++ + + + 0 ++ ++ +0 +1 +1 +1 +1 +1 +1 +1 +0 +1 +1 +0 +1 +1 +0 +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +0 +"Cortex-M3" ++ 0 +0 +0 +1 +1 +0 +0 +0 +1 +0 +8 +0 +0 +0 +3 +3 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +1 +0 ++ ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +1 +0x0 +0x80000 ++ +0 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x80000 ++ +1 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +0 +0x2007c000 +0x8000 ++ + +1 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +0 +0 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +1 +0 +0x00000000 +0x10000000 ++ sample.sct ++ + + + + + ++ +startup_file ++ ++ +startup_LPC17xx.s +2 +.\startup_LPC17xx.s ++ +main ++ ++ +sample.c +1 +.\sample.c ++ +lib_SoC_board ++ ++ +core_cm3.c +1 +.\core_cm3.c ++ +system_LPC17xx.c +1 +.\system_LPC17xx.c ++ +led ++ ++ +funct_led.c +1 +.\led\funct_led.c ++ +lib_led.c +1 +.\led\lib_led.c ++ +led.h +5 +.\led\led.h ++ +button_EINT ++ ++ +button.h +5 +.\button_EXINT\button.h ++ +IRQ_button.c +1 +.\button_EXINT\IRQ_button.c ++ +lib_button.c +1 +.\button_EXINT\lib_button.c ++ + diff --git a/sample_Target 1.dep b/sample_Target 1.dep new file mode 100644 index 0000000..4ea2f3e --- /dev/null +++ b/sample_Target 1.dep @@ -0,0 +1,163 @@ +Dependencies for Project 'sample', Target 'Target 1': (DO NOT MODIFY !) +F (.\startup_LPC17xx.s)(0x4CCAADFA)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include --pd "__UVISION_VERSION SETA 524" --pd "_RTE_ SETA 1" --pd "LPC175x_6x SETA 1" --list .\startup_lpc17xx.lst --xref -o .\startup_lpc17xx.o --depend .\startup_lpc17xx.d) +F (.\sample.c)(0x5B07131B)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\sample.o --omf_browse .\sample.crf --depend .\sample.d) +I (C:\Keil_P\ARM\ARMCC\include\stdio.h)(0x588BE5B4) +I (C:\Keil_P\ARM\ARMCC\include\stdlib.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\LPC17xx.H)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (button_EXINT/button.h)(0x5A36980A) +I (potenciometer/potenciometer.h)(0x5B016CE3) +I (timer/timer.h)(0x5A398CEC) +I (GLCD.h)(0x5B01C50A) +I (movement/movement.h)(0x5B030314) +I (menu/menu.h)(0x5B055496) +F (.\core_cm3.c)(0x4AC99CCC)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\core_cm3.o --omf_browse .\core_cm3.crf --depend .\core_cm3.d) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +F (.\system_LPC17xx.c)(0x4DA556B0)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\system_lpc17xx.o --omf_browse .\system_lpc17xx.crf --depend .\system_lpc17xx.d) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\LPC17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +F (.\GLCD.h)(0x5B01C50A)() +F (.\GLCD_SPI_LPC1700.c)(0x5B0715F2)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\glcd_spi_lpc1700.o --omf_browse .\glcd_spi_lpc1700.crf --depend .\glcd_spi_lpc1700.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (GLCD.h)(0x5B01C50A) +I (Font_6x8_h.h)(0x4CADA788) +I (Font_16x24_h.h)(0x4CA49BAE) +I (movement/movement.h)(0x5B030314) +F (.\IRQ.c)(0x5AA2B8F1)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\irq.o --omf_browse .\irq.crf --depend .\irq.d) +F (.\button_EXINT\button.h)(0x5A36980A)() +F (.\button_EXINT\IRQ_button.c)(0x5B02F9F4)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\irq_button.o --omf_browse .\irq_button.crf --depend .\irq_button.d) +I (button_EXINT\button.h)(0x5A36980A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (button_EXINT\../menu/menu.h)(0x5B055496) +F (.\button_EXINT\lib_button.c)(0x5A36949F)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\lib_button.o --omf_browse .\lib_button.crf --depend .\lib_button.d) +I (button_EXINT\button.h)(0x5A36980A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +F (.\potenciometer\IRQ_potenciometer.c)(0x5B07090C)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\irq_potenciometer.o --omf_browse .\irq_potenciometer.crf --depend .\irq_potenciometer.d) +I (potenciometer\potenciometer.h)(0x5B016CE3) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (potenciometer\../timer/timer.h)(0x5A398CEC) +I (potenciometer\../GLCD.h)(0x5B01C50A) +F (.\potenciometer\Lib_potenciometer.c)(0x5B016D6D)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\lib_potenciometer.o --omf_browse .\lib_potenciometer.crf --depend .\lib_potenciometer.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (potenciometer\Potenciometer.h)(0x5B016CE3) +F (.\potenciometer\Potenciometer.h)(0x5B016CE3)() +F (.\Joystick\joystick.c)(0x5B02E4A3)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\joystick.o --omf_browse .\joystick.crf --depend .\joystick.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +F (.\Joystick\joystick.h)(0x5B016DD3)() +F (.\timer\funct_timer.c)(0x542423F0)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\funct_timer.o --omf_browse .\funct_timer.crf --depend .\funct_timer.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (timer\timer.h)(0x5A398CEC) +F (.\timer\IRQ_timer.c)(0x5A8C2CEA)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\irq_timer.o --omf_browse .\irq_timer.crf --depend .\irq_timer.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (timer\timer.h)(0x5A398CEC) +I (timer\../Potenciometer/potenciometer.h)(0x5B016CE3) +F (.\timer\lib_timer.c)(0x5A3B831C)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\lib_timer.o --omf_browse .\lib_timer.crf --depend .\lib_timer.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (timer\timer.h)(0x5A398CEC) +F (.\timer\timer.h)(0x5A398CEC)() +F (.\movement\lib_movement.c)(0x5B071C14)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\lib_movement.o --omf_browse .\lib_movement.crf --depend .\lib_movement.d) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\ARMCC\include\stdlib.h)(0x588BE5B4) +I (movement\../GLCD.h)(0x5B01C50A) +I (movement\../movement/movement.h)(0x5B030314) +I (movement\../Joystick/joystick.h)(0x5B016DD3) +I (movement\../menu/menu.h)(0x5B055496) +F (.\movement\movement.h)(0x5B030314)() +F (.\menu\menu.c)(0x5B071D5C)(-c --cpu Cortex-M3 -D__EVAL -g -O0 --apcs=interwork -I.\RTE\_Target_1 -IC:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include -D__UVISION_VERSION="524" -D_RTE_ -DLPC175x_6x -o .\menu.o --omf_browse .\menu.crf --depend .\menu.d) +I (C:\Keil_P\ARM\ARMCC\include\stdio.h)(0x588BE5B4) +I (C:\Keil_P\ARM\ARMCC\include\stdlib.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\lpc17xx.h)(0x58493F92) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\ARMCC\include\stdint.h)(0x588BE5B4) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h)(0x5A0DBE6A) +I (C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h)(0x58493F92) +I (menu\../GLCD.h)(0x5B01C50A) +I (menu\../button_EXINT/button.h)(0x5A36980A) +I (menu\../Joystick/joystick.h)(0x5B016DD3) +I (menu\../movement/movement.h)(0x5B030314) +F (.\menu\menu.h)(0x5B055496)() diff --git a/sample_sct.Bak b/sample_sct.Bak new file mode 100644 index 0000000..5337368 --- /dev/null +++ b/sample_sct.Bak @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00080000 { ; load region size_region + ER_IROM1 0x00000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x10000000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/sample_uvopt.bak b/sample_uvopt.bak new file mode 100644 index 0000000..f62046c --- /dev/null +++ b/sample_uvopt.bak @@ -0,0 +1,482 @@ + +2.1 + +### uVision Project, (C) Keil Software + ++ + ++ +Target 1 +0x4 +ARM-ADS +5060528::V5.06 update 5 (build 528)::ARMCC +0 ++ ++ +LPC1768 +NXP +Keil.LPC1700_DFP.2.4.0 +http://www.keil.com/pack/ +IRAM(0x10000000,0x8000) IRAM2(0x2007C000,0x8000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE ++ + UL2CM3(-S0 -C0 -P0 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 -FP0($$Device:LPC1768$Flash\LPC_IAP_512.FLM)) +4868 +$$Device:LPC1768$Device\Include\LPC17xx.h ++ + + + + + + + + $$Device:LPC1768$SVD\LPC176x5x.svd +0 +0 ++ + + + + + +0 +0 +0 +0 +1 +.\ +sample +1 +0 +0 +1 +1 +.\ +1 +0 +0 ++ +0 +0 ++ + 0 +0 +0 +0 ++ +0 +0 ++ + 0 +0 +0 +0 ++ +0 +0 ++ + 0 +0 +0 +0 +0 ++ + +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +3 ++ + 1 ++ +SARMCM3.DLL +-MPU +DARMP1.DLL +-pLPC1768 +SARMCM3.DLL +-MPU +TARMP1.DLL +-pLPC1768 ++ ++ +1 +0 +0 +0 +16 ++ ++ +1 +0 +0 +1 +1 +4096 +0 +BIN\UL2CM3.DLL ++ + + + + 0 ++ ++ +0 +1 +1 +1 +1 +1 +1 +1 +0 +1 +1 +0 +1 +1 +0 +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +0 +"Cortex-M3" ++ 0 +0 +0 +1 +1 +0 +0 +0 +1 +0 +8 +0 +0 +0 +0 +3 +4 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +1 +1 ++ ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +1 +0x0 +0x80000 ++ +0 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x80000 ++ +1 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +0 +0x2007c000 +0x8000 ++ + +1 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +1 +0 +0x00000000 +0x10000000 ++ sample.sct ++ + + + + + ++ +startup_file ++ ++ +startup_LPC17xx.s +2 +.\startup_LPC17xx.s ++ +main ++ ++ +sample.c +1 +.\sample.c ++ +lib_SoC_board ++ ++ +core_cm3.c +1 +.\core_cm3.c ++ +system_LPC17xx.c +1 +.\system_LPC17xx.c ++ +GLCD.h +5 +.\GLCD.h ++ +GLCD_SPI_LPC1700.c +1 +.\GLCD_SPI_LPC1700.c ++ +IRQ.c +1 +.\IRQ.c ++ +button_EXINT ++ ++ +button.h +5 +.\button_EXINT\button.h ++ +IRQ_button.c +1 +.\button_EXINT\IRQ_button.c ++ +lib_button.c +1 +.\button_EXINT\lib_button.c ++ +Potenciometer ++ ++ +IRQ_potenciometer.c +1 +.\potenciometer\IRQ_potenciometer.c ++ +Lib_potenciometer.c +1 +.\potenciometer\Lib_potenciometer.c ++ +Potenciometer.h +5 +.\potenciometer\Potenciometer.h ++ +Joystick ++ ++ +joystick.c +1 +.\Joystick\joystick.c ++ +joystick.h +5 +.\Joystick\joystick.h ++ +timer ++ ++ +funct_timer.c +1 +.\timer\funct_timer.c ++ +IRQ_timer.c +1 +.\timer\IRQ_timer.c ++ +lib_timer.c +1 +.\timer\lib_timer.c ++ +timer.h +5 +.\timer\timer.h ++ +movement ++ ++ +lib_movement.c +1 +.\movement\lib_movement.c ++ +movement.h +5 +.\movement\movement.h ++ +menu ++ ++ +menu.c +1 +.\menu\menu.c ++ +menu.h +5 +.\menu\menu.h ++ +::CMSIS ++ + ++ + ++ ++ + ++ + + + diff --git a/sample_uvproj.bak b/sample_uvproj.bak new file mode 100644 index 0000000..b9a81e3 --- /dev/null +++ b/sample_uvproj.bak @@ -0,0 +1,484 @@ + +1.0 + +### uVision Project, (C) Keil Software + ++ + +*.c +*.s*; *.src; *.a* +*.obj +*.lib +*.txt; *.h; *.inc +*.plm +*.cpp ++ + +0 +0 ++ + +Target 1 +0x4 +ARM-ADS ++ +12000000 ++ +1 +1 +1 +0 ++ +1 +65535 +0 +0 +0 ++ +79 +66 +8 +.\ ++ +1 +1 +1 +0 +1 +1 +0 +1 +0 +0 +0 +0 ++ +1 +1 +1 +1 +1 +1 +1 +0 +0 ++ +1 +0 +1 +8 ++ ++ +0 +Data Sheet +DATASHTS\PHILIPS\LPC176x_DS.pdf ++ +1 +User Manual +C:\Users\paolo\Documents\My Courses\BUONARROTI_Trento\materiale_corso\sample\DATASHTS\PHILIPS\LPC17xx_UM.pdf ++ +2 +Errata Sheet +DATASHTS\PHILIPS\LPC1768_ES.pdf ++ +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +1 +0 +1 +1 +0 +0 +0 +1 ++ + + + + + + + + + BIN\UL2CM3.DLL ++ ++ +0 +JL2CM3 +-U4294967295 -O47 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC800 -FN0 ++ +0 +DLGTARM +(1010=27,222,393,768,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=666,489,905,733,1)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=-1,-1,-1,-1,0)(291=-1,-1,-1,-1,0)(302=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=919,126,1290,743,1)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=293,283,881,457,1)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=850,2,1366,479,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) ++ +0 +DLGUARM +(105=-1,-1,-1,-1,0) ++ +0 +DLGDARM +(1010=514,206,880,752,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=-1,-1,-1,-1,0)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=151,60,1015,585,0)(291=314,243,617,418,0)(302=-1,-1,-1,-1,0)(110=388,206,724,524,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=618,77,989,694,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=665,298,1253,493,0)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(199=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) ++ +0 +ARMDBGFLAGS +-T0 ++ +0 +UL2CM3 +-UV0010M9E -O271 -S7 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 ++ ++ +0 +0 +21 +1 + 546 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + +1 +0 +14 +1 + 516 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + +2 +0 +7 +1 + 492 +0 +0 +0 +0 +0 +1 +.\button_EXINT\IRQ_button.c ++ + + ++ +0 +1 +led_value ++ +1 +1 +on_off ++ +2 +1 +ON_OFF ++ +3 +1 +ON_OFF ++ +4 +1 +ON_OFF ++ ++ +0 +2 +ON_OFF ++ +0 ++ +0 +1 +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ + + + +startup_file +0 +0 +0 +0 ++ +1 +1 +2 +0 +0 +0 +0 +0 +0 +0 +.\startup_LPC17xx.s +startup_LPC17xx.s +0 +0 ++ + +main +1 +0 +0 +0 ++ +2 +2 +1 +0 +0 +0 +0 +1 +29 +0 +.\sample.c +sample.c +0 +0 ++ + +lib_SoC_board +0 +0 +0 +0 ++ +3 +3 +1 +0 +0 +0 +0 +0 +0 +0 +.\core_cm3.c +core_cm3.c +0 +0 ++ +3 +4 +1 +1 +0 +0 +0 +0 +0 +0 +.\system_LPC17xx.c +system_LPC17xx.c +0 +0 ++ + +led +1 +0 +0 +0 ++ +4 +5 +1 +0 +0 +0 +0 +0 +0 +0 +.\led\funct_led.c +funct_led.c +0 +0 ++ +4 +6 +1 +0 +0 +2 +0 +1 +24 +0 +.\led\lib_led.c +lib_led.c +0 +0 ++ +4 +7 +5 +0 +0 +15 +0 +0 +0 +0 +.\led\led.h +led.h +0 +0 ++ + +button_EINT +1 +0 +0 +0 ++ +5 +8 +5 +0 +0 +0 +0 +0 +0 +0 +.\button_EXINT\button.h +button.h +0 +0 ++ +5 +9 +1 +0 +0 +35 +0 +1 +22 +0 +.\button_EXINT\IRQ_button.c +IRQ_button.c +0 +0 ++ +5 +10 +1 +0 +0 +0 +0 +0 +0 +0 +.\button_EXINT\lib_button.c +lib_button.c +0 +0 ++ + diff --git a/serial.crf b/serial.crf new file mode 100644 index 0000000..daece8d Binary files /dev/null and b/serial.crf differ diff --git a/serial.d b/serial.d new file mode 100644 index 0000000..0b601d9 --- /dev/null +++ b/serial.d @@ -0,0 +1,8 @@ +serial.o: serial\Serial.c +serial.o: C:\Keil\ARM\INC\NXP\LPC17xx\LPC17xx.H +serial.o: C:\Keil\ARM\RV31\INC\core_cm3.h +serial.o: C:\Keil\ARM\RV31\INC\stdint.h +serial.o: C:\Keil\ARM\RV31\INC\core_cmInstr.h +serial.o: C:\Keil\ARM\RV31\INC\core_cmFunc.h +serial.o: C:\Keil\ARM\INC\NXP\LPC17xx\system_LPC17xx.h +serial.o: serial\Serial.h diff --git a/serial.o b/serial.o new file mode 100644 index 0000000..2c0a8a0 Binary files /dev/null and b/serial.o differ diff --git a/startup_LPC17xx.d b/startup_LPC17xx.d new file mode 100644 index 0000000..38479a0 --- /dev/null +++ b/startup_LPC17xx.d @@ -0,0 +1 @@ +.\startup_lpc17xx.o: startup_LPC17xx.s diff --git a/startup_LPC17xx.lst b/startup_LPC17xx.lst new file mode 100644 index 0000000..318dee1 --- /dev/null +++ b/startup_LPC17xx.lst @@ -0,0 +1,1074 @@ + + + +ARM Macro Assembler Page 1 + + + 1 00000000 ;/****************************************************** + *********************** + 2 00000000 ; * @file: startup_LPC17xx.s + 3 00000000 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File + 4 00000000 ; * for the NXP LPC17xx Device Series + 5 00000000 ; * @version: V1.01 + 6 00000000 ; * @date: 21. December 2009 + 7 00000000 ; *------- <<< Use Configuration Wizard in Context Menu + >>> ------------------ + 8 00000000 ; * + 9 00000000 ; * Copyright (C) 2009 ARM Limited. All rights reserved. + + 10 00000000 ; * ARM Limited (ARM) is supplying this software for use + with Cortex-M3 + 11 00000000 ; * processor based microcontrollers. This file can be + freely distributed + 12 00000000 ; * within development tools that are supporting such AR + M based processors. + 13 00000000 ; * + 14 00000000 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, W + HETHER EXPRESS, IMPLIED + 15 00000000 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED + WARRANTIES OF + 16 00000000 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + APPLY TO THIS SOFTWARE. + 17 00000000 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR S + PECIAL, INCIDENTAL, OR + 18 00000000 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + 19 00000000 ; * + 20 00000000 ; ****************************************************** + ***********************/ + 21 00000000 + 22 00000000 + 23 00000000 ;1.1 + +### uVision Project, (C) Keil Software + ++ + ++ +Target 1 +0x4 +ARM-ADS ++ ++ +LPC1768 +NXP (founded by Philips) +IRAM(0x10000000-0x10007FFF) IRAM2(0x2007C000-0x20083FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3") ++ "STARTUP\NXP\LPC17xx\startup_LPC17xx.s" ("NXP LPC17xx Startup Code") +UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000) +4868 +LPC17xx.H ++ + + + + + + + + + 0 +0 ++ + + NXP\LPC17xx\ +NXP\LPC17xx\ ++ +0 +0 +0 +0 +1 +.\ +sample +1 +0 +0 +1 +1 +.\ +1 +0 +0 ++ +0 +0 ++ + 0 +0 +0 +0 ++ +0 +0 ++ + 0 +0 ++ +0 +0 ++ + 0 +0 +0 ++ + +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +3 ++ + 1 ++ +SARMCM3.DLL +-MPU +DARMP1.DLL +-pLPC1768 +SARMCM3.DLL +-MPU +TARMP1.DLL +-pLPC1768 ++ ++ +1 +0 +0 +0 +16 ++ +1 +1 +1 +1 +1 +1 +1 +1 +0 +1 ++ +0 +1 +1 +1 +1 +1 +0 +1 +0 +1 +0 +0 +0 ++ ++ + + + + + ++ + + + + BIN\UL2CM3.DLL ++ ++ +1 +0 +0 +1 +1 +4096 +0 +BIN\UL2CM3.DLL +"" () ++ + + + 0 ++ ++ +0 +1 +1 +1 +1 +1 +1 +1 +0 +1 +1 +0 +1 +1 +0 +0 +1 +1 +1 +1 +1 +1 +1 +1 +1 +0 +0 +"Cortex-M3" ++ 0 +0 +0 +1 +1 +0 +0 +0 +1 +0 +8 +0 +0 +0 +3 +3 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +1 +0 +0 +0 +0 +1 +0 ++ ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +1 +0x0 +0x80000 ++ +0 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x0 ++ +1 +0x0 +0x80000 ++ +1 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x0 +0x0 ++ +0 +0x10000000 +0x8000 ++ +0 +0x2007c000 +0x8000 ++ + +1 +1 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +0 +0 +0 +0 +0 ++ ++ + + + + +1 +0 +0 +0 +1 +0 +0x00000000 +0x10000000 ++ sample.sct ++ + + + + + ++ +startup_file ++ ++ +startup_LPC17xx.s +2 +.\startup_LPC17xx.s ++ +main ++ ++ +sample.c +1 +.\sample.c ++ +lib_SoC_board ++ ++ +core_cm3.c +1 +.\core_cm3.c ++ +system_LPC17xx.c +1 +.\system_LPC17xx.c ++ +led ++ ++ +funct_led.c +1 +.\led\funct_led.c ++ +lib_led.c +1 +.\led\lib_led.c ++ +led.h +5 +.\led\led.h ++ +button_EINT ++ ++ +button.h +5 +.\button_EXINT\button.h ++ +IRQ_button.c +1 +.\button_EXINT\IRQ_button.c ++ +lib_button.c +1 +.\button_EXINT\lib_button.c +Stack Configuration + 24 00000000 ; + 26 00000000 + 27 00000000 00000200 + Stack_Size + EQU 0x00000200 + 28 00000000 + 29 00000000 AREA STACK, NOINIT, READWRITE, ALIGN +=3 + 30 00000000 Stack_Mem + SPACE Stack_Size + 31 00000200 __initial_sp + 32 00000200 + 33 00000200 + 34 00000200 ;Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + 25 00000000 ; Heap Configuration + 35 00000200 ; + 37 00000200 + 38 00000200 00000000 + Heap_Size + EQU 0x00000000 + 39 00000200 + 40 00000200 AREA HEAP, NOINIT, READWRITE, ALIGN= +3 + 41 00000000 __heap_base + + + +ARM Macro Assembler Page 2 + + + 42 00000000 Heap_Mem + SPACE Heap_Size + 43 00000000 __heap_limit + 44 00000000 + 45 00000000 + 46 00000000 PRESERVE8 + 47 00000000 THUMB + 48 00000000 + 49 00000000 + 50 00000000 ; Vector Table Mapped to Address 0 at Reset + 51 00000000 + 52 00000000 AREA RESET, DATA, READONLY + 53 00000000 EXPORT __Vectors + 54 00000000 + 55 00000000 00000000 + __Vectors + DCD __initial_sp ; Top of Stack + 56 00000004 00000000 DCD Reset_Handler ; Reset Handler + 57 00000008 00000000 DCD NMI_Handler ; NMI Handler + 58 0000000C 00000000 DCD HardFault_Handler ; Hard Fault + Handler + 59 00000010 00000000 DCD MemManage_Handler + ; MPU Fault Handler + + 60 00000014 00000000 DCD BusFault_Handler + ; Bus Fault Handler + + 61 00000018 00000000 DCD UsageFault_Handler ; Usage Faul + t Handler + 62 0000001C 00000000 DCD 0 ; Reserved + 63 00000020 00000000 DCD 0 ; Reserved + 64 00000024 00000000 DCD 0 ; Reserved + 65 00000028 00000000 DCD 0 ; Reserved + 66 0000002C 00000000 DCD SVC_Handler ; SVCall Handler + 67 00000030 00000000 DCD DebugMon_Handler ; Debug Monito + r Handler + 68 00000034 00000000 DCD 0 ; Reserved + 69 00000038 00000000 DCD PendSV_Handler ; PendSV Handler + + 70 0000003C 00000000 DCD SysTick_Handler + ; SysTick Handler + 71 00000040 + 72 00000040 ; External Interrupts + 73 00000040 00000000 DCD WDT_IRQHandler ; 16: Watchdog T + imer + 74 00000044 00000000 DCD TIMER0_IRQHandler ; 17: Timer0 + 75 00000048 00000000 DCD TIMER1_IRQHandler ; 18: Timer1 + 76 0000004C 00000000 DCD TIMER2_IRQHandler ; 19: Timer2 + 77 00000050 00000000 DCD TIMER3_IRQHandler ; 20: Timer3 + 78 00000054 00000000 DCD UART0_IRQHandler ; 21: UART0 + 79 00000058 00000000 DCD UART1_IRQHandler ; 22: UART1 + 80 0000005C 00000000 DCD UART2_IRQHandler ; 23: UART2 + 81 00000060 00000000 DCD UART3_IRQHandler ; 24: UART3 + 82 00000064 00000000 DCD PWM1_IRQHandler ; 25: PWM1 + 83 00000068 00000000 DCD I2C0_IRQHandler ; 26: I2C0 + 84 0000006C 00000000 DCD I2C1_IRQHandler ; 27: I2C1 + 85 00000070 00000000 DCD I2C2_IRQHandler ; 28: I2C2 + 86 00000074 00000000 DCD SPI_IRQHandler ; 29: SPI + 87 00000078 00000000 DCD SSP0_IRQHandler ; 30: SSP0 + + + +ARM Macro Assembler Page 3 + + + 88 0000007C 00000000 DCD SSP1_IRQHandler ; 31: SSP1 + 89 00000080 00000000 DCD PLL0_IRQHandler ; 32: PLL0 Lock + (Main PLL) + 90 00000084 00000000 DCD RTC_IRQHandler ; 33: Real Time + Clock + 91 00000088 00000000 DCD EINT0_IRQHandler ; 34: External + Interrupt 0 + 92 0000008C 00000000 DCD EINT1_IRQHandler ; 35: External + Interrupt 1 + 93 00000090 00000000 DCD EINT2_IRQHandler ; 36: External + Interrupt 2 + 94 00000094 00000000 DCD EINT3_IRQHandler ; 37: External + Interrupt 3 + 95 00000098 00000000 DCD ADC_IRQHandler + ; 38: A/D Converter + + 96 0000009C 00000000 DCD BOD_IRQHandler ; 39: Brown-Out + Detect + 97 000000A0 00000000 DCD USB_IRQHandler ; 40: USB + 98 000000A4 00000000 DCD CAN_IRQHandler ; 41: CAN + 99 000000A8 00000000 DCD DMA_IRQHandler ; 42: General Pu + rpose DMA + 100 000000AC 00000000 DCD I2S_IRQHandler ; 43: I2S + 101 000000B0 00000000 DCD ENET_IRQHandler ; 44: Ethernet + 102 000000B4 00000000 DCD RIT_IRQHandler ; 45: Repetitive + Interrupt Timer + 103 000000B8 00000000 DCD MCPWM_IRQHandler ; 46: Motor Co + ntrol PWM + 104 000000BC 00000000 DCD QEI_IRQHandler ; 47: Quadrature + Encoder Interface + 105 000000C0 00000000 DCD PLL1_IRQHandler ; 48: PLL1 Lock + (USB PLL) + 106 000000C4 00000000 DCD USBActivity_IRQHandler ; USB Ac + tivity interrupt to + wakeup + 107 000000C8 00000000 DCD CANActivity_IRQHandler ; CAN Ac + tivity interrupt to + wakeup + 108 000000CC + 109 000000CC + 110 000000CC IF :LNOT::DEF:NO_CRP + 111 000000CC AREA |.ARM.__at_0x02FC|, CODE, READO +NLY + 112 00000000 FFFFFFFF + CRP_Key DCD 0xFFFFFFFF + 113 00000004 ENDIF + 114 00000004 + 115 00000004 + 116 00000004 AREA |.text|, CODE, READONLY + 117 00000000 + 118 00000000 + 119 00000000 ; Reset Handler + 120 00000000 + 121 00000000 Reset_Handler + PROC + 122 00000000 EXPORT Reset_Handler [WEAK +] + 123 00000000 IMPORT __main + 124 00000000 4808 LDR R0, =__main + + + +ARM Macro Assembler Page 4 + + + 125 00000002 4700 BX R0 + 126 00000004 ENDP + 127 00000004 + 128 00000004 + 129 00000004 ; Dummy Exception Handlers (infinite loops which can be + modified) + 130 00000004 + 131 00000004 NMI_Handler + PROC + 132 00000004 EXPORT NMI_Handler [WEAK +] + 133 00000004 E7FE B . + 134 00000006 ENDP + 136 00000006 HardFault_Handler + PROC + 137 00000006 EXPORT HardFault_Handler [WEAK +] + 138 00000006 E7FE B . + 139 00000008 ENDP + 141 00000008 MemManage_Handler + PROC + 142 00000008 EXPORT MemManage_Handler [WEAK +] + 143 00000008 E7FE B . + 144 0000000A ENDP + 146 0000000A BusFault_Handler + PROC + 147 0000000A EXPORT BusFault_Handler [WEAK +] + 148 0000000A E7FE B . + 149 0000000C ENDP + 151 0000000C UsageFault_Handler + PROC + 152 0000000C EXPORT UsageFault_Handler [WEAK +] + 153 0000000C E7FE B . + 154 0000000E ENDP + 155 0000000E SVC_Handler + PROC + 156 0000000E EXPORT SVC_Handler [WEAK +] + 157 0000000E E7FE B . + 158 00000010 ENDP + 160 00000010 DebugMon_Handler + PROC + 161 00000010 EXPORT DebugMon_Handler [WEAK +] + 162 00000010 E7FE B . + 163 00000012 ENDP + 164 00000012 PendSV_Handler + PROC + 165 00000012 EXPORT PendSV_Handler [WEAK +] + 166 00000012 E7FE B . + 167 00000014 ENDP + 168 00000014 SysTick_Handler + PROC + 169 00000014 EXPORT SysTick_Handler [WEAK +] + + + +ARM Macro Assembler Page 5 + + + 170 00000014 E7FE B . + 171 00000016 ENDP + 172 00000016 + 173 00000016 Default_Handler + PROC + 174 00000016 + 175 00000016 EXPORT WDT_IRQHandler [WEAK +] + 176 00000016 EXPORT TIMER0_IRQHandler [WEAK +] + 177 00000016 EXPORT TIMER1_IRQHandler [WEAK +] + 178 00000016 EXPORT TIMER2_IRQHandler [WEAK +] + 179 00000016 EXPORT TIMER3_IRQHandler [WEAK +] + 180 00000016 EXPORT UART0_IRQHandler [WEAK +] + 181 00000016 EXPORT UART1_IRQHandler [WEAK +] + 182 00000016 EXPORT UART2_IRQHandler [WEAK +] + 183 00000016 EXPORT UART3_IRQHandler [WEAK +] + 184 00000016 EXPORT PWM1_IRQHandler [WEAK +] + 185 00000016 EXPORT I2C0_IRQHandler [WEAK +] + 186 00000016 EXPORT I2C1_IRQHandler [WEAK +] + 187 00000016 EXPORT I2C2_IRQHandler [WEAK +] + 188 00000016 EXPORT SPI_IRQHandler [WEAK +] + 189 00000016 EXPORT SSP0_IRQHandler [WEAK +] + 190 00000016 EXPORT SSP1_IRQHandler [WEAK +] + 191 00000016 EXPORT PLL0_IRQHandler [WEAK +] + 192 00000016 EXPORT RTC_IRQHandler [WEAK +] + 193 00000016 EXPORT EINT0_IRQHandler [WEAK +] + 194 00000016 EXPORT EINT1_IRQHandler [WEAK +] + 195 00000016 EXPORT EINT2_IRQHandler [WEAK +] + 196 00000016 EXPORT EINT3_IRQHandler [WEAK +] + 197 00000016 EXPORT ADC_IRQHandler [WEAK +] + 198 00000016 EXPORT BOD_IRQHandler [WEAK +] + 199 00000016 EXPORT USB_IRQHandler [WEAK +] + 200 00000016 EXPORT CAN_IRQHandler [WEAK +] + 201 00000016 EXPORT DMA_IRQHandler [WEAK + + + +ARM Macro Assembler Page 6 + + +] + 202 00000016 EXPORT I2S_IRQHandler [WEAK +] + 203 00000016 EXPORT ENET_IRQHandler [WEAK +] + 204 00000016 EXPORT RIT_IRQHandler [WEAK +] + 205 00000016 EXPORT MCPWM_IRQHandler [WEAK +] + 206 00000016 EXPORT QEI_IRQHandler [WEAK +] + 207 00000016 EXPORT PLL1_IRQHandler [WEAK +] + 208 00000016 EXPORT USBActivity_IRQHandler [WEAK +] + 209 00000016 EXPORT CANActivity_IRQHandler [WEAK +] + 210 00000016 + 211 00000016 WDT_IRQHandler + 212 00000016 TIMER0_IRQHandler + 213 00000016 TIMER1_IRQHandler + 214 00000016 TIMER2_IRQHandler + 215 00000016 TIMER3_IRQHandler + 216 00000016 UART0_IRQHandler + 217 00000016 UART1_IRQHandler + 218 00000016 UART2_IRQHandler + 219 00000016 UART3_IRQHandler + 220 00000016 PWM1_IRQHandler + 221 00000016 I2C0_IRQHandler + 222 00000016 I2C1_IRQHandler + 223 00000016 I2C2_IRQHandler + 224 00000016 SPI_IRQHandler + 225 00000016 SSP0_IRQHandler + 226 00000016 SSP1_IRQHandler + 227 00000016 PLL0_IRQHandler + 228 00000016 RTC_IRQHandler + 229 00000016 EINT0_IRQHandler + 230 00000016 EINT1_IRQHandler + 231 00000016 EINT2_IRQHandler + 232 00000016 EINT3_IRQHandler + 233 00000016 ADC_IRQHandler + 234 00000016 BOD_IRQHandler + 235 00000016 USB_IRQHandler + 236 00000016 CAN_IRQHandler + 237 00000016 DMA_IRQHandler + 238 00000016 I2S_IRQHandler + 239 00000016 ENET_IRQHandler + 240 00000016 RIT_IRQHandler + 241 00000016 MCPWM_IRQHandler + 242 00000016 QEI_IRQHandler + 243 00000016 PLL1_IRQHandler + 244 00000016 USBActivity_IRQHandler + 245 00000016 CANActivity_IRQHandler + 246 00000016 + 247 00000016 E7FE B . + 248 00000018 + 249 00000018 ENDP + 250 00000018 + 251 00000018 + + + +ARM Macro Assembler Page 7 + + + 252 00000018 ALIGN + 253 00000018 + 254 00000018 + 255 00000018 ; User Initial Stack & Heap + 256 00000018 + 257 00000018 IF :DEF:__MICROLIB + 264 00000018 + 265 00000018 IMPORT __use_two_region_memory + 266 00000018 EXPORT __user_initial_stackheap + 267 00000018 __user_initial_stackheap + 268 00000018 + 269 00000018 4803 LDR R0, = Heap_Mem + 270 0000001A 4904 LDR R1, =(Stack_Mem + Stack_Size) + 271 0000001C 4A02 LDR R2, = (Heap_Mem + Heap_Size) + 272 0000001E 4B04 LDR R3, = Stack_Mem + 273 00000020 4770 BX LR + 274 00000022 + 275 00000022 00 00 ALIGN + 276 00000024 + 277 00000024 ENDIF + 278 00000024 + 279 00000024 + 280 00000024 END + 00000000 + 00000000 + 00000200 + 00000000 +Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw +ork --depend=.\startup_lpc17xx.d -o.\startup_lpc17xx.o -I.\RTE\_Target_1 -IC:\K +eil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include -IC:\Keil_P\ARM\PACK\Keil\LPC1700_ +DFP\2.4.0\Device\Include --predefine="__EVAL SETA 1" --predefine="__UVISION_VER +SION SETA 524" --predefine="_RTE_ SETA 1" --predefine="LPC175x_6x SETA 1" --lis +t=.\startup_lpc17xx.lst startup_LPC17xx.s + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +STACK 00000000 + +Symbol: STACK + Definitions + At line 29 in file startup_LPC17xx.s + Uses + None +Comment: STACK unused +Stack_Mem 00000000 + +Symbol: Stack_Mem + Definitions + At line 30 in file startup_LPC17xx.s + Uses + At line 270 in file startup_LPC17xx.s + At line 272 in file startup_LPC17xx.s + +__initial_sp 00000200 + +Symbol: __initial_sp + Definitions + At line 31 in file startup_LPC17xx.s + Uses + At line 55 in file startup_LPC17xx.s +Comment: __initial_sp used once +3 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +HEAP 00000000 + +Symbol: HEAP + Definitions + At line 40 in file startup_LPC17xx.s + Uses + None +Comment: HEAP unused +Heap_Mem 00000000 + +Symbol: Heap_Mem + Definitions + At line 42 in file startup_LPC17xx.s + Uses + At line 269 in file startup_LPC17xx.s + At line 271 in file startup_LPC17xx.s + +__heap_base 00000000 + +Symbol: __heap_base + Definitions + At line 41 in file startup_LPC17xx.s + Uses + None +Comment: __heap_base unused +__heap_limit 00000000 + +Symbol: __heap_limit + Definitions + At line 43 in file startup_LPC17xx.s + Uses + None +Comment: __heap_limit unused +4 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +RESET 00000000 + +Symbol: RESET + Definitions + At line 52 in file startup_LPC17xx.s + Uses + None +Comment: RESET unused +__Vectors 00000000 + +Symbol: __Vectors + Definitions + At line 55 in file startup_LPC17xx.s + Uses + At line 53 in file startup_LPC17xx.s +Comment: __Vectors used once +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +.ARM.__at_0x02FC 00000000 + +Symbol: .ARM.__at_0x02FC + Definitions + At line 111 in file startup_LPC17xx.s + Uses + None +Comment: .ARM.__at_0x02FC unused +CRP_Key 00000000 + +Symbol: CRP_Key + Definitions + At line 112 in file startup_LPC17xx.s + Uses + None +Comment: CRP_Key unused +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +.text 00000000 + +Symbol: .text + Definitions + At line 116 in file startup_LPC17xx.s + Uses + None +Comment: .text unused +ADC_IRQHandler 00000016 + +Symbol: ADC_IRQHandler + Definitions + At line 233 in file startup_LPC17xx.s + Uses + At line 95 in file startup_LPC17xx.s + At line 197 in file startup_LPC17xx.s + +BOD_IRQHandler 00000016 + +Symbol: BOD_IRQHandler + Definitions + At line 234 in file startup_LPC17xx.s + Uses + At line 96 in file startup_LPC17xx.s + At line 198 in file startup_LPC17xx.s + +BusFault_Handler 0000000A + +Symbol: BusFault_Handler + Definitions + At line 146 in file startup_LPC17xx.s + Uses + At line 60 in file startup_LPC17xx.s + At line 147 in file startup_LPC17xx.s + +CANActivity_IRQHandler 00000016 + +Symbol: CANActivity_IRQHandler + Definitions + At line 245 in file startup_LPC17xx.s + Uses + At line 107 in file startup_LPC17xx.s + At line 209 in file startup_LPC17xx.s + +CAN_IRQHandler 00000016 + +Symbol: CAN_IRQHandler + Definitions + At line 236 in file startup_LPC17xx.s + Uses + At line 98 in file startup_LPC17xx.s + At line 200 in file startup_LPC17xx.s + +DMA_IRQHandler 00000016 + +Symbol: DMA_IRQHandler + Definitions + At line 237 in file startup_LPC17xx.s + Uses + + + +ARM Macro Assembler Page 2 Alphabetic symbol ordering +Relocatable symbols + + At line 99 in file startup_LPC17xx.s + At line 201 in file startup_LPC17xx.s + +DebugMon_Handler 00000010 + +Symbol: DebugMon_Handler + Definitions + At line 160 in file startup_LPC17xx.s + Uses + At line 67 in file startup_LPC17xx.s + At line 161 in file startup_LPC17xx.s + +Default_Handler 00000016 + +Symbol: Default_Handler + Definitions + At line 173 in file startup_LPC17xx.s + Uses + None +Comment: Default_Handler unused +EINT0_IRQHandler 00000016 + +Symbol: EINT0_IRQHandler + Definitions + At line 229 in file startup_LPC17xx.s + Uses + At line 91 in file startup_LPC17xx.s + At line 193 in file startup_LPC17xx.s + +EINT1_IRQHandler 00000016 + +Symbol: EINT1_IRQHandler + Definitions + At line 230 in file startup_LPC17xx.s + Uses + At line 92 in file startup_LPC17xx.s + At line 194 in file startup_LPC17xx.s + +EINT2_IRQHandler 00000016 + +Symbol: EINT2_IRQHandler + Definitions + At line 231 in file startup_LPC17xx.s + Uses + At line 93 in file startup_LPC17xx.s + At line 195 in file startup_LPC17xx.s + +EINT3_IRQHandler 00000016 + +Symbol: EINT3_IRQHandler + Definitions + At line 232 in file startup_LPC17xx.s + Uses + At line 94 in file startup_LPC17xx.s + At line 196 in file startup_LPC17xx.s + +ENET_IRQHandler 00000016 + +Symbol: ENET_IRQHandler + + + +ARM Macro Assembler Page 3 Alphabetic symbol ordering +Relocatable symbols + + Definitions + At line 239 in file startup_LPC17xx.s + Uses + At line 101 in file startup_LPC17xx.s + At line 203 in file startup_LPC17xx.s + +HardFault_Handler 00000006 + +Symbol: HardFault_Handler + Definitions + At line 136 in file startup_LPC17xx.s + Uses + At line 58 in file startup_LPC17xx.s + At line 137 in file startup_LPC17xx.s + +I2C0_IRQHandler 00000016 + +Symbol: I2C0_IRQHandler + Definitions + At line 221 in file startup_LPC17xx.s + Uses + At line 83 in file startup_LPC17xx.s + At line 185 in file startup_LPC17xx.s + +I2C1_IRQHandler 00000016 + +Symbol: I2C1_IRQHandler + Definitions + At line 222 in file startup_LPC17xx.s + Uses + At line 84 in file startup_LPC17xx.s + At line 186 in file startup_LPC17xx.s + +I2C2_IRQHandler 00000016 + +Symbol: I2C2_IRQHandler + Definitions + At line 223 in file startup_LPC17xx.s + Uses + At line 85 in file startup_LPC17xx.s + At line 187 in file startup_LPC17xx.s + +I2S_IRQHandler 00000016 + +Symbol: I2S_IRQHandler + Definitions + At line 238 in file startup_LPC17xx.s + Uses + At line 100 in file startup_LPC17xx.s + At line 202 in file startup_LPC17xx.s + +MCPWM_IRQHandler 00000016 + +Symbol: MCPWM_IRQHandler + Definitions + At line 241 in file startup_LPC17xx.s + Uses + At line 103 in file startup_LPC17xx.s + At line 205 in file startup_LPC17xx.s + + + +ARM Macro Assembler Page 4 Alphabetic symbol ordering +Relocatable symbols + + +MemManage_Handler 00000008 + +Symbol: MemManage_Handler + Definitions + At line 141 in file startup_LPC17xx.s + Uses + At line 59 in file startup_LPC17xx.s + At line 142 in file startup_LPC17xx.s + +NMI_Handler 00000004 + +Symbol: NMI_Handler + Definitions + At line 131 in file startup_LPC17xx.s + Uses + At line 57 in file startup_LPC17xx.s + At line 132 in file startup_LPC17xx.s + +PLL0_IRQHandler 00000016 + +Symbol: PLL0_IRQHandler + Definitions + At line 227 in file startup_LPC17xx.s + Uses + At line 89 in file startup_LPC17xx.s + At line 191 in file startup_LPC17xx.s + +PLL1_IRQHandler 00000016 + +Symbol: PLL1_IRQHandler + Definitions + At line 243 in file startup_LPC17xx.s + Uses + At line 105 in file startup_LPC17xx.s + At line 207 in file startup_LPC17xx.s + +PWM1_IRQHandler 00000016 + +Symbol: PWM1_IRQHandler + Definitions + At line 220 in file startup_LPC17xx.s + Uses + At line 82 in file startup_LPC17xx.s + At line 184 in file startup_LPC17xx.s + +PendSV_Handler 00000012 + +Symbol: PendSV_Handler + Definitions + At line 164 in file startup_LPC17xx.s + Uses + At line 69 in file startup_LPC17xx.s + At line 165 in file startup_LPC17xx.s + +QEI_IRQHandler 00000016 + +Symbol: QEI_IRQHandler + Definitions + + + +ARM Macro Assembler Page 5 Alphabetic symbol ordering +Relocatable symbols + + At line 242 in file startup_LPC17xx.s + Uses + At line 104 in file startup_LPC17xx.s + At line 206 in file startup_LPC17xx.s + +RIT_IRQHandler 00000016 + +Symbol: RIT_IRQHandler + Definitions + At line 240 in file startup_LPC17xx.s + Uses + At line 102 in file startup_LPC17xx.s + At line 204 in file startup_LPC17xx.s + +RTC_IRQHandler 00000016 + +Symbol: RTC_IRQHandler + Definitions + At line 228 in file startup_LPC17xx.s + Uses + At line 90 in file startup_LPC17xx.s + At line 192 in file startup_LPC17xx.s + +Reset_Handler 00000000 + +Symbol: Reset_Handler + Definitions + At line 121 in file startup_LPC17xx.s + Uses + At line 56 in file startup_LPC17xx.s + At line 122 in file startup_LPC17xx.s + +SPI_IRQHandler 00000016 + +Symbol: SPI_IRQHandler + Definitions + At line 224 in file startup_LPC17xx.s + Uses + At line 86 in file startup_LPC17xx.s + At line 188 in file startup_LPC17xx.s + +SSP0_IRQHandler 00000016 + +Symbol: SSP0_IRQHandler + Definitions + At line 225 in file startup_LPC17xx.s + Uses + At line 87 in file startup_LPC17xx.s + At line 189 in file startup_LPC17xx.s + +SSP1_IRQHandler 00000016 + +Symbol: SSP1_IRQHandler + Definitions + At line 226 in file startup_LPC17xx.s + Uses + At line 88 in file startup_LPC17xx.s + At line 190 in file startup_LPC17xx.s + + + + +ARM Macro Assembler Page 6 Alphabetic symbol ordering +Relocatable symbols + +SVC_Handler 0000000E + +Symbol: SVC_Handler + Definitions + At line 155 in file startup_LPC17xx.s + Uses + At line 66 in file startup_LPC17xx.s + At line 156 in file startup_LPC17xx.s + +SysTick_Handler 00000014 + +Symbol: SysTick_Handler + Definitions + At line 168 in file startup_LPC17xx.s + Uses + At line 70 in file startup_LPC17xx.s + At line 169 in file startup_LPC17xx.s + +TIMER0_IRQHandler 00000016 + +Symbol: TIMER0_IRQHandler + Definitions + At line 212 in file startup_LPC17xx.s + Uses + At line 74 in file startup_LPC17xx.s + At line 176 in file startup_LPC17xx.s + +TIMER1_IRQHandler 00000016 + +Symbol: TIMER1_IRQHandler + Definitions + At line 213 in file startup_LPC17xx.s + Uses + At line 75 in file startup_LPC17xx.s + At line 177 in file startup_LPC17xx.s + +TIMER2_IRQHandler 00000016 + +Symbol: TIMER2_IRQHandler + Definitions + At line 214 in file startup_LPC17xx.s + Uses + At line 76 in file startup_LPC17xx.s + At line 178 in file startup_LPC17xx.s + +TIMER3_IRQHandler 00000016 + +Symbol: TIMER3_IRQHandler + Definitions + At line 215 in file startup_LPC17xx.s + Uses + At line 77 in file startup_LPC17xx.s + At line 179 in file startup_LPC17xx.s + +UART0_IRQHandler 00000016 + +Symbol: UART0_IRQHandler + Definitions + At line 216 in file startup_LPC17xx.s + + + +ARM Macro Assembler Page 7 Alphabetic symbol ordering +Relocatable symbols + + Uses + At line 78 in file startup_LPC17xx.s + At line 180 in file startup_LPC17xx.s + +UART1_IRQHandler 00000016 + +Symbol: UART1_IRQHandler + Definitions + At line 217 in file startup_LPC17xx.s + Uses + At line 79 in file startup_LPC17xx.s + At line 181 in file startup_LPC17xx.s + +UART2_IRQHandler 00000016 + +Symbol: UART2_IRQHandler + Definitions + At line 218 in file startup_LPC17xx.s + Uses + At line 80 in file startup_LPC17xx.s + At line 182 in file startup_LPC17xx.s + +UART3_IRQHandler 00000016 + +Symbol: UART3_IRQHandler + Definitions + At line 219 in file startup_LPC17xx.s + Uses + At line 81 in file startup_LPC17xx.s + At line 183 in file startup_LPC17xx.s + +USBActivity_IRQHandler 00000016 + +Symbol: USBActivity_IRQHandler + Definitions + At line 244 in file startup_LPC17xx.s + Uses + At line 106 in file startup_LPC17xx.s + At line 208 in file startup_LPC17xx.s + +USB_IRQHandler 00000016 + +Symbol: USB_IRQHandler + Definitions + At line 235 in file startup_LPC17xx.s + Uses + At line 97 in file startup_LPC17xx.s + At line 199 in file startup_LPC17xx.s + +UsageFault_Handler 0000000C + +Symbol: UsageFault_Handler + Definitions + At line 151 in file startup_LPC17xx.s + Uses + At line 61 in file startup_LPC17xx.s + At line 152 in file startup_LPC17xx.s + +WDT_IRQHandler 00000016 + + + +ARM Macro Assembler Page 8 Alphabetic symbol ordering +Relocatable symbols + + +Symbol: WDT_IRQHandler + Definitions + At line 211 in file startup_LPC17xx.s + Uses + At line 73 in file startup_LPC17xx.s + At line 175 in file startup_LPC17xx.s + +__user_initial_stackheap 00000018 + +Symbol: __user_initial_stackheap + Definitions + At line 267 in file startup_LPC17xx.s + Uses + At line 266 in file startup_LPC17xx.s +Comment: __user_initial_stackheap used once +48 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Absolute symbols + +Heap_Size 00000000 + +Symbol: Heap_Size + Definitions + At line 38 in file startup_LPC17xx.s + Uses + At line 42 in file startup_LPC17xx.s + At line 271 in file startup_LPC17xx.s + +Stack_Size 00000200 + +Symbol: Stack_Size + Definitions + At line 27 in file startup_LPC17xx.s + Uses + At line 30 in file startup_LPC17xx.s + At line 270 in file startup_LPC17xx.s + +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +External symbols + +__main 00000000 + +Symbol: __main + Definitions + At line 123 in file startup_LPC17xx.s + Uses + At line 124 in file startup_LPC17xx.s +Comment: __main used once +__use_two_region_memory 00000000 + +Symbol: __use_two_region_memory + Definitions + At line 265 in file startup_LPC17xx.s + Uses + None +Comment: __use_two_region_memory unused +2 symbols +403 symbols in table diff --git a/startup_LPC17xx.s b/startup_LPC17xx.s new file mode 100644 index 0000000..c0761c5 --- /dev/null +++ b/startup_LPC17xx.s @@ -0,0 +1,280 @@ +;/***************************************************************************** +; * @file: startup_LPC17xx.s +; * @purpose: CMSIS Cortex-M3 Core Device Startup File +; * for the NXP LPC17xx Device Series +; * @version: V1.01 +; * @date: 21. December 2009 +; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +; * +; * Copyright (C) 2009 ARM Limited. All rights reserved. +; * ARM Limited (ARM) is supplying this software for use with Cortex-M3 +; * processor based microcontrollers. This file can be freely distributed +; * within development tools that are supporting such ARM based processors. +; * +; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +; * +; *****************************************************************************/ + + +;Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + 36 00000200 ; Stack Configuration +; + +Stack_Size EQU 0x00000200 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +;Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Configuration +; + +Heap_Size EQU 0x00000000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 16: Watchdog Timer + DCD TIMER0_IRQHandler ; 17: Timer0 + DCD TIMER1_IRQHandler ; 18: Timer1 + DCD TIMER2_IRQHandler ; 19: Timer2 + DCD TIMER3_IRQHandler ; 20: Timer3 + DCD UART0_IRQHandler ; 21: UART0 + DCD UART1_IRQHandler ; 22: UART1 + DCD UART2_IRQHandler ; 23: UART2 + DCD UART3_IRQHandler ; 24: UART3 + DCD PWM1_IRQHandler ; 25: PWM1 + DCD I2C0_IRQHandler ; 26: I2C0 + DCD I2C1_IRQHandler ; 27: I2C1 + DCD I2C2_IRQHandler ; 28: I2C2 + DCD SPI_IRQHandler ; 29: SPI + DCD SSP0_IRQHandler ; 30: SSP0 + DCD SSP1_IRQHandler ; 31: SSP1 + DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) + DCD RTC_IRQHandler ; 33: Real Time Clock + DCD EINT0_IRQHandler ; 34: External Interrupt 0 + DCD EINT1_IRQHandler ; 35: External Interrupt 1 + DCD EINT2_IRQHandler ; 36: External Interrupt 2 + DCD EINT3_IRQHandler ; 37: External Interrupt 3 + DCD ADC_IRQHandler ; 38: A/D Converter + DCD BOD_IRQHandler ; 39: Brown-Out Detect + DCD USB_IRQHandler ; 40: USB + DCD CAN_IRQHandler ; 41: CAN + DCD DMA_IRQHandler ; 42: General Purpose DMA + DCD I2S_IRQHandler ; 43: I2S + DCD ENET_IRQHandler ; 44: Ethernet + DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer + DCD MCPWM_IRQHandler ; 46: Motor Control PWM + DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface + DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) + DCD USBActivity_IRQHandler ; USB Activity interrupt to wakeup + DCD CANActivity_IRQHandler ; CAN Activity interrupt to wakeup + + + IF :LNOT::DEF:NO_CRP + AREA |.ARM.__at_0x02FC|, CODE, READONLY +CRP_Key DCD 0xFFFFFFFF + ENDIF + + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WDT_IRQHandler [WEAK] + EXPORT TIMER0_IRQHandler [WEAK] + EXPORT TIMER1_IRQHandler [WEAK] + EXPORT TIMER2_IRQHandler [WEAK] + EXPORT TIMER3_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT PWM1_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT I2C2_IRQHandler [WEAK] + EXPORT SPI_IRQHandler [WEAK] + EXPORT SSP0_IRQHandler [WEAK] + EXPORT SSP1_IRQHandler [WEAK] + EXPORT PLL0_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT BOD_IRQHandler [WEAK] + EXPORT USB_IRQHandler [WEAK] + EXPORT CAN_IRQHandler [WEAK] + EXPORT DMA_IRQHandler [WEAK] + EXPORT I2S_IRQHandler [WEAK] + EXPORT ENET_IRQHandler [WEAK] + EXPORT RIT_IRQHandler [WEAK] + EXPORT MCPWM_IRQHandler [WEAK] + EXPORT QEI_IRQHandler [WEAK] + EXPORT PLL1_IRQHandler [WEAK] + EXPORT USBActivity_IRQHandler [WEAK] + EXPORT CANActivity_IRQHandler [WEAK] + +WDT_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +PWM1_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +I2C2_IRQHandler +SPI_IRQHandler +SSP0_IRQHandler +SSP1_IRQHandler +PLL0_IRQHandler +RTC_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +ADC_IRQHandler +BOD_IRQHandler +USB_IRQHandler +CAN_IRQHandler +DMA_IRQHandler +I2S_IRQHandler +ENET_IRQHandler +RIT_IRQHandler +MCPWM_IRQHandler +QEI_IRQHandler +PLL1_IRQHandler +USBActivity_IRQHandler +CANActivity_IRQHandler + + B . + + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END diff --git a/startup_lpc17xx.o b/startup_lpc17xx.o new file mode 100644 index 0000000..a972be3 Binary files /dev/null and b/startup_lpc17xx.o differ diff --git a/system_LPC17xx.c b/system_LPC17xx.c new file mode 100644 index 0000000..518b032 --- /dev/null +++ b/system_LPC17xx.c @@ -0,0 +1,574 @@ +/**************************************************************************//** + * @file system_LPC17xx.c + * @brief CMSIS Cortex-M3 Device System Source File for + * NXP LPC17xx Device Series + * @version V1.10 + * @date 06. April 2011 + * + * @note + * Copyright (C) 2009-2011 ARM Limited. All rights reserved. + * + * @par + * ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * @par + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + + +#includeHeap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +#include "LPC17xx.h" + + +/** @addtogroup LPC17xx_System + * @{ + */ + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- Clock Configuration ---------------------------------- +// +// Clock Configuration +// +// +// +//System Controls and Status Register (SCS) +// OSCRANGE: Main Oscillator Range Select +// <0=> 1 MHz to 20 MHz +// <1=> 15 MHz to 24 MHz +// OSCEN: Main Oscillator Enable +// Clock Source Select Register (CLKSRCSEL) +// +// +//CLKSRC: PLL Clock Source Selection +// <0=> Internal RC oscillator +// <1=> Main oscillator +// <2=> RTC oscillator +// PLL0 Configuration (Main PLL) +// PLL0 Configuration Register (PLL0CFG) +// F_cco0 = (2 * M * F_in) / N +// F_in must be in the range of 32 kHz to 50 MHz +// F_cco0 must be in the range of 275 MHz to 550 MHz +// +// +// +//MSEL: PLL Multiplier Selection +// <6-32768><#-1> +// M Value +// NSEL: PLL Divider Selection +// <1-256><#-1> +// N Value +// PLL1 Configuration (USB PLL) +// PLL1 Configuration Register (PLL1CFG) +// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) +// F_cco1 = F_osc * M * 2 * P +// F_cco1 must be in the range of 156 MHz to 320 MHz +// +// +// +//MSEL: PLL Multiplier Selection +// <1-32><#-1> +// M Value (for USB maximum value is 4) +// PSEL: PLL Divider Selection +// <0=> 1 +// <1=> 2 +// <2=> 4 +// <3=> 8 +// P Value +// CPU Clock Configuration Register (CCLKCFG) +// +// +//CCLKSEL: Divide Value for CPU Clock from PLL0 +// <1-256><#-1> +// USB Clock Configuration Register (USBCLKCFG) +// +// +//USBSEL: Divide Value for USB Clock from PLL0 +// <0-15> +// Divide is USBSEL + 1 +// Peripheral Clock Selection Register 0 (PCLKSEL0) +// +// +//PCLK_WDT: Peripheral Clock Selection for WDT +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART0: Peripheral Clock Selection for UART0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART1: Peripheral Clock Selection for UART1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_PWM1: Peripheral Clock Selection for PWM1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C0: Peripheral Clock Selection for I2C0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SPI: Peripheral Clock Selection for SPI +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SSP1: Peripheral Clock Selection for SSP1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_DAC: Peripheral Clock Selection for DAC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_ADC: Peripheral Clock Selection for ADC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_CAN1: Peripheral Clock Selection for CAN1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// PCLK_CAN2: Peripheral Clock Selection for CAN2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// PCLK_ACF: Peripheral Clock Selection for ACF +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// Peripheral Clock Selection Register 1 (PCLKSEL1) +// +// +//PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_GPIO: Peripheral Clock Selection for GPIOs +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C1: Peripheral Clock Selection for I2C1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SSP0: Peripheral Clock Selection for SSP0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART2: Peripheral Clock Selection for UART2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART3: Peripheral Clock Selection for UART3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C2: Peripheral Clock Selection for I2C2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2S: Peripheral Clock Selection for I2S +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// Power Control for Peripherals Register (PCONP) +// +// +//PCTIM0: Timer/Counter 0 power/clock enable +// PCTIM1: Timer/Counter 1 power/clock enable +// PCUART0: UART 0 power/clock enable +// PCUART1: UART 1 power/clock enable +// PCPWM1: PWM 1 power/clock enable +// PCI2C0: I2C interface 0 power/clock enable +// PCSPI: SPI interface power/clock enable +// PCRTC: RTC power/clock enable +// PCSSP1: SSP interface 1 power/clock enable +// PCAD: A/D converter power/clock enable +// PCCAN1: CAN controller 1 power/clock enable +// PCCAN2: CAN controller 2 power/clock enable +// PCGPIO: GPIOs power/clock enable +// PCRIT: Repetitive interrupt timer power/clock enable +// PCMC: Motor control PWM power/clock enable +// PCQEI: Quadrature encoder interface power/clock enable +// PCI2C1: I2C interface 1 power/clock enable +// PCSSP0: SSP interface 0 power/clock enable +// PCTIM2: Timer 2 power/clock enable +// PCTIM3: Timer 3 power/clock enable +// PCUART2: UART 2 power/clock enable +// PCUART3: UART 3 power/clock enable +// PCI2C2: I2C interface 2 power/clock enable +// PCI2S: I2S interface power/clock enable +// PCGPDMA: GP DMA function power/clock enable +// PCENET: Ethernet block power/clock enable +// PCUSB: USB interface power/clock enable +// Clock Output Configuration Register (CLKOUTCFG) +// +// +// +*/ + + + +/** @addtogroup LPC17xx_System_Defines LPC17xx System Defines + @{ + */ + +#define CLOCK_SETUP 1 +#define SCS_Val 0x00000020 +#define CLKSRCSEL_Val 0x00000001 +#define PLL0_SETUP 1 +#define PLL0CFG_Val 0x00050063 +#define PLL1_SETUP 1 +#define PLL1CFG_Val 0x00000023 +#define CCLKCFG_Val 0x00000003 +#define USBCLKCFG_Val 0x00000000 +#define PCLKSEL0_Val 0x00000000 +#define PCLKSEL1_Val 0x00000000 +#define PCONP_Val 0x042887DE +#define CLKOUTCFG_Val 0x00000000 + + +/*--------------------- Flash Accelerator Configuration ---------------------- +// +//CLKOUTSEL: Selects clock source for CLKOUT +// <0=> CPU clock +// <1=> Main oscillator +// <2=> Internal RC oscillator +// <3=> USB clock +// <4=> RTC oscillator +// CLKOUTDIV: Selects clock divider for CLKOUT +// <1-16><#-1> +// CLKOUT_EN: CLKOUT enable control +// Flash Accelerator Configuration +// +*/ +#define FLASH_SETUP 1 +#define FLASHCFG_Val 0x00004000 + +/* +//-------- <<< end of configuration section >>> ------------------------------ +*/ + +/*---------------------------------------------------------------------------- + Check the register settings + *----------------------------------------------------------------------------*/ +#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) +#define CHECK_RSVD(val, mask) (val & mask) + +/* Clock Configuration -------------------------------------------------------*/ +#if (CHECK_RSVD((SCS_Val), ~0x00000030)) + #error "SCS: Invalid values of reserved bits!" +#endif + +#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) + #error "CLKSRCSEL: Value out of range!" +#endif + +#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) + #error "PLL0CFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) + #error "PLL1CFG: Invalid values of reserved bits!" +#endif + +#if (PLL0_SETUP) /* if PLL0 is used */ + #if (CCLKCFG_Val < 2) /* CCLKSEL must be greater then 1 */ + #error "CCLKCFG: CCLKSEL must be greater then 1 if PLL0 is used!" + #endif +#endif + +#if (CHECK_RANGE((CCLKCFG_Val), 2, 255)) + #error "CCLKCFG: Value out of range!" +#endif + +#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) + #error "USBCLKCFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) + #error "PCLKSEL0: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) + #error "PCLKSEL1: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCONP_Val), 0x10100821)) + #error "PCONP: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) + #error "CLKOUTCFG: Invalid values of reserved bits!" +#endif + +/* Flash Accelerator Configuration -------------------------------------------*/ +#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F000)) + #error "FLASHCFG: Invalid values of reserved bits!" +#endif + + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (12000000UL) /* Oscillator frequency */ +#define OSC_CLK ( XTAL) /* Main oscillator frequency */ +#define RTC_CLK ( 32768UL) /* RTC oscillator frequency */ +#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ + + +/* F_cco0 = (2 * M * F_in) / N */ +#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1) +#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) +#define __FCCO(__F_IN) ((2ULL * __M * __F_IN) / __N) +#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) + +/* Determine core clock frequency according to settings */ + #if (PLL0_SETUP) + #if ((CLKSRCSEL_Val & 0x03) == 1) + #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) + #elif ((CLKSRCSEL_Val & 0x03) == 2) + #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV) + #else + #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV) + #endif + #else + #if ((CLKSRCSEL_Val & 0x03) == 1) + #define __CORE_CLK (OSC_CLK / __CCLK_DIV) + #elif ((CLKSRCSEL_Val & 0x03) == 2) + #define __CORE_CLK (RTC_CLK / __CCLK_DIV) + #else + #define __CORE_CLK (IRC_OSC / __CCLK_DIV) + #endif + #endif + +/** + * @} + */ + + +/** @addtogroup LPC17xx_System_Public_Variables LPC17xx System Public Variables + @{ + */ +/*---------------------------------------------------------------------------- + Clock Variable definitions + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = __CORE_CLK;/*!< System Clock Frequency (Core Clock)*/ + +/** + * @} + */ + + +/** @addtogroup LPC17xx_System_Public_Functions LPC17xx System Public Functions + @{ + */ + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ +{ + /* Determine clock frequency according to clock register values */ + if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */ + switch (LPC_SC->CLKSRCSEL & 0x03) { + case 0: /* Int. RC oscillator => PLL0 */ + case 3: /* Reserved, default to Int. RC */ + SystemCoreClock = (IRC_OSC * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + case 1: /* Main oscillator => PLL0 */ + SystemCoreClock = (OSC_CLK * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemCoreClock = (RTC_CLK * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + } + } else { + switch (LPC_SC->CLKSRCSEL & 0x03) { + case 0: /* Int. RC oscillator => PLL0 */ + case 3: /* Reserved, default to Int. RC */ + SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + case 1: /* Main oscillator => PLL0 */ + SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + } + } + +} + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit (void) +{ +#if (CLOCK_SETUP) /* Clock Setup */ + LPC_SC->SCS = SCS_Val; + if (LPC_SC->SCS & (1 << 5)) { /* If Main Oscillator is enabled */ + while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready */ + } + + LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ + /* Periphral clock must be selected before PLL0 enabling and connecting + * - according errata.lpc1768-16.March.2010 - + */ + LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ + LPC_SC->PCLKSEL1 = PCLKSEL1_Val; + +#if (PLL0_SETUP) + LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */ + + LPC_SC->PLL0CFG = PLL0CFG_Val; /* configure PLL0 */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + + LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0 */ + + LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + while (!(LPC_SC->PLL0STAT & ((1<<25) | (1<<24))));/* Wait for PLLC0_STAT & PLLE0_STAT */ +#endif + +#if (PLL1_SETUP) + LPC_SC->PLL1CFG = PLL1CFG_Val; + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + + LPC_SC->PLL1CON = 0x01; /* PLL1 Enable */ + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1 */ + + LPC_SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + while (!(LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))));/* Wait for PLLC1_STAT & PLLE1_STAT */ +#else + LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ +#endif + + LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ + + LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ +#endif + +#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ + LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val; +#endif +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/system_lpc17xx.crf b/system_lpc17xx.crf new file mode 100644 index 0000000..e4c0553 Binary files /dev/null and b/system_lpc17xx.crf differ diff --git a/system_lpc17xx.d b/system_lpc17xx.d new file mode 100644 index 0000000..5600dd5 --- /dev/null +++ b/system_lpc17xx.d @@ -0,0 +1,9 @@ +.\system_lpc17xx.o: system_LPC17xx.c +.\system_lpc17xx.o: C:\Keil_P\ARM\ARMCC\Bin\..\include\stdint.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\LPC17xx.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\core_cm3.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_version.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_compiler.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\cmsis_armcc.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\Include\mpu_armv7.h +.\system_lpc17xx.o: C:\Keil_P\ARM\PACK\Keil\LPC1700_DFP\2.4.0\Device\Include\system_LPC17xx.h diff --git a/system_lpc17xx.o b/system_lpc17xx.o new file mode 100644 index 0000000..60cb682 Binary files /dev/null and b/system_lpc17xx.o differFLASHTIM: Flash Access Time +// <0=> 1 CPU clock (for CPU clock up to 20 MHz) +// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) +// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) +// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) +// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) +// <5=> 6 CPU clocks (for any CPU clock) +//