From acfc6ed9b94e6b3aec5f8e00c268d94528bee5e2 Mon Sep 17 00:00:00 2001
From: Dawood Alnajjar <dnajjar@slac.stanford.edu>
Date: Wed, 24 Apr 2024 16:19:07 -0700
Subject: [PATCH] Chnaged lane num to 8 (DAC has upto 8). Added laneEnable
 register

---
 yaml/Dac38J84.yaml | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/yaml/Dac38J84.yaml b/yaml/Dac38J84.yaml
index e7ccc4da63..a22c574e3b 100644
--- a/yaml/Dac38J84.yaml
+++ b/yaml/Dac38J84.yaml
@@ -16,7 +16,7 @@ Dac38J84: &Dac38J84
   class: MMIODev
   configPrio: 1
   metadata:
-    numTxLanes: &numTxLanes 2
+    numTxLanes: &numTxLanes 8
   children:
     #########################################################
     DacReg:
@@ -29,6 +29,14 @@ Dac38J84: &Dac38J84
       mode:         RW
       description:  DAC Registers[125:0]
     #########################################################
+    LaneEnable:
+      at:
+        offset:     0x129
+      class:        IntField
+      sizeBits:     8
+      mode:         RO
+      description:  Lane Enable
+    #########################################################
     LaneBufferDelay:
       at:
         offset:     0x01C