forked from chipsalliance/VeeR-ISS
-
Notifications
You must be signed in to change notification settings - Fork 5
/
Copy pathServer.cpp
1456 lines (1285 loc) · 41.8 KB
/
Server.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// Copyright 2020 Western Digital Corporation or its affiliates.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <atomic>
#include <iostream>
#include <span>
#include <sstream>
#include <fstream>
#include <map>
#include <algorithm>
#include <cinttypes>
#include <cstring>
#include <sys/socket.h>
#include "DecodedInst.hpp"
#include "WhisperMessage.h"
#include "Hart.hpp"
#include "Server.hpp"
#include "System.hpp"
#include "Interactive.hpp"
using namespace WdRiscv;
static bool
receiveMessage(int soc, WhisperMessage& msg)
{
std::array<char, sizeof(msg)> buffer;
char* p = buffer.data();
size_t remain = buffer.size();
while (remain > 0)
{
ssize_t l = recv(soc, p, remain, 0);
if (l < 0)
{
if (errno == EINTR)
continue;
std::cerr << "Failed to receive socket message\n";
return false;
}
if (l == 0)
{
msg.type = Quit;
return true;
}
remain -= l;
p += l;
}
msg = WhisperMessage::deserializeFrom(buffer);
return true;
}
static bool
sendMessage(int soc, const WhisperMessage& msg)
{
std::array<char, sizeof(msg)> buffer;
msg.serializeTo(buffer);
// Send command.
ssize_t remain = buffer.size();
char* p = buffer.data();
while (remain > 0)
{
ssize_t l = send(soc, p, remain , MSG_NOSIGNAL);
if (l < 0)
{
if (errno == EINTR)
continue;
std::cerr << "Failed to send socket command\n";
return false;
}
remain -= l;
p += l;
}
return true;
}
static bool
receiveMessage(std::span<char> shm, WhisperMessage& msg)
{
// reserve first byte for locking
std::atomic_char* guard = (std::atomic_char*) shm.data();
while (std::atomic_load(guard) != 's');
// Byte alignment for WhisperMessage - get next address after guard aligned on 4-byte boundary.
std::span<char> buffer = shm.subspan(sizeof(uint32_t) - (reinterpret_cast<uintptr_t>(shm.data()) % sizeof(uint32_t)));
msg = WhisperMessage::deserializeFrom(buffer);
return true;
}
static bool
sendMessage(std::span<char> shm, const WhisperMessage& msg)
{
// reserve first byte for locking
std::atomic_char* guard = (std::atomic_char*) shm.data();
while (std::atomic_load(guard) != 's'); // redundant
// Byte alignment for WhisperMessage - get next address after guard aligned on 4-byte boundary.
std::span<char> buffer = shm.subspan(sizeof(uint32_t) - (reinterpret_cast<uintptr_t>(shm.data()) % sizeof(uint32_t)));
msg.serializeTo(buffer);
std::atomic_store(guard, 'c');
return true;
}
template <typename URV>
Server<URV>::Server(System<URV>& system)
: system_(system)
{
// In server mode the test-bench will issue a cancel-lr explcitly for wrs instructions.
for (unsigned i = 0; i < system.hartCount(); ++i)
{
auto& hart = *(system_.ithHart(i));
hart.setWrsCancelsLr(false);
}
}
template <typename URV>
bool
Server<URV>::pokeCommand(const WhisperMessage& req, WhisperMessage& reply, Hart<URV>& hart)
{
reply = req;
switch (req.resource)
{
case 'r':
{
unsigned reg = static_cast<unsigned>(req.address);
URV val = static_cast<URV>(req.value);
if (reg == req.address)
if (hart.pokeIntReg(reg, val))
return true;
}
break;
case 'f':
{
unsigned reg = static_cast<unsigned>(req.address);
uint64_t val = req.value;
if (reg == req.address)
if (hart.pokeFpReg(reg, val))
return true;
}
break;
case 'c':
{
URV val = static_cast<URV>(req.value);
bool virtMode = WhisperFlags{req.flags}.bits.virt;
if (hart.externalPokeCsr(CsrNumber(req.address), val, virtMode))
return true;
}
break;
case 'v':
{
unsigned reg = static_cast<unsigned>(req.address);
// vector reg poke uses the buffer instead
if (reg == req.address and req.size <= req.buffer.size())
{
std::vector<uint8_t> vecVal;
for (uint32_t i = 0; i < req.size; ++i)
vecVal.push_back(req.buffer[i]);
std::reverse(vecVal.begin(), vecVal.end());
if (hart.pokeVecReg(reg, vecVal))
return true;
}
}
break;
case 'm':
{
bool usePma = false; // Ignore phsical memory attributes.
if (req.size == 0)
{
// Default size is 4 bytes.
if (hart.pokeMemory(req.address, uint32_t(req.value), usePma))
return true;
}
else
{
switch (req.size)
{
case 1:
if (hart.pokeMemory(req.address, uint8_t(req.value), usePma))
return true;
break;
case 2:
if (hart.pokeMemory(req.address, uint16_t(req.value), usePma))
return true;
break;
case 4:
if (hart.pokeMemory(req.address, uint32_t(req.value), usePma))
return true;
break;
case 8:
if (hart.pokeMemory(req.address, uint64_t(req.value), usePma))
return true;
break;
default:
break;
}
}
}
break;
case 'p':
{
URV val = static_cast<URV>(req.value);
hart.pokePc(val);
return true;
}
break;
case 's':
{
bool ok = true;
URV val = static_cast<URV>(req.value);
if (req.address == WhisperSpecialResource::DeferredInterrupts)
hart.setDeferredInterrupts(val);
else if (req.address == WhisperSpecialResource::Seipin)
hart.setSeiPin(val);
else
ok = false;
if (ok)
return true;
break;
}
}
reply.type = Invalid;
return false;
}
template <typename URV>
bool
Server<URV>::peekCommand(const WhisperMessage& req, WhisperMessage& reply, Hart<URV>& hart)
{
reply = req;
URV value;
switch (req.resource)
{
case 'r':
{
unsigned reg = static_cast<unsigned>(req.address);
if (reg == req.address)
if (hart.peekIntReg(reg, value))
{
reply.value = value;
return true;
}
}
break;
case 'f':
{
unsigned reg = static_cast<unsigned>(req.address);
uint64_t fpVal = 0;
if (reg == req.address)
if (hart.peekFpReg(reg, fpVal))
{
reply.value = fpVal;
return true;
}
}
break;
case 'c':
{
URV reset = 0, mask = 0, pokeMask = 0, readMask = 0;
bool virtMode = WhisperFlags{req.flags}.bits.virt;
if (hart.peekCsr(CsrNumber(req.address), value, reset, mask, pokeMask, readMask, virtMode))
{
reply.value = value;
reply.address = mask;
reply.time = pokeMask;
reply.instrTag = readMask;
return true;
}
}
break;
case 'v':
{
unsigned reg = static_cast<unsigned>(req.address);
if (reg == req.address)
{
std::vector<uint8_t> vecVal;
if (hart.peekVecReg(reg, vecVal) and reply.buffer.size() >= vecVal.size())
{
std::reverse(vecVal.begin(), vecVal.end());
for (unsigned i = 0; i < vecVal.size(); ++i)
reply.buffer[i] = vecVal.at(i);
return true;
}
}
}
break;
case 'm':
if (hart.peekMemory(req.address, value, false /*usePma*/))
{
reply.value = value;
return true;
}
break;
case 'p':
reply.value = hart.peekPc();
return true;
case 's':
{
switch(req.address)
{
case WhisperSpecialResource::PrivMode:
reply.value = unsigned(hart.privilegeMode());
return true;
case WhisperSpecialResource::PrevPrivMode:
reply.value = unsigned(hart.lastPrivMode());
return true;
case WhisperSpecialResource::FpFlags:
reply.value = hart.lastFpFlags();
return true;
case WhisperSpecialResource::IncrementalVec:
{
std::vector<uint8_t> fpFlags; std::vector<uint8_t> vxsat;
std::vector<VecRegs::Step> steps;
hart.lastIncVec(fpFlags, vxsat, steps);
assert((fpFlags.size() != 0 and vxsat.size() == 0) or
(fpFlags.size() == 0 and vxsat.size() != 0));
for (unsigned i = 0; i < fpFlags.size(); ++i)
reply.buffer[i] = fpFlags.at(i);
for (unsigned i = 0; i < vxsat.size(); ++i)
reply.buffer[i] = vxsat.at(i);
return true;
}
case WhisperSpecialResource::Trap:
reply.value = hart.lastInstructionTrapped()? 1 : 0;
return true;
case WhisperSpecialResource::DeferredInterrupts:
reply.value = hart.deferredInterrupts();
return true;
case WhisperSpecialResource::Seipin:
reply.value = hart.getSeiPin();
return true;
case WhisperSpecialResource::EffMemAttr:
// Special resource so we don't have to re-translate.
{
uint64_t va = 0, pa = 0;
if (hart.lastLdStAddress(va, pa))
{
auto pma = hart.getPma(pa);
auto effpbmt = VirtMem::effectivePbmt(hart.lastVirtMode(), hart.lastVsPageMode(),
hart.virtMem().lastVsPbmt(), hart.virtMem().lastPbmt());
pma = VirtMem::overridePmaWithPbmt(pma, effpbmt);
reply.value = pma.attributesToInt();
return true;
}
else
break;
}
case WhisperSpecialResource::LastLdStAddress:
{
uint64_t va = 0, pa = 0;
if (hart.lastLdStAddress(va, pa))
reply.value = pa;
return true;
}
default:
break;
}
break;
}
case 'i':
{
uint32_t inst;
if (hart.readInst(req.address, inst))
{
reply.value = inst;
return true;
}
}
}
reply.type = Invalid;
return true;
}
template <typename URV>
void
Server<URV>::disassembleAnnotateInst(Hart<URV>& hart,
const DecodedInst& di, bool interrupted,
bool hasPreTrigger, bool hasPostTrigger,
std::string& text)
{
hart.disassembleInst(di.inst(), text);
if (di.isBranch())
{
if (hart.lastPc() + di.instSize() != hart.peekPc())
text += " (T)";
else
text += " (NT)";
}
if (not interrupted)
{
uint64_t va = 0, pa = 0;
if (hart.lastLdStAddress(va, pa))
{
std::ostringstream oss;
oss << " [0x" << std::hex << va << "]" << std::dec;
text += oss.str();
}
}
if (interrupted)
text += " (interrupted)";
else if (hasPreTrigger)
text += " (pre-trigger)";
else if (hasPostTrigger)
text += " (post-trigger)";
}
template <typename URV>
void
Server<URV>::processStepChanges(Hart<URV>& hart,
uint32_t inst,
std::vector<WhisperMessage>& pendingChanges,
bool interrupted, bool hasPre, bool hasPost,
WhisperMessage& reply)
{
// Get executed instruction.
URV pc = hart.lastPc();
// Add pc and instruction to reply.
reply.type = ChangeCount;
reply.address = pc;
reply.resource = inst;
// Add disassembly of instruction to reply.
DecodedInst di;
hart.decode(0 /*addr: fake*/, 0 /*physAddr: fake*/, inst, di);
std::string text;
if (disassemble_)
disassembleAnnotateInst(hart, di, interrupted, hasPre, hasPost, text);
strncpy(reply.buffer.data(), text.c_str(), reply.buffer.size() - 1);
reply.buffer.back() = 0;
// Order of changes: rfcvm (int reg, fp reg, csr, vec reg, memory, csr)
// Collect integer register change caused by execution of instruction.
pendingChanges.clear();
uint64_t lastVal = 0;
int regIx = hart.lastIntReg(lastVal);
if (regIx > 0)
{
URV value = 0;
if (hart.peekIntReg(regIx, value))
{
WhisperMessage msg;
msg.type = Change;
msg.resource = 'r';
msg.address = regIx;
msg.value = value;
msg.size = sizeof(msg.value);
msg.time = lastVal; // Re-purpose otherwise unused time field.
pendingChanges.push_back(msg);
}
}
// Collect floating point register change.
int fpRegIx = hart.lastFpReg(lastVal);
if (fpRegIx >= 0)
{
uint64_t val = 0;
if (hart.peekFpReg(fpRegIx, val))
{
WhisperMessage msg;
msg.type = Change;
msg.resource = 'f';
msg.address = fpRegIx;
msg.value = val;
msg.size = sizeof(msg.value);
msg.time = lastVal; // Re-purpose otherwise unused time field.
pendingChanges.push_back(msg);
}
}
// Collect vector register change.
unsigned groupSize = 0;
int vecReg = hart.lastVecReg(di, groupSize);
if (vecReg >= 0)
{
for (unsigned ix = 0; ix < groupSize; ++ix, ++vecReg)
{
std::vector<uint8_t> vecData;
if (not hart.peekVecReg(vecReg, vecData))
assert(0 && "Failed to peek vec register");
// Reverse bytes since peekVecReg returns most significant
// byte first.
std::reverse(vecData.begin(), vecData.end());
// Send a change message for each vector element starting
// with element zero and assuming a vector of double words
// (uint64_t). Last element will be padded with zeros if
// vector size in bytes is not a multiple of 8.
unsigned byteCount = vecData.size();
for (unsigned byteIx = 0; byteIx < byteCount; )
{
WhisperMessage msg;
msg.type = Change;
msg.resource = 'v';
msg.address = vecReg;
unsigned size = sizeof(msg.value);
unsigned remain = byteCount - byteIx;
size = std::min(size, remain);
msg.size = size;
for (unsigned i = 0; i < size; ++i)
msg.value |= uint64_t(vecData.at(byteIx++)) << (8*i);
pendingChanges.push_back(msg);
}
}
}
// Collect CSR and trigger changes.
std::vector<CsrNumber> csrs;
std::vector<unsigned> triggers;
hart.lastCsr(csrs, triggers);
// Map to keep CSRs in order and to drop duplicate entries.
std::map<URV,URV> csrMap;
// Collect changed CSRs and their values.
for (CsrNumber csr : csrs)
{
URV value;
// We always record the real csr number for VS/S mappings
if (hart.peekCsr(csr, value, false))
csrMap[URV(csr)] = value;
}
for (const auto& [key, val] : csrMap)
{
WhisperMessage msg(0, Change, 'c', key, val);
msg.size = sizeof(msg.value);
pendingChanges.push_back(msg);
}
// Collect memory change.
uint64_t memAddr = 0, memVal = 0;
unsigned size = hart.lastStore(memAddr, memVal);
if (size)
{
WhisperMessage msg(0, Change, 'm', memAddr, memVal, size);
pendingChanges.push_back(msg);
}
else
{
auto& info = hart.getLastVectorMemory();
unsigned elemSize = info.elemSize_;
if (not info.empty() and not info.isLoad_)
for (auto& einfo : info.elems_)
{
WhisperMessage msg(0, Change, 'm', einfo.va_, einfo.data_, elemSize);
pendingChanges.push_back(msg);
}
}
// Add count of changes to reply.
reply.value = pendingChanges.size();
// The changes will be retrieved one at a time from the back of the
// pendigChanges vector: Put the vector in reverse order. Changes
// are retrieved using a Change request (see interactUsingSocket).
std::reverse(pendingChanges.begin(), pendingChanges.end());
}
template <typename URV>
bool
Server<URV>::checkHartId(const WhisperMessage& req, WhisperMessage& reply)
{
uint32_t hartId = req.hart;
auto hartPtr = system_.findHartByHartId(hartId);
if (not hartPtr)
{
std::cerr << "Error: Hart ID (" << std::dec << hartId
<< ") out of bounds\n";
reply.type = Invalid;
return false;
}
return true;
}
template <typename URV>
bool
Server<URV>::checkHart(const WhisperMessage& req, const std::string& /*command*/,
WhisperMessage& reply)
{
return checkHartId(req, reply);
}
// Server mode step command.
template <typename URV>
bool
Server<URV>::stepCommand(const WhisperMessage& req,
std::vector<WhisperMessage>& pendingChanges,
WhisperMessage& reply,
Hart<URV>& hart,
FILE* traceFile)
{
reply = req;
unsigned pm = unsigned(hart.privilegeMode());
// Execute instruction. Determine if an interrupt was taken or if a
// trigger got tripped.
bool prevDebug = hart.inDebugMode();
bool reenterDebug = false; // True if we should re-enter debug after step.
if (not hart.hasDebugParkLoop())
{
reenterDebug = prevDebug;
if (prevDebug)
hart.exitDebugMode();
}
uint32_t inst = 0;
hart.readInst(hart.pc(), inst); // In case instruction is interrupted.
DecodedInst di;
bool ok = true;
// Memory consistency model support. No-op if mcm is off.
if (system_.isMcmEnabled())
{
hart.setInstructionCount(req.instrTag - 1);
hart.singleStep(di, traceFile);
if (not di.isValid())
assert(hart.lastInstructionCancelled());
ok = system_.mcmRetire(hart, req.time, req.instrTag, di, hart.lastInstructionCancelled());
}
else
hart.singleStep(di, traceFile);
unsigned interrupted = hart.lastInstructionInterrupted() ? 1 : 0;
if (not interrupted)
inst = di.inst();
unsigned preCount = 0, postCount = 0;
hart.countTrippedTriggers(preCount, postCount);
bool hasPre = preCount > 0;
bool hasPost = postCount > 0;
processStepChanges(hart, inst, pendingChanges, interrupted, hasPre,
hasPost, reply);
// Send privilege mode (2 bits), incremental floating point flags (4 bits),
// and trap info (1 bit), stop indicator (1 bit), interrupt (1 bit),
// and virtual mode (1 bit).
WhisperFlags flags;
flags.bits.privMode = pm;
flags.bits.fpFlags = hart.lastFpFlags();
flags.bits.trap = hart.lastInstructionTrapped();
flags.bits.stop = hart.hasTargetProgramFinished();
flags.bits.interrupt = interrupted;
flags.bits.virt = hart.lastVirtMode();
flags.bits.debug = prevDebug;
flags.bits.load = di.isLoad() or di.isAmo() or di.isVectorLoad();
reply.flags = flags.value;
if (reenterDebug)
hart.enterDebugMode(hart.peekPc());
return ok;
}
// Server mode step command.
template <typename URV>
bool
Server<URV>::translateCommand(const WhisperMessage& req,
WhisperMessage& reply)
{
// FIXME: this needs to be updated for 2-stage translation
reply = req;
// Hart id must be valid. Hart must be started.
if (not checkHart(req, "translate", reply))
return false;
uint32_t hartId = req.hart;
auto hartPtr = system_.findHartByHartId(hartId);
if (not hartPtr)
return false;
auto& hart = *hartPtr;
uint64_t va = req.address;
bool r = req.flags & 1, w = (req.flags & 2) != 0, x = (req.flags & 4) != 0;
PrivilegeMode pm = (req.flags & 8) ? PrivilegeMode::Supervisor : PrivilegeMode::User;
bool twoStage = req.flags & 16;
uint64_t pa = 0;
auto ec = hart.transAddrNoUpdate(va, pm, twoStage, r, w, x, pa);
if (ec != ExceptionCause::NONE)
{
reply.type = Invalid;
return false;
}
reply.address = pa;
return true;
}
template <typename URV>
bool
Server<URV>::mcmReadCommand(const WhisperMessage& req, WhisperMessage& reply,
Hart<URV>& hart, FILE* cmdLog)
{
bool ok = true;
uint32_t hartId = req.hart;
unsigned elem = uint16_t(req.resource >> 16); // Vector element ix.
unsigned field = uint16_t(req.resource); // Vector element field (for segment load).
if (req.size <= 8)
{
ok = system_.mcmRead(hart, req.time, req.instrTag, req.address, req.size,
req.value, elem, field);
if (cmdLog)
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mread %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x%" PRIx64 " %d %d\n",
hartId, req.time, req.instrTag, req.address, req.size, req.value,
elem, field);
}
else
{
if (req.size > req.buffer.size())
{
std::cerr << "Error: Server command: McmRead data size too large: "
<< req.size << '\n';
ok = false;
}
else
{
// For speed, use double-word insert when possible, else word, else byte.
uint64_t size = req.size, time = req.time, tag = req.instrTag, addr = req.address;
if ((size & 0x7) == 0 and (addr & 0x7) == 0)
{
const uint64_t* data = reinterpret_cast<const uint64_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 8, ++data)
ok = system_.mcmRead(hart, time, tag, addr + i, 8, *data, elem, field);
}
else if ((size & 0x3) == 0 and (addr & 0x3) == 0)
{
const uint32_t* data = reinterpret_cast<const uint32_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 4, ++data)
ok = system_.mcmRead(hart, time, tag, addr + i, 4, *data, elem, field);
}
else
{
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; ++i, ++data)
ok = system_.mcmRead(hart, time, tag, addr + i, 1, *data, elem, field);
}
if (cmdLog)
{
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mread %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x",
hartId, req.time, req.instrTag, req.address, req.size);
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = req.size; i > 0; --i)
{
unsigned val = data[i-1];
fprintf(cmdLog, "%02x", val);
}
fprintf(cmdLog, " %d %d\n", elem, field);
}
}
}
if (not ok)
reply.type = Invalid;
return ok;
}
template <typename URV>
bool
Server<URV>::mcmInsertCommand(const WhisperMessage& req, WhisperMessage& reply,
Hart<URV>& hart, FILE* cmdLog)
{
bool ok = true;
uint32_t hartId = req.hart;
unsigned elem = uint16_t(req.resource >> 16); // Vector element ix.
unsigned field = uint16_t(req.resource); // Vector element field (for segment store).
if (req.size <= 8)
{
ok = system_.mcmMbInsert(hart, req.time, req.instrTag, req.address, req.size, req.value, elem, field);
if (cmdLog)
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mbinsert %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x%" PRIx64 " %d %d\n",
hartId, req.time, req.instrTag, req.address, req.size, req.value, elem, field);
}
else
{
if (req.size > req.buffer.size())
{
std::cerr << "Error: Server command: McmInsert data size too large: "
<< req.size << '\n';
ok = false;
}
else
{
// For speed, use double-word insert when possible, else word, else byte.
uint64_t size = req.size, time = req.time, tag = req.instrTag, addr = req.address;
if ((size & 0x7) == 0 and (addr & 0x7) == 0)
{
const uint64_t* data = reinterpret_cast<const uint64_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 8, ++data)
ok = system_.mcmMbInsert(hart, time, tag, addr + i, 8, *data, elem, field);
}
else if ((size & 0x3) == 0 and (addr & 0x3) == 0)
{
const uint32_t* data = reinterpret_cast<const uint32_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 4, ++data)
ok = system_.mcmMbInsert(hart, time, tag, addr + i, 4, *data, elem, field);
}
else
{
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; ++i, ++data)
ok = system_.mcmMbInsert(hart, time, tag, addr + i, 1, *data, elem, field);
}
if (cmdLog)
{
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mbinsert %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x",
hartId, req.time, req.instrTag, req.address, req.size);
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = req.size; i > 0; --i)
{
unsigned val = data[i-1];
fprintf(cmdLog, "%02x", val);
}
fprintf(cmdLog, " %d %d\n", elem, field);
}
}
}
if (not ok)
reply.type = Invalid;
return ok;
}
template <typename URV>
bool
Server<URV>::mcmBypassCommand(const WhisperMessage& req, WhisperMessage& reply,
Hart<URV>& hart, FILE* cmdLog)
{
bool ok = true;
uint32_t hartId = req.hart;
unsigned elem = uint16_t(req.resource >> 16); // Vector element ix.
unsigned field = uint16_t(req.resource); // Vector element field (for segment store).
if (req.size <= 8)
{
ok = system_.mcmBypass(hart, req.time, req.instrTag, req.address, req.size, req.value, elem, field);
if (cmdLog)
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mbbypass %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x%" PRIx64 " %d %d\n",
hartId, req.time, req.instrTag, req.address, req.size, req.value, elem, field);
}
else
{
if (req.size > req.buffer.size())
{
std::cerr << "Error: Server command: McmBypass data size too large: "
<< req.size << '\n';
ok = false;
}
else
{
// For speed, use double-word insert when possible, else word, else byte.
uint64_t size = req.size, time = req.time, tag = req.instrTag, addr = req.address;
if ((size & 0x7) == 0 and (addr & 0x7) == 0)
{
const uint64_t* data = reinterpret_cast<const uint64_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 8, ++data)
ok = system_.mcmBypass(hart, time, tag, addr + i, 8, *data, elem, field);
}
else if ((size & 0x3) == 0 and (addr & 0x3) == 0)
{
const uint32_t* data = reinterpret_cast<const uint32_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; i += 4, ++data)
ok = system_.mcmBypass(hart, time, tag, addr + i, 4, *data, elem, field);
}
else
{
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = 0; i < size and ok; ++i, ++data)
ok = system_.mcmBypass(hart, time, tag, addr + i, 1, *data, elem, field);
}
if (cmdLog)
{
fprintf(cmdLog, "hart=%" PRIu32 " time=%" PRIu64 " mbbypass %" PRIu64 " 0x%" PRIx64 " %" PRIu32 " 0x",
hartId, req.time, req.instrTag, req.address, req.size);
const uint8_t* data = reinterpret_cast<const uint8_t*>(req.buffer.data());
for (unsigned i = req.size; i > 0; --i)
{
unsigned val = data[i-1];
fprintf(cmdLog, "%02x", val);
}
fprintf(cmdLog, " %d %d\n", elem, field);
}
}
}
if (not ok)
reply.type = Invalid;
return ok;
}
/// Dump all registers contents in tracefile.
template <typename URV>
static void
serverPrintFinalRegisterState(std::shared_ptr<Hart<URV>> hartPtr)
{
std::ofstream out("issfinal.log");
if (not out)
return;
Interactive<URV>::peekAllIntRegs(*hartPtr, out);
out << "\n";
Interactive<URV>::peekAllFpRegs(*hartPtr, out);
out << "\n";
Interactive<URV>::peekAllTriggers(*hartPtr, out);
out << "\n";
Interactive<URV>::peekAllCsrs(*hartPtr, out);
}
static
const char*
specialResourceToStr(uint64_t v)
{
WhisperSpecialResource sr = WhisperSpecialResource(v);
switch (sr)
{
case WhisperSpecialResource::PrivMode: return "pm";
case WhisperSpecialResource::PrevPrivMode: return "ppm";
case WhisperSpecialResource::FpFlags: return "iff";
case WhisperSpecialResource::IncrementalVec: return "iv";
case WhisperSpecialResource::Trap: return "trap";
case WhisperSpecialResource::DeferredInterrupts: return "defi";
case WhisperSpecialResource::Seipin: return "seipin";
case WhisperSpecialResource::EffMemAttr: return "effma";
case WhisperSpecialResource::LastLdStAddress: return "lastldst";
}
return "?";
}
template <typename URV>
void
doPageTableWalk(const Hart<URV>& hart, WhisperMessage& reply)
{
bool isInstr = reply.flags & 1;