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+<!-- Mirrored from members.lycos.co.uk/leeedavison/6502/acia/index.html by HTTrack Website Copier/3.x [XR&CO'2007], Sat, 17 Jan 2009 20:55:23 GMT -->
+<HEAD>
+<TITLE>
+  6551 RS232 port
+</TITLE>
+<META name="description" content="6551 RS232 port.">
+</HEAD>
+<BODY BACKGROUND="../../back.png" LINK="#0000EE" VLINK="#0000CC">
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0>
+<TR><TD WIDTH=20%><A HREF="../index.html">
+  <IMG SRC="../../up.gif" BORDER=0 ALT="Up one"></A></TD>
+<TD WIDTH=60% ALIGN=CENTER>
+<B><FONT SIZE=+1>6551 RS232 port. </FONT></B>
+<FONT SIZE=-1>By Lee Davison.</FONT>
+</TD><TD WIDTH=20%><A HREF="../../index-2.html">
+ <IMG SRC="../../epc.png" ALIGN=RIGHT BORDER=0 ALT="Up to top"></A>
+</TD></TR></TABLE>
+<HR>
+<B><U>Hardware.</U></B><P>
+<CENTER>
+<B>6551 RS232 port circuit.</B>
+<P>
+ <IMG SRC="acia.png" TITLE="6551 ACIA RS232 interface" BORDER=1><P>
+</CENTER>
+<BLOCKQUOTE>
+ The connector on the top left of the diagram is from my own 6502 boards (see <A
+ HREF="../sbc/index.html">sbc project</A>) and is as it is for two reasons. It's easy
+ to wire on a stripboard layout and I have a lot of 26 way ribbon, headers and plugs.
+ All the signals are directly from the 6502 except /SEL0 and /SEL1 which are used to
+ select the block $F0xx with /SEL0 = 0 and /SEL1 = 1.
+<P>
+ The 10 pin IDC plug is to allow use of a standard PC type COM port plug. This was done
+ because it's easier to wire on stripboard and allows the choice of a 9 or 25 pin
+ connector.
+<P>
+ The two capacitors are low ESR electrolytics and are placed near the 6551 and near the
+ MAX232. If you don't have this type to hand you can use standard electrolytics with some
+ low value ceramic capacitor, say 0.1uF, in parallel.
+<P>
+ The 6551 occupies the 256 byte block $F0xx and, as the 6502 this was made for is clocked
+ at 1.832MHz, is clocked by the phase 2 clock. If a different processor clock is being
+ used then the 6551 can be clocked by a 1.832MHz oscillator as shown in the alternate
+ clock diagram. Two jumpers are used to select which interrupt the 6551 is tied to. If
+ interrupts are not required then both jumpers can be left open.
+<P>
+ The MAX232 performs level translation between the TTL levels of the 6551 and the bipolar
+ RS232 levels. Only the signals for a 5 wire interface are implemented with DCD and DSR
+ being tied low on the 6551 to allow continuous operation.
+<P>
+ The GAL16V8A is optional and is used purely to generate the chip select. This was not
+ fitted to the original because it was not necessary to fully decode this part. For anyone
+ interested the equations for this chip are in acia_01.pld and can be compiled with
+ WinCUPL. The fuse file, acia_01.jed is also included.
+</BLOCKQUOTE>
+<CENTER>
+<B> The finished board.</B><P>
+ <IMG TITLE="The finished board." SRC="acialeft.jpg" BORDER=1>
+ <IMG TITLE="With a PC type 25 way D chassis plug." SRC="aciaright.jpg" BORDER=1><P>
+</CENTER>
+<P>
+<B><U>Software.</U></B>
+<BLOCKQUOTE>
+ To use the 6551 as a polled device the software is fairly simple. First the 6551 must
+ be reset and the baud rate, character length and parity must be set.
+<BLOCKQUOTE>
+<TABLE CELLPADDING=8 CELLSPACING=0 BORDER=1 BGCOLOR=white><TR><TD>
+<PRE>
+
+; set the 6551 register addresses
+
+A_rxd			= $F000	; ACIA receive data port
+A_txd			= $F000	; ACIA transmit data port
+A_sts			= $F001	; ACIA status port
+A_res			= $F001	; ACIA reset port
+A_cmd			= $F002	; ACIA command port
+A_ctl			= $F003	; ACIA control port
+
+; initialise 6551 ACIA
+
+	STA	A_res		; soft reset (value not important)
+	LDA	#$0B		; set specific modes and functions
+				; no parity, no echo, no Tx interrupt
+				; no Rx interrupt, enable Tx/Rx
+	STA	A_cmd		; save to command register
+				; all the following 8-N-1 with the baud rate
+				; generator selected. uncomment the line with
+				; the required baud rate.
+;	LDA	#$1A		; 8-N-1, 2400 baud
+;	LDA	#$1C		; 8-N-1, 4800 baud
+	LDA	#$1E		; 8-N-1, 9600 baud
+;	LDA	#$1F		; 8-N-1, 19200 baud
+	STA	A_ctl		; set control register
+</PRE>
+</TD></TR></TABLE>
+</BLOCKQUOTE>
+ To send a character all we need do is wait for the Tx buffer to empty then write the byte.
+<BLOCKQUOTE>
+<TABLE CELLPADDING=8 CELLSPACING=0 BORDER=1 BGCOLOR=white><TR><TD>
+<PRE>
+
+; wait for ACIA and Tx byte
+
+	PHA			; save A
+LAB_WAIT_Tx
+	LDA	A_sts		; get status byte
+	AND	#$10		; mask transmit buffer status flag
+	BEQ	LAB_WAIT_Tx	; loop if tx buffer full
+
+	PLA			; restore A
+	STA	A_txd		; save byte to ACIA data port
+</PRE>
+</TD></TR></TABLE>
+</BLOCKQUOTE>
+ To receive a character we need to wait for the Rx buffer to fill then read the byte.
+<BLOCKQUOTE>
+<TABLE CELLPADDING=8 CELLSPACING=0 BORDER=1 BGCOLOR=white><TR><TD>
+<PRE>
+
+; wait for ACIA and Rx byte
+
+LAB_WAIT_Rx
+	LDA	A_sts		; get ACIA status
+	AND	#$08		; mask rx buffer status flag
+	BEQ	LAB_WAIT_Rx	; loop if rx buffer empty
+
+	LDA	A_rxd		; get byte from ACIA data port
+</PRE>
+</TD></TR></TABLE>
+</BLOCKQUOTE>
+</BLOCKQUOTE>
+<HR>
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0><TR>
+<TD WIDTH=30%><FONT SIZE=-1>Last page update: 29th August, 2003.</FONT></TD>
+<TD WIDTH=40% ALIGN=CENTER>
+<A HREF="mailto:[email protected]">e-mail me 
+<IMG SRC="../../eml_sm.png" ALIGN=CENTER BORDER=0 alt="e-mail"></A></TD>
+<TD WIDTH=30%></TD></TR></TABLE>
+</BODY>
+
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+</pre></xmp></noscript>
+
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diff --git a/...o.hansotten.nl/members.lycos.co.uk/20090117205334/leeedavison/6502/atkey/atkey_01jed.html b/...o.hansotten.nl/members.lycos.co.uk/20090117205334/leeedavison/6502/atkey/atkey_01jed.html
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+
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+<HEAD>
+<TITLE>
+  AT style keyboard interface - GAL logic fuse file.
+</TITLE>
+<META name="description" content="An AT style keyboard interface for the 6502.">
+</HEAD>
+<BODY BACKGROUND="../../back.png" LINK="#0000EE" VLINK="#0000CC">
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0>
+<TR><TD WIDTH=20%><A HREF="index.html#link_1">
+  <IMG SRC="../../up.gif" BORDER=0 ALT="Up one"></A></TD>
+<TD WIDTH=60% ALIGN=CENTER>
+<B><FONT SIZE=+1>GAL logic fuse file. </FONT></B>
+<FONT SIZE=-1>By Lee Davison.</FONT>
+</TD><TD WIDTH=20%><A HREF="../../index-2.html">
+ <IMG SRC="../../epc.png" ALIGN=RIGHT BORDER=0 ALT="Up to top"></A>
+</TD></TR></TABLE>
+<HR>
+<A HREF="atkey_01_jed.zip">Download this file <IMG SRC="../../zip_sm.png" ALT="Download"
+ BORDER=0></A>
+<P>
+<TABLE CELLPADDING=8 CELLSPACING=0 BORDER=1 BGCOLOR=WHITE><TR><TD>
+<PRE>
+
+CUPL(WM)        4.7b  Serial# XX-xxxxxxxx
+Device          g16v8as  Library DLIB-h-36-2				
+Created         Wed Mar 14 21:00:56 2001
+Name            ATkey_01 
+Partno          00 
+Revision        01 
+Date            01/08/00 
+Designer        Lee 
+Company         P1R8 
+Assembly        None 
+Location        
+*QP20 
+*QF2194 
+*G0 
+*F0 
+*L00000 10101011101110110111011010010110
+*L00256 10101011101110110111101010010110
+*L02048 00000000001100000011000000100000
+*L02112 00000000001111111111111111111111
+*L02144 11111111111111111111111111111111
+*L02176 111111111111111110
+*C0E13
+*7A09
+</PRE>
+</TD></TR></TABLE><P>
+<HR>
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0><TR>
+<TD WIDTH=30%><FONT SIZE=-1>Last page update: 13th August, 2003.</FONT></TD>
+<TD WIDTH=40% ALIGN=CENTER>
+<A HREF="mailto:[email protected]">e-mail me 
+<IMG SRC="../../eml_sm.png" ALIGN=CENTER BORDER=0 alt="e-mail"></A></TD>
+<TD WIDTH=30%></TD></TR></TABLE>
+</BODY>
+
+<!-- Mirrored from members.lycos.co.uk/leeedavison/6502/atkey/atkey_01jed.html by HTTrack Website Copier/3.x [XR&CO'2007], Sat, 17 Jan 2009 21:02:16 GMT -->
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+</pre></xmp></noscript>
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diff --git a/...o.hansotten.nl/members.lycos.co.uk/20090117205334/leeedavison/6502/atkey/atkey_01pld.html b/...o.hansotten.nl/members.lycos.co.uk/20090117205334/leeedavison/6502/atkey/atkey_01pld.html
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+<TITLE>
+  AT style keyboard interface - GAL logic equations file.
+</TITLE>
+<META name="description" content="An AT style keyboard interface for the 6502.">
+</HEAD>
+<BODY BACKGROUND="../../back.png" LINK="#0000EE" VLINK="#0000CC">
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0>
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+  <IMG SRC="../../up.gif" BORDER=0 ALT="Up one"></A></TD>
+<TD WIDTH=60% ALIGN=CENTER>
+<B><FONT SIZE=+1>GAL logic equations file. </FONT></B>
+<FONT SIZE=-1>By Lee Davison.</FONT>
+</TD><TD WIDTH=20%><A HREF="../../index-2.html">
+ <IMG SRC="../../epc.png" ALIGN=RIGHT BORDER=0 ALT="Up to top"></A>
+</TD></TR></TABLE>
+<HR>
+<A HREF="atkey_01_pld.zip">Download this file <IMG SRC="../../zip_sm.png" ALT="Download"
+ BORDER=0></A>
+<P>
+<TABLE CELLPADDING=8 CELLSPACING=0 BORDER=1 BGCOLOR=WHITE><TR><TD>
+<PRE>
+
+Name     atkey_01 ;
+PartNo   00 ;
+Date     19/03/01 ;
+Revision 01 ;
+Designer Lee ;
+Company   ;
+Assembly None ;
+Location  ;
+Device   g16v8as ;
+
+/* This GAL is the select logic for the AT keyboard interface board	*/
+
+/* Logic minimisations			None				*/
+/* Optimisations			None				*/
+/* Download				JEDEC/POF/PRG			*/
+/* Doc File Options			fuse plot, equations		*/
+/* Output				None				*/
+
+/* *************** INPUT PINS *********************/
+
+PIN	1 = A4		;				/* address bus	*/ 
+PIN	2 = A3		;				/* address bus	*/ 
+PIN	3 = A2		;				/* address bus	*/ 
+PIN	4 = A0		;				/* address bus	*/ 
+PIN	5 = A1		;				/* address bus	*/ 
+PIN	6 = p02		;				/* CPU phase 2	*/ 
+PIN	7 = RW		;				/* read write	*/ 
+PIN	8 = !SEL1	;				/* block select	*/ 
+PIN	9 = !SEL0	;				/* block select	*/ 
+PIN	11 = A6		;				/* address bus	*/ 
+PIN	12 = A5		;				/* address bus	*/ 
+PIN	13 = A7		;				/* address bus	*/ 
+
+/* *************** OUTPUT PINS *********************/
+
+PIN  19 = !KBR		;			/* key port read strobe		*/ 
+PIN  18 = !KBW		;			/* key port write strobe	*/ 
+/*PIN  17 = 		;			/* 				*/ 
+/*PIN  16 = 		;			/* 				*/ 
+/*PIN  15 = 		;			/* 				*/ 
+/*PIN  14 = 		;			/* 				*/ 
+
+/* intermediate terms */
+
+ADDR		= !A7 & !A6 & A5 & !A4 & !A3 & !A2 & !A1 & !A0 & !SEL0 & SEL1 ;
+							/* F120h (0010 0000)
+
+/* Output terms */
+
+KBR	= ADDR &  RW & p02 ;			/* key port read strobe		*/
+KBW	= ADDR & !RW & p02 ;			/* key port write strobe	*/
+</PRE>
+</TD></TR></TABLE><P>
+<HR>
+<TABLE BORDER=0 WIDTH=100% CELLSPACING=0 CELLPADDING=0><TR>
+<TD WIDTH=30%><FONT SIZE=-1>Last page update: 13th August, 2003.</FONT></TD>
+<TD WIDTH=40% ALIGN=CENTER>
+<A HREF="mailto:[email protected]">e-mail me 
+<IMG SRC="../../eml_sm.png" ALIGN=CENTER BORDER=0 alt="e-mail"></A></TD>
+<TD WIDTH=30%></TD></TR></TABLE>
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+
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