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Emphasise that read_verilog doesn't lint #4705

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Docs: Less exaggeration
KrystalDelusion committed Nov 12, 2024

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t3chguy Michael Telatynski
commit d0e56777607a66777bc678399b54b013935e49f7
4 changes: 2 additions & 2 deletions README.md
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does not perform any syntax checking

Is an exaggeration. Maybe: "does not perform robust syntax checking"?

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@nakengelhardt nakengelhardt Nov 11, 2024

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I see it more as a statement of intent. read_verilog doesn't try to check if the input is correct or not, it just proceeds assuming it is correct. If that turns out to be a wrong assumption it will sometimes error out, but often not in a way that is particularly useful for the user for finding the problem. Sometimes it will also just continue, and end up with who knows what netlist. Given the history of this code and the alternatives, we think it would be a waste of effort to change that.

Original file line number Diff line number Diff line change
@@ -264,8 +264,8 @@ Additional information
======================

The ``read_verilog`` command, used by default when calling ``read`` with Verilog
source input, does not perform any syntax checking. You should instead lint
your source with another tool such as
source input, does not perform syntax checking. You should instead lint your
source with another tool such as
[Verilator](https://www.veripool.org/verilator/) first, e.g. by calling
``verilator --lint-only``.