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Added xiaomi Mi-Smart-Hub-2-Pro lumi-gateway-mgl001 / mcn001 / Aqara E1 support #109

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Original file line number Diff line number Diff line change
@@ -0,0 +1,38 @@
--- a/config/sl_iostream_usart_vcom_config.h 2023-03-14 15:14:40.895685292 +0100
+++ b/config/sl_iostream_usart_vcom_config.h 2023-03-14 15:32:20.543280395 +0100
@@ -84,21 +84,24 @@
// <<< sl:start pin_tool >>>
// <usart signal=TX,RX,(CTS),(RTS)> SL_IOSTREAM_USART_VCOM
// $[USART_SL_IOSTREAM_USART_VCOM]
-#warning "IO Stream USART peripheral not configured"
-// #define SL_IOSTREAM_USART_VCOM_PERIPHERAL USART0
-// #define SL_IOSTREAM_USART_VCOM_PERIPHERAL_NO 0
+#define SL_IOSTREAM_USART_VCOM_PERIPHERAL USART0
+#define SL_IOSTREAM_USART_VCOM_PERIPHERAL_NO 0

-// #define SL_IOSTREAM_USART_VCOM_TX_PORT gpioPortC
-// #define SL_IOSTREAM_USART_VCOM_TX_PIN 11
+// USART0 TX on PB01
+#define SL_IOSTREAM_USART_VCOM_TX_PORT gpioPortB
+#define SL_IOSTREAM_USART_VCOM_TX_PIN 1

-// #define SL_IOSTREAM_USART_VCOM_RX_PORT gpioPortC
-// #define SL_IOSTREAM_USART_VCOM_RX_PIN 10
+// USART0 RX on PB00
+#define SL_IOSTREAM_USART_VCOM_RX_PORT gpioPortB
+#define SL_IOSTREAM_USART_VCOM_RX_PIN 0

-// #define SL_IOSTREAM_USART_VCOM_CTS_PORT gpioPortA
-// #define SL_IOSTREAM_USART_VCOM_CTS_PIN 12
+// USART0 CTS on PD03
+#define SL_IOSTREAM_USART_VCOM_CTS_PORT gpioPortD
+#define SL_IOSTREAM_USART_VCOM_CTS_PIN 3

-// #define SL_IOSTREAM_USART_VCOM_RTS_PORT gpioPortC
-// #define SL_IOSTREAM_USART_VCOM_RTS_PIN 8
+// USART0 RTS on PD04
+#define SL_IOSTREAM_USART_VCOM_RTS_PORT gpioPortD
+#define SL_IOSTREAM_USART_VCOM_RTS_PIN 4
// [USART_SL_IOSTREAM_USART_VCOM]$
// <<< sl:end pin_tool >>>

Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
--- a/config/sl_uartdrv_usart_vcom_config.h 2023-03-16 01:55:55.270307126 +0100
+++ b/config/sl_uartdrv_usart_vcom_config.h 2023-03-16 02:00:15.095622384 +0100
@@ -76,21 +76,21 @@
// <<< sl:start pin_tool >>>
// <usart signal=TX,RX,(CTS),(RTS)> SL_UARTDRV_USART_VCOM
// $[USART_SL_UARTDRV_USART_VCOM]
-#warning "UARTDRV USART peripheral not configured"
-// #define SL_UARTDRV_USART_VCOM_PERIPHERAL USART0
-// #define SL_UARTDRV_USART_VCOM_PERIPHERAL_NO 0
+// #warning "UARTDRV USART peripheral not configured"
+#define SL_UARTDRV_USART_VCOM_PERIPHERAL USART0
+#define SL_UARTDRV_USART_VCOM_PERIPHERAL_NO 0

-// #define SL_UARTDRV_USART_VCOM_TX_PORT gpioPortA
-// #define SL_UARTDRV_USART_VCOM_TX_PIN 0
+#define SL_UARTDRV_USART_VCOM_TX_PORT gpioPortB
+#define SL_UARTDRV_USART_VCOM_TX_PIN 1

-// #define SL_UARTDRV_USART_VCOM_RX_PORT gpioPortA
-// #define SL_UARTDRV_USART_VCOM_RX_PIN 1
+#define SL_UARTDRV_USART_VCOM_RX_PORT gpioPortB
+#define SL_UARTDRV_USART_VCOM_RX_PIN 0

-// #define SL_UARTDRV_USART_VCOM_CTS_PORT gpioPortA
-// #define SL_UARTDRV_USART_VCOM_CTS_PIN 2
+#define SL_UARTDRV_USART_VCOM_CTS_PORT gpioPortD
+#define SL_UARTDRV_USART_VCOM_CTS_PIN 3

-// #define SL_UARTDRV_USART_VCOM_RTS_PORT gpioPortA
-// #define SL_UARTDRV_USART_VCOM_RTS_PIN 3
+#define SL_UARTDRV_USART_VCOM_RTS_PORT gpioPortD
+#define SL_UARTDRV_USART_VCOM_RTS_PIN 4
// [USART_SL_UARTDRV_USART_VCOM]$
// <<< sl:end pin_tool >>>

Original file line number Diff line number Diff line change
@@ -0,0 +1,53 @@
From 6c8377ef5ce335bf3bc3341e6d45f6c2aca4a61e Mon Sep 17 00:00:00 2001
From: Tim Lunn <[email protected]>
Date: Thu, 28 Dec 2023 18:33:50 +1100
Subject: [PATCH] config: configure cpc usart vcom B1B0-D3D4

---
config/sl_cpc_drv_uart_usart_vcom_config.h | 30 +++++++++++-----------
1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/config/sl_cpc_drv_uart_usart_vcom_config.h b/config/sl_cpc_drv_uart_usart_vcom_config.h
index dbce4ed..c8c835f 100644
--- a/config/sl_cpc_drv_uart_usart_vcom_config.h
+++ b/config/sl_cpc_drv_uart_usart_vcom_config.h
@@ -59,21 +59,21 @@
// <<< sl:start pin_tool >>>
// <usart signal=TX,RX,(CTS),(RTS)> SL_CPC_DRV_UART_VCOM
// $[USART_SL_CPC_DRV_UART_VCOM]
-#warning "CPC USART peripheral not configured"
-// #define SL_CPC_DRV_UART_VCOM_PERIPHERAL USART0
-// #define SL_CPC_DRV_UART_VCOM_PERIPHERAL_NO 0
-//
-// #define SL_CPC_DRV_UART_VCOM_TX_PORT gpioPortD
-// #define SL_CPC_DRV_UART_VCOM_TX_PIN 13
-//
-// #define SL_CPC_DRV_UART_VCOM_RX_PORT gpioPortD
-// #define SL_CPC_DRV_UART_VCOM_RX_PIN 14
-//
-// #define SL_CPC_DRV_UART_VCOM_CTS_PORT gpioPortD
-// #define SL_CPC_DRV_UART_VCOM_CTS_PIN 13
-//
-// #define SL_CPC_DRV_UART_VCOM_RTS_PORT gpioPortD
-// #define SL_CPC_DRV_UART_VCOM_RTS_PIN 14
+
+#define SL_CPC_DRV_UART_VCOM_PERIPHERAL USART0
+#define SL_CPC_DRV_UART_VCOM_PERIPHERAL_NO 0
+
+#define SL_CPC_DRV_UART_VCOM_TX_PORT gpioPortB
+#define SL_CPC_DRV_UART_VCOM_TX_PIN 01
+
+#define SL_CPC_DRV_UART_VCOM_RX_PORT gpioPortB
+#define SL_CPC_DRV_UART_VCOM_RX_PIN 00
+
+#define SL_CPC_DRV_UART_VCOM_CTS_PORT gpioPortD
+#define SL_CPC_DRV_UART_VCOM_CTS_PIN 3
+
+#define SL_CPC_DRV_UART_VCOM_RTS_PORT gpioPortD
+#define SL_CPC_DRV_UART_VCOM_RTS_PIN 4
// [USART_SL_CPC_DRV_UART_VCOM]$
// <<< sl:end pin_tool >>>

--
2.40.1

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22 changes: 22 additions & 0 deletions manifests/lumi-gateway-mgl001.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
{
"name": "Mi-Smart-Hub-2-Pro",
"target": "lumi-gateway-mgl001",
"device": "EFR32MG21A020F512IM32",
"ncp-uart-hw": {
"configuration": {
"EMBER_APS_UNICAST_MESSAGE_COUNT":32,
"EMBER_PACKET_BUFFER_COUNT":255,
"SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE":"uartFlowControlSoftware"
}
},
"rcp-uart-802154": {
"configuration": {
"SL_CPC_DRV_UART_VCOM_FLOW_CONTROL_TYPE":"usartHwFlowControlNone"
}
},
"ot-rcp": {
"configuration": {
"SL_UARTDRV_USART_VCOM_FLOW_CONTROL_TYPE":"usartHwFlowControlNone"
}
}
}