cores/clock/intel: add reset to Intel PLLs

[piotro888]

self.reset is not connected in IntelClocking PLLs.
I think it was simply missed, or is there some reason for it?

It makes declared reset input in some current Intel board definitions not effective (like here) and soc_rst that works via CRG ignored.

[enjoy-digital]

Thanks @piotro888, have you tested reboot command in the BIOS with this PR? If so and working, this could indeed be merged.

[piotro888]

BIOS reset hangs up the SoC. I only tested external reset before, thanks!
I will check if workarounds from Xilinx clocking to delay the reset or anding locked with ~reset would solve this issue

[enjoy-digital]

@piotro888: Thanks for the feedback, that's possible the reset was not present for this reason, but spending enough time lookng at it should allow finding a proper solution.

[piotro888]

add_reset_delay adapted from Xilinx clocking fixed the BIOS reboot issue

[enjoy-digital]

Great, thanks a lot @piotro888! Let's merge then.

[piotro888]

Thanks!