add missing project json file

impl/nestang_primer25k_process_config.json

@@ -0,0 +1,105 @@
+{
+ "Allow_Duplicate_Modules" : false,
+ "Annotated_Properties_for_Analyst" : true,
+ "BACKGROUND_PROGRAMMING" : "off",
+ "CMSER" : false,
+ "CMSER_CHECKSUM" : false,
+ "CMSER_MODE" : "auto",
+ "COMPRESS" : false,
+ "CPU" : true,
+ "CRC_CHECK" : true,
+ "Clock_Conversion" : true,
+ "Clock_Route_Order" : 0,
+ "Correct_Hold_Violation" : true,
+ "DONE" : true,
+ "DOWNLOAD_SPEED" : "default",
+ "Default_Enum_Encoding" : "default",
+ "Disable_Insert_Pad" : false,
+ "ENABLE_MERGE_MODE" : false,
+ "ENCRYPTION_KEY" : false,
+ "ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
+ "ERROR_DECTION_AND_CORRECTION" : false,
+ "ERROR_DECTION_ONLY" : false,
+ "ERROR_INJECTION" : false,
+ "EXTERNAL_MASTER_CONFIG_CLOCK" : false,
+ "FORMAT" : "binary",
+ "FREQUENCY_DIVIDER" : "1",
+ "FSM Compiler" : true,
+ "Fanout_Guide" : 10000,
+ "Frequency" : "Auto",
+ "Generate_Constraint_File_of_Ports" : false,
+ "Generate_IBIS_File" : false,
+ "Generate_Plain_Text_Timing_Report" : false,
+ "Generate_Post_PNR_Simulation_Model_File" : false,
+ "Generate_Post_Place_File" : false,
+ "Generate_SDF_File" : false,
+ "Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
+ "GwSyn_Loop_Limit" : 2000,
+ "HOTBOOT" : false,
+ "I2C" : true,
+ "I2C_SLAVE_ADDR" : "00",
+ "Implicit_Initial_Value_Support" : false,
+ "IncludePath" : [
+
+ ],
+ "Incremental_Compile" : "",
+ "Initialize_Primitives" : false,
+ "JTAG" : false,
+ "MODE_IO" : false,
+ "MSPI" : true,
+ "MSPI_JUMP" : false,
+ "MULTIBOOT_ADDRESS_WIDTH" : "24",
+ "MULTIBOOT_MODE" : "Normal",
+ "MULTIBOOT_SPI_FLASH_ADDRESS" : "000000",
+ "MULTIJUMP_ADDRESS_WIDTH" : "24",
+ "MULTIJUMP_MODE" : "Normal",
+ "MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
+ "Multi_Boot" : true,
+ "Multiple_File_Compilation_Unit" : true,
+ "Number_of_Critical_Paths" : "",
+ "Number_of_Start/End_Points" : "",
+ "OUTPUT_BASE_NAME" : "nes",
+ "POWER_ON_RESET_MONITOR" : true,
+ "PRINT_BSRAM_VALUE" : true,
+ "PROGRAM_DONE_BYPASS" : false,
+ "Pipelining" : true,
+ "PlaceInRegToIob" : true,
+ "PlaceIoRegToIob" : true,
+ "PlaceOutRegToIob" : true,
+ "Place_Option" : "0",
+ "Process_Configuration_Verion" : "1.0",
+ "Promote_Physical_Constraint_Warning_to_Error" : true,
+ "Push_Tristates" : true,
+ "READY" : true,
+ "RECONFIG_N" : false,
+ "Ram_RW_Check" : true,
+ "Replicate_Resources" : false,
+ "Report_Auto-Placed_Io_Information" : false,
+ "Resolve_Mixed_Drivers" : false,
+ "Resource_Sharing" : true,
+ "Retiming" : false,
+ "Route_Maxfan" : 23,
+ "Route_Option" : "0",
+ "Run_Timing_Driven" : true,
+ "SECURE_MODE" : false,
+ "SECURITY_BIT" : true,
+ "SSPI" : true,
+ "STOP_CMSER" : false,
+ "Show_All_Warnings" : false,
+ "Synthesis On/Off Implemented as Translate On/Off" : false,
+ "Synthesize_tool" : "GowinSyn",
+ "TclPre" : "",
+ "TopModule" : "nestang_top",
+ "USERCODE" : "default",
+ "Unused_Pin" : "As_input_tri_stated_with_pull_up",
+ "Update_Compile_Point_Timing_Data" : false,
+ "Use_Clock_Period_for_Unconstrainted IO" : false,
+ "VCCAUX" : 3.3,
+ "VCCX" : "3.3",
+ "VHDL_Standard" : "VHDL_Std_1993",
+ "Verilog_Standard" : "Vlg_Std_Sysv2017",
+ "WAKE_UP" : "0",
+ "Write_Vendor_Constraint_File" : true,
+ "show_all_warnings" : false,
+ "turn_off_bg" : false
+}

src/assets/logo.py

@@ -0,0 +1,47 @@
+#!/usr/bin/python3
+
+# generate LOGO lines for gowin_dpb_menu.v
+
+# 72 columns, 14 rows
+LOGO = ["000011110000110011111111001111001111111110000000000000000000000000000000",
+        "000011110000110011111111011111101111111110000000000000000000000000000000",
+        "000011111000110011100000011100100001110000000000000000000000000000000000",
+        "000011111000110011100000011100000001110000011111000111111100001111110000",
+        "000011011100110011111110001110000001110000110011100111001110011100111000",
+        "000011001110110011111110000111000001110000000011100110001110011000111000",
+        "000011001111110011000000000011100001110000111111100110001110111000111000",
+        "000011000111110011000000110011100001110001111111100110001110111000111000",
+        "000011000011110011111110111111100001100001110011100110001110011001111000",
+        "000011000011110011111110011111000001100000111111100110001110001111111000",
+        "000000000000000000000000000000000000000000000000000000000000000000111000",
+        "000000000000000000000000000000000000000000000000000000000000011001110000",
+        "000000000000000000000000000000000000000000000000000000000000011111100000",
+        "000000000000000000000000000000000000000000000000000000000000000000000000",
+        ]
+
+# gowin_dpb_menu.v's logo format is 9 bytes per row, 14 rows, in total 126 bytes
+
+r = []
+
+for i in range(126):
+    j = i % 9
+    s = LOGO[i // 9][j*8 : j*8+8]
+    b = 0
+    for k in range(8):
+        if s[k] == '1':
+            b += 1 << k
+    # print("{} -> {:02X}".format(s, b))
+    r.append(b)
+
+assert(len(r) == 126)
+
+r.append(0)
+r.append(0)
+
+for i in range(4):
+    off = i * 32
+    print("defparam dpb_inst_0.INIT_RAM_{:02X} = 256'h".format(0x1C+i), end='')
+    for j in range(31, -1, -1):     # 31, 30, ...
+        print("{:02X}".format(r[off+j]), end='')
+    print()
+