Skip to content
CI

Revert "[opentitantool] Refuse downgrading HyperDebug firmware" #4617

Sign in to view logs

Revert "[opentitantool] Refuse downgrading HyperDebug firmware"

Revert "[opentitantool] Refuse downgrading HyperDebug firmware" #4617

Triggered via pull request January 18, 2025 20:05
@jesultrajesultra
synchronize #25934
jesultra:hyperdebug_downgrade
Status Success
Total duration 1h 0m 16s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
4m 54s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 50s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 57s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1m 50s
Earl Grey for CW310 / Build bitstream
Lint (slow)
12m 2s
Lint (slow)
Build documentation
6m 29s
Build documentation
Airgapped build
9m 47s
Airgapped build
Verible lint
1m 5s
Verible lint
Run OTBN smoke Test
2m 51s
Run OTBN smoke Test
Run OTBN crypto tests
2m 52s
Run OTBN crypto tests
Verilated English Breakfast
8m 36s
Verilated English Breakfast
Verilated Earl Grey
55m 4s
Verilated Earl Grey
CW305's Bitstream
23m 38s
CW305's Bitstream
Build Docker Containers
2m 55s
Build Docker Containers
Build and test software
15m 37s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
12m 49s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
26m 27s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
44m 50s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
36m 30s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
5m 18s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
1m 7s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
7m 59s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
19m 26s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 57s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
44m 49s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
5m 7s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
44m 9s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
20s
Verify FPGA jobs
Fit to window
Zoom out
Zoom in

Annotations

8 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.39 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
58.4 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55 KB
execute_rom_ext_fpga_tests_cw310-targets
583 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
25.4 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.26 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
46 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.3 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
40 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
19.8 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.24 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.3 KB
partial-build-bin-chip_earlgrey_cw310
6.02 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.04 MB
partial-build-bin-chip_earlgrey_cw340
9.83 MB
sw_build_test-test-results
72.6 KB
verilated_englishbreakfast
6.96 MB
verilator_earlgrey-test-results
9.05 KB