[rtl, aon_timer] Reset core.prescale_count on wkup_ctrl write

The AON timer core has an internal counter `prescale_count_q` which is
not reset upon each write to wkup_ctrl.
This causes issues if the WKUP timer is re-configured to a lower
prescaler value than it was before, and the `prescale_count_q` variable
is greater than the new prescaler value, forcing the
`prescale_count_q` counter to overflow itself causing a non-spec
compliant behavior.

In order to mitigate the above, the internal `prescale_count_q` is
reset after wkup_ctrl write. Thus, the aon timer is forced to count
from scratch the new intended prescaler value.

Signed-off-by: Antonio Martinez Zambrana <[email protected]>

hw/ip/aon_timer/rtl/aon_timer_core.sv

@@ -45,6 +45,8 @@ module aon_timer_core import aon_timer_reg_pkg::*; (
   always_ff @(posedge clk_aon_i or negedge rst_aon_ni) begin
     if (!rst_aon_ni) begin
       prescale_count_q <= 12'h000;
+    end else if (reg2hw_i.wkup_ctrl.prescaler.qe) begin
+      prescale_count_q <= 12'h000;
     end else if (prescale_en) begin
       prescale_count_q <= prescale_count_d;
     end

hw/ip/aon_timer/rtl/aon_timer_reg_pkg.sv

@@ -24,6 +24,7 @@ package aon_timer_reg_pkg;
   typedef struct packed {
     struct packed {
       logic [11:0] q;
+      logic        qe;
     } prescaler;
     struct packed {
       logic        q;

hw/ip/aon_timer/rtl/aon_timer_reg_top.sv

@@ -644,7 +644,7 @@ module aon_timer_reg_top (
     .d      ('0),
 
     // to internal hardware
-    .qe     (),
+    .qe     (reg2hw.wkup_ctrl.prescaler.qe),
     .q      (reg2hw.wkup_ctrl.prescaler.q),
     .ds     (),