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[docs, aon_timer] wkup_ctrl writes reset internal prescaler count
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Signed-off-by: Antonio Martinez Zambrana <[email protected]>
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antmarzam committed Jan 16, 2025
1 parent 1f75cdf commit fd0d9f8
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5 changes: 4 additions & 1 deletion hw/ip/aon_timer/data/aon_timer.hjson
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regwidth: "32",
registers: [
{ name: "WKUP_CTRL",
desc: "Wakeup Timer Control register",
desc: '''
Wakeup Timer Control register.
Each write to the register resets the internal prescaler count
'''
swaccess: "rw",
hwaccess: "hro",
async: "clk_aon_i",
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5 changes: 3 additions & 2 deletions hw/ip/aon_timer/doc/registers.md
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| Name | Offset | Length | Description |
|:------------------------------------------------|:---------|---------:|:-----------------------------------------------|
| aon_timer.[`ALERT_TEST`](#alert_test) | 0x0 | 4 | Alert Test Register |
| aon_timer.[`WKUP_CTRL`](#wkup_ctrl) | 0x4 | 4 | Wakeup Timer Control register |
| aon_timer.[`WKUP_CTRL`](#wkup_ctrl) | 0x4 | 4 | Wakeup Timer Control register. |
| aon_timer.[`WKUP_THOLD_HI`](#wkup_thold_hi) | 0x8 | 4 | Wakeup Timer Threshold Register (bits 63 - 32) |
| aon_timer.[`WKUP_THOLD_LO`](#wkup_thold_lo) | 0xc | 4 | Wakeup Timer Threshold Register (bits 31 - 0) |
| aon_timer.[`WKUP_COUNT_HI`](#wkup_count_hi) | 0x10 | 4 | Wakeup Timer Count Register (bits 63 - 32) |
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| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. |

## WKUP_CTRL
Wakeup Timer Control register
Wakeup Timer Control register.
Each write to the register resets the internal prescaler count
- Offset: `0x4`
- Reset default: `0x0`
- Reset mask: `0x1fff`
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