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[hw,otp_ctrl,rtl] Provide a DFT config and response port #25897
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This looks good to me, thanks @Razer6 .
As you noted in an offline discussion, there are already the test_xyz
signals for OTP. AFAIK, this are mostly used for the vendor test partition but I don't have any visibility into this so can't say for sure how this interplays with DFT. Adding a separate interface as you did now and inline with what we do for the SRAMs is very reasonable in my view. If really required, one could still combine the two interfaces later on.
@meisnere, @sha-ron , please note that you will have to add the same ports to your OTP macro wrapper.
@@ -444,6 +444,21 @@ otp_size_as_uint32 = otp_size_as_bytes // 4 | |||
package: "" | |||
desc: "AST observability bus." | |||
} | |||
// DFT CFG and RSP siognals |
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Nit: siognals -> signals
CHANGE AUTHORIZED: hw/ip/prim_generic/rtl/prim_generic_otp.sv This PR adds a new interface to the OTP controller and the generic macro. Earlgrey functionality is not altered but partners will have to align their macro wrappers. |
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LGTM
Someday, I think it'd be good to evict the macros from the controllers, though. The dependency of a so-called "prim" on ipgen cores seems backwards, and the controller's prim
interface's CSR definitions don't make sense to any but one integrator.
CHANGE AUTHORIZED: hw/ip/prim_generic/rtl/prim_generic_otp.sv |
Yes, this definitively comes from a first product and requires some generalization. But an adventure for a different time :) |
This port can be overwritten by the integrator with their tech lib. This allows to place custom DFT and response signals. In the future, existing status control and monitor ports should be incorporated to the cfg/cfg_rsp ports. Signed-off-by: Robert Schilling <[email protected]>
This port can be overwritten by the integrator with their tech lib. This allows to place custom DFT and response signals. In the future, existing status control and monitor ports should be incorporated to the cfg/cfg_rsp ports.