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fix arm7 vram timings
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my bad!
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Jaklyy committed Jan 8, 2025
1 parent 8151f54 commit 9cb9f42
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Showing 2 changed files with 11 additions and 5 deletions.
14 changes: 10 additions & 4 deletions src/DSi.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1340,10 +1340,16 @@ void DSi::Set_SCFG_MC(u32 val)

void DSi::SetVRAMTimings(bool extrabuswidth)
{
if (extrabuswidth)
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 32, 1, 1); // dsi vram
else
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 16, 1, 1); // ds vram
if (extrabuswidth) // 32 bit bus; arm9 can do 8 bit writes
{
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 32, 1, 1);
SetARM7RegionTimings(0x06000, 0x07000, Mem7_VRAM, 32, 1, 1);
}
else // 16 bit bus; arm9 cannot do 8 bit writes
{
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 16, 1, 1);
SetARM7RegionTimings(0x06000, 0x07000, Mem7_VRAM, 16, 1, 1);
}
}


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2 changes: 1 addition & 1 deletion src/NDS.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -270,7 +270,7 @@ void NDS::InitTimings()
SetARM7RegionTimings(0x02000, 0x03000, Mem7_MainRAM, 16, 8, 1); // main RAM
SetARM7RegionTimings(0x03000, 0x04000, Mem7_WRAM, 32, 1, 1); // ARM7/shared WRAM
SetARM7RegionTimings(0x04000, 0x04800, Mem7_IO, 32, 1, 1); // IO
SetARM7RegionTimings(0x06000, 0x07000, Mem7_VRAM, 32, 1, 1); // ARM7 VRAM
SetARM7RegionTimings(0x06000, 0x07000, Mem7_VRAM, 16, 1, 1); // ARM7 VRAM

// handled later: GBA slot, wifi
}
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