ym7101: expose clean hsync signal

nukeykt · Aug 19, 2023 · 4cc0bf7 · 4cc0bf7
1 parent 171a7d3
commit 4cc0bf7
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Showing 3 changed files with 20 additions and 5 deletions.
diff --git a/fc1004.v b/fc1004.v
@@ -202,7 +202,8 @@ module fc1004
 	output [2:0] DAC_ch_index,
 	input tmss_enable,
 	input [15:0] tmss_data,
-	output [9:0] tmss_address
+	output [9:0] tmss_address,
+	output vdp_hsync2
 	);
 
 	wire vdp_ys; // w1009
@@ -365,7 +366,8 @@ module fc1004
 		.vdp_rs1(vdp_rs1),
 		.vdp_m2(vdp_m2),
 		.vdp_lcb(vdp_lcb),
-		.vdp_psg_clk1(vdp_psg_clk1)
+		.vdp_psg_clk1(vdp_psg_clk1),
+		.vdp_hsync2(vdp_hsync2)
 		);
 
 	ym3438 fm

diff --git a/md_board.v b/md_board.v
@@ -108,7 +108,8 @@ module md_board
 	output vdp_m2, // v28/v30
 	output vdp_lcb,
 	output vdp_psg_clk1,
-	output fm_clk1
+	output fm_clk1,
+	output vdp_hsync2
 
 	);
 
@@ -459,7 +460,8 @@ module md_board
 		.DAC_ch_index(DAC_ch_index),
 		.tmss_enable(tmss_enable),
 		.tmss_data(tmss_data),
-		.tmss_address(tmss_address)
+		.tmss_address(tmss_address),
+		.vdp_hsync2(vdp_hsync2)
 		);
 
 	assign fm_sel23 = TEST0_o;

diff --git a/ym7101.v b/ym7101.v
@@ -110,7 +110,8 @@ module ym7101
 	output vdp_rs1, // h32/h40
 	output vdp_m2, // v28/v30
 	output vdp_lcb,
-	output vdp_psg_clk1
+	output vdp_psg_clk1,
+	output vdp_hsync2
 	);
 
 	wire cpu_sel;
@@ -7184,6 +7185,16 @@ module ym7101
 
 	assign vdp_psg_clk1 = psg_hclk1;
 
+	wire vdp_hsync2_delay1;
+	ym_sr_bit #(.SR_LENGTH(2)) vdp_hsync2_delay1_sr(.MCLK(MCLK), .c1(hclk1), .c2(hclk2), .bit_in(t33), .sr_out(vdp_hsync2_delay1));
+	wire vdp_hsync2_delay2;
+	ym_sr_bit #(.SR_LENGTH(7)) vdp_hsync2_delay2_sr(.MCLK(MCLK), .c1(hclk1), .c2(hclk2), .bit_in(vdp_hsync2_delay1), .sr_out(vdp_hsync2_delay2));
+	wire vdp_hsync2_1 = reg_m5 ? vdp_hsync2_delay2 : vdp_hsync2_delay1;
+	wire vdp_hsync2_delay3;
+	ym_sr_bit vdp_hsync2_delay3_sr(.MCLK(MCLK), .c1(hclk1), .c2(hclk2), .bit_in(vdp_hsync2_1), .sr_out(vdp_hsync2_delay3));
+
+	assign vdp_hsync2 = vdp_hsync2_delay3;
+
 
 endmodule