rename ym lib cells

nukeykt · Jul 10, 2023 · 84196f8 · 84196f8
1 parent afed733
commit 84196f8
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Showing 12 changed files with 215 additions and 215 deletions.
diff --git a/ym3438.v b/ym3438.v
@@ -257,7 +257,7 @@ module ym3438(
 	wire [4:0] kcode_sr1_o;
 	wire [4:0] kcode_sr2_o;
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(5)) kcode_sr1
+	ym_sr_bit_array #(.DATA_WIDTH(5)) kcode_sr1
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -266,7 +266,7 @@ module ym3438(
 		.data_out(kcode_sr1_o)
 		);
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(5)) kcode_sr2
+	ym_sr_bit_array #(.DATA_WIDTH(5)) kcode_sr2
 		(
 		.MCLK(MCLK),
 		.c1(c1),

diff --git a/ym3438_ch.v b/ym3438_ch.v
@@ -28,7 +28,7 @@ module ym3438_ch
 	wire [8:0] ch_accm_sr_i;
 	wire [8:0] ch_accm_sr_o;
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(9), .SR_LENGTH(6)) ch_accm_sr
+	ym_sr_bit_array #(.DATA_WIDTH(9), .SR_LENGTH(6)) ch_accm_sr
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -55,7 +55,7 @@ module ym3438_ch
 	wire [8:0] ch_value_sr_o1;
 	wire [8:0] ch_value_sr_o2;
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(9), .SR_LENGTH(5)) ch_value_sr1
+	ym_sr_bit_array #(.DATA_WIDTH(9), .SR_LENGTH(5)) ch_value_sr1
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -64,7 +64,7 @@ module ym3438_ch
 		.data_out(ch_value_sr_o1)
 		);
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(9)) ch_value_sr2
+	ym_sr_bit_array #(.DATA_WIDTH(9)) ch_value_sr2
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -77,7 +77,7 @@ module ym3438_ch
 
 	wire load_ed_o;
 
-	ym3438_edge_detect load_ed
+	ym_edge_detect load_ed
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -95,7 +95,7 @@ module ym3438_ch
 
 	wire [8:0] ch_value_lock_o;
 
-	ym3438_slatch #(.DATA_WIDTH(9)) ch_value_lock
+	ym_slatch #(.DATA_WIDTH(9)) ch_value_lock
 		(
 		.MCLK(MCLK),
 		.en(~ch_lock),

diff --git a/ym3438_detune.v b/ym3438_detune.v
@@ -12,7 +12,7 @@ module ym3438_detune
 
 	wire [2:0] dt_sr_o;
 
-	ym3438_sr_bit_array #(.DATA_WIDTH(3)) dt_sr
+	ym_sr_bit_array #(.DATA_WIDTH(3)) dt_sr
 		(
 		.MCLK(MCLK),
 		.c1(c1),
@@ -23,7 +23,7 @@ module ym3438_detune
 
 	assign dt_sign_1 = dt_sr_o[2];
 
-	ym3438_sr_bit dt_sr2
+	ym_sr_bit dt_sr2
 		(
 		.MCLK(MCLK),
 		.c1(c1),