8346890: AArch64: Type profile counters generate suboptimal code

[theRealAph]

Type profile counters are emitted many times in C1-generated code. The generator was written a long time ago before we knew how best to write AArch64 code, and the generated code is rather suboptimal.

This PR reduces the size of a typical bimorphic type profile counter from 33 to 27 instructions.

---

Progress

• Change must be properly reviewed (1 review required, with at least 1 Reviewer)
• Change must not contain extraneous whitespace
• Commit message must refer to an issue

Issue

• JDK-8346890: AArch64: Type profile counters generate suboptimal code (Enhancement - P4)

Reviewing

Using git

Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/23012/head:pull/23012
$ git checkout pull/23012

Update a local copy of the PR:
$ git checkout pull/23012
$ git pull https://git.openjdk.org/jdk.git pull/23012/head

Using Skara CLI tools

Checkout this PR locally:
$ git pr checkout 23012

View PR using the GUI difftool:
$ git pr show -t 23012

Using diff file

Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/23012.diff

Using Webrev

Link to Webrev Comment

[bridgekeeper]

👋 Welcome back aph! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

[openjdk]

❗ This change is not yet ready to be integrated.
See the Progress checklist in the description for automated requirements.

[openjdk]

@theRealAph The following label will be automatically applied to this pull request:

• hotspot

When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command.

[mlbridge]

Webrevs

• 01: Full - Incremental (0e84904f)
• 00: Full (3b93519f)

[shipilev]

Can you explain a bit more here? I think I get why would we want to rewrite lea+ldr to slot_at.

I do not quite understand why do we rewrite this one:

-    Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)));
-    __ addptr(data_addr, DataLayout::counter_increment);
+    __ addptr(slot_at(ReceiverTypeData::receiver_count_offset(i)),
+              DataLayout::counter_increment);

Does it really optimize anything to rewrite it to slot_at? If so, shouldn't this one in the other hunk also get rewritten?

         Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)));
          __ addptr(data_addr, DataLayout::counter_increment);

[theRealAph]

Can you explain a bit more here? I think I get why would we want to rewrite lea+ldr to slot_at.

I do not quite understand why do we rewrite this one:

-    Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)));
-    __ addptr(data_addr, DataLayout::counter_increment);
+    __ addptr(slot_at(ReceiverTypeData::receiver_count_offset(i)),
+              DataLayout::counter_increment);

Does it really optimize anything to rewrite it to slot_at? If so, shouldn't this one in the other hunk also get rewritten?

It's a safety in depth patch.
It's good practice always to check variable offsets in order to ensure that they are reachable. addptr has an embedded form_address, so this is not strictly necessary. It is, however, harmless.

         Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)));
          __ addptr(data_addr, DataLayout::counter_increment);

Yes, it should.

[theRealAph]

For clarity: every variable-sized load/store offset generated by C1 should be range-checked, and when it is out of range the load/store should be split. We already do this in C2. I'll wrap up any missing examples in a later patch.