Merge pull request #278 from os-fpga/sim_EDA-1772

Adding sim to test
os-fpga · Oct 3, 2024 · 2a428fb · 2a428fb
2 parents 42ff193 + a454b07
commit 2a428fb
Showing 1 changed file with 9 additions and 3 deletions.
diff --git a/EDA-1772/raptor_tcl.tcl b/EDA-1772/raptor_tcl.tcl
@@ -3,15 +3,21 @@ target_device GEMINI_COMPACT_104x68
 add_include_path ./rtl
 add_library_path ./rtl
 add_library_ext .v .sv
-add_design_file ./rtl/uart_defines.vh
-add_design_file ./rtl/vex_soc.v
+add_design_file ./rtl/uart_defines.vh ./rtl/vex_soc.v
 set_top_module vex_soc
 analyze
 synthesize delay
+
+setup_lec_sim
+
+simulate icarus gate
+
 packing
-global_placement
 place
 route
+
+simulate icarus pnr
+
 sta
 power
 bitstream