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Merge pull request #93 from yetingk/tail
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Change scratch register of tail to t2 when Zicfilp enabled.
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kito-cheng authored Aug 2, 2024
2 parents 4761771 + 0035839 commit f8bcdde
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4 changes: 2 additions & 2 deletions riscv-asm.md
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Expand Up @@ -802,7 +802,7 @@ the current position:

[^3]: `ra` is implicitly used to save the return address.
[^4]: similar to `call <symbol>`, but `<rd>` is used to save the return address instead.
[^5]: `t1` is implicitly used as a scratch register.
[^5]: If the `Zicfilp` extension is available, `t2` is implicitly used as a scratch register. Otherwise,`t1` is implicitly used as a scratch register.
[^6]: similar to `tail <symbol>`, but `<rt>` is used as the scratch register instead.

The following example shows how these pseudoinstructions are used:
Expand Down Expand Up @@ -964,7 +964,7 @@ jr rs | jalr x0, rs, 0
jalr rs | jalr x1, rs, 0 | Jump and link register
ret | jalr x0, x1, 0 | Return from subroutine
call offset | auipc x1, offset[31:12] <br>jalr x1, x1, offset[11:0] | Call far-away subroutine
tail offset | auipc x6, offset[31:12] <br>jalr x0, x6, offset[11:0] | Tail call far-away subroutine
tail offset | auipc x6, offset[31:12] <br>jalr x0, x6, offset[11:0] | Tail call far-away subroutine | It will use `x7` as scratch register when `Zicfilp` extension is available.
fence | fence iorw, iorw | Fence on all memory and I/O
pause | fence w, 0 | PAUSE hint

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