justify; initialize signals

slaclab · Mar 12, 2024 · 5532793 · 5532793
1 parent c8195ce
commit 5532793
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Showing 2 changed files with 6 additions and 3 deletions.
diff --git a/protocols/pgp/pgp2fc/core/rtl/CRC7Rtl.vhd b/protocols/pgp/pgp2fc/core/rtl/CRC7Rtl.vhd
@@ -26,9 +26,12 @@ entity CRC7Rtl is
 end CRC7Rtl;
 
 architecture imp_crc of CRC7Rtl is
-   signal lfsr_q: std_logic_vector (7 downto 0);
-   signal lfsr_c: std_logic_vector (7 downto 0);
+
+   signal lfsr_q: std_logic_vector (7 downto 0) := (others => '0');
+   signal lfsr_c: std_logic_vector (7 downto 0) := (others => '0');
+
 begin
+
    crc_out <= lfsr_c when crc_en = '1' else lfsr_q;
    crc_out_r <= lfsr_q;
 

diff --git a/protocols/pgp/pgp2fc/core/rtl/Pgp2fcTxPhy.vhd b/protocols/pgp/pgp2fc/core/rtl/Pgp2fcTxPhy.vhd
@@ -322,7 +322,7 @@ begin
    end process;
 
    crcRst <= '1' when fcWordCount = FC_WORDS_G or pgpTxClkRst = '1' else '0';
-   crcEn  <= '1' when curState = ST_FC_C       else '0';
+   crcEn  <= '1' when curState    = ST_FC_C else '0';
 
    U_Crc7 : entity surf.CRC7Rtl
       port map (