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Merge pull request #1143 from slaclab/AxiStreamBatcherAxil
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adding Blowoff and SoftRst feature to the AxiStreamBatcherAxil
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ruck314 authored Mar 2, 2024
2 parents ffd8b71 + 98e7115 commit af26985
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Showing 2 changed files with 96 additions and 44 deletions.
71 changes: 48 additions & 23 deletions protocols/batcher/rtl/AxiStreamBatcherAxil.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -13,49 +13,50 @@
-- copied, modified, propagated, or distributed except according to the terms
-- contained in the LICENSE.txt file.
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;


library surf;
use surf.StdRtlPkg.all;
use surf.AxiStreamPkg.all;
use surf.AxiLitePkg.all;

entity AxiStreamBatcherAxil is

generic (
TPD_G : time := 1 ns;
COMMON_CLOCK_G : boolean := false;
MAX_NUMBER_SUB_FRAMES_G : positive := 32;
SUPER_FRAME_BYTE_THRESHOLD_G : natural := 8192;
MAX_CLK_GAP_G : natural := 256;
TPD_G : time := 1 ns;
COMMON_CLOCK_G : boolean := false;
MAX_NUMBER_SUB_FRAMES_G : positive := 32;
SUPER_FRAME_BYTE_THRESHOLD_G : natural := 8192;
MAX_CLK_GAP_G : natural := 256;
AXIS_CONFIG_G : AxiStreamConfigType;
INPUT_PIPE_STAGES_G : natural := 0;
OUTPUT_PIPE_STAGES_G : natural := 1);

INPUT_PIPE_STAGES_G : natural := 0;
OUTPUT_PIPE_STAGES_G : natural := 1);
port (
-- AXIS Interfaces (axisClk domain)
axisClk : in sl;
axisRst : in sl;
idle : out sl;
sAxisMaster : in AxiStreamMasterType;
sAxisSlave : out AxiStreamSlaveType;
mAxisMaster : out AxiStreamMasterType;
mAxisSlave : in AxiStreamSlaveType;
-- AXI-Lite Interface (axilClk domain)
axilClk : in sl;
axilRst : in sl;
axilReadMaster : in AxiLiteReadMasterType;
axilReadSlave : out AxiLiteReadSlaveType;
axilWriteMaster : in AxiLiteWriteMasterType;
axilWriteSlave : out AxiLiteWriteSlaveType);

end entity AxiStreamBatcherAxil;

architecture rtl of AxiStreamBatcherAxil is

type RegType is record
softRst : sl;
blowoff : sl;
superFrameByteThreshold : slv(31 downto 0);
maxSubFrames : slv(15 downto 0);
maxClkGap : slv(31 downto 0);
Expand All @@ -64,6 +65,8 @@ architecture rtl of AxiStreamBatcherAxil is
end record RegType;

constant REG_INIT_C : RegType := (
softRst => '0',
blowoff => '0',
superFrameByteThreshold => toSlv(SUPER_FRAME_BYTE_THRESHOLD_G, 32),
maxSubFrames => toSlv(MAX_NUMBER_SUB_FRAMES_G, 16),
maxClkGap => toSlv(MAX_CLK_GAP_G, 32),
Expand All @@ -78,9 +81,15 @@ architecture rtl of AxiStreamBatcherAxil is
signal syncAxilWriteMaster : AxiLiteWriteMasterType;
signal syncAxilWriteSlave : AxiLiteWriteSlaveType;

signal axisReset : sl;
signal batcherIdle : sl;
signal sAxisSlaveTmp : AxiStreamSlaveType;

begin

U_AxiStreamBatcher_1 : entity surf.AxiStreamBatcher
idle <= batcherIdle;

U_AxiStreamBatcher : entity surf.AxiStreamBatcher
generic map (
TPD_G => TPD_G,
MAX_NUMBER_SUB_FRAMES_G => MAX_NUMBER_SUB_FRAMES_G,
Expand All @@ -91,17 +100,17 @@ begin
OUTPUT_PIPE_STAGES_G => OUTPUT_PIPE_STAGES_G)
port map (
axisClk => axisClk, -- [in]
axisRst => axisRst, -- [in]
axisRst => axisReset, -- [in]
superFrameByteThreshold => r.superFrameByteThreshold, -- [in]
maxSubFrames => r.maxSubFrames, -- [in]
maxClkGap => r.maxClkGap, -- [in]
idle => idle, -- [out]
idle => batcherIdle, -- [out]
sAxisMaster => sAxisMaster, -- [in]
sAxisSlave => sAxisSlave, -- [out]
sAxisSlave => sAxisSlaveTmp, -- [out]
mAxisMaster => mAxisMaster, -- [out]
mAxisSlave => mAxisSlave); -- [in]

U_AxiLiteAsync_1 : entity surf.AxiLiteAsync
U_AxiLiteAsync : entity surf.AxiLiteAsync
generic map (
TPD_G => TPD_G,
COMMON_CLK_G => COMMON_CLOCK_G)
Expand All @@ -119,26 +128,43 @@ begin
mAxiWriteMaster => syncAxilWriteMaster, -- [out]
mAxiWriteSlave => r.axilWriteSlave); -- [in]

comb : process (axisRst, r, syncAxilReadMaster, syncAxilWriteMaster) is
comb : process (axisRst, batcherIdle, r, sAxisSlaveTmp, syncAxilReadMaster,
syncAxilWriteMaster) is
variable v : RegType;
variable axilEp : AxiLiteEndpointType;
begin
-- Latch the current value
v := r;

-- Reset strobes
v.softRst := '0';

-- Determine the transaction type
axiSlaveWaitTxn(axilEp, syncAxilWriteMaster, syncAxilReadMaster, v.axilWriteSlave, v.axilReadSlave);

axiSlaveRegister(axilEp, X"00", 0, v.superFrameByteThreshold);
axiSlaveRegister(axilEp, X"04", 0, v.maxSubFrames);
axiSlaveRegister(axilEp, X"08", 0, v.maxClkGap);
-- Map the registers
axiSlaveRegister (axilEp, X"00", 0, v.superFrameByteThreshold);
axiSlaveRegister (axilEp, X"04", 0, v.maxSubFrames);
axiSlaveRegister (axilEp, X"08", 0, v.maxClkGap);
axiSlaveRegisterR(axilEp, X"0C", 0, batcherIdle);
axiSlaveRegister (axilEp, x"F8", 0, v.blowOff);
axiSlaveRegister (axilEp, x"FC", 0, v.softRst);

-- Closeout the transaction
axiSlaveDefault(axilEp, v.axilWriteSlave, v.axilReadSlave, AXI_RESP_DECERR_C);

rin <= v;
-- Outputs
axisReset <= axisRst or r.softRst or r.blowOff;
sAxisSlave.tReady <= sAxisSlaveTmp.tReady or r.blowOff;

-- Reset
if (axisRst = '1') then
v := REG_INIT_C;
end if;

-- Register the variable for next clock cycle
rin <= v;

end process comb;

seq : process (axisClk) is
Expand All @@ -148,5 +174,4 @@ begin
end if;
end process seq;

end architecture rtl;

end rtl;
69 changes: 48 additions & 21 deletions python/surf/protocols/batcher/_AxiStreamBatcherAxil.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,28 +15,55 @@ def __init__(self, **kwargs):
super().__init__(**kwargs)

self.add(pr.RemoteVariable(
name = 'SuperFrameByteThreshold',
offset = 0x00,
bitOffset = 0,
bitSize = 32,
mode = 'RW',
base = pr.UInt,
disp = '{:d}'))
name = 'SuperFrameByteThreshold',
description = 'Sets the number of max superframe byte threshold before terminating the superframe. Set to zero to bypass this feature',
offset = 0x00,
bitSize = 32,
mode = 'RW',
disp = '{:d}',
))

self.add(pr.RemoteVariable(
name = 'MaxSubFrames',
offset = 0x04,
bitOffset = 0,
bitSize = 16,
mode = 'RW',
base = pr.UInt,
disp = '{:d}'))
name = 'MaxSubFrames',
description = 'Sets the number of max subframes before terminating the superframe. Set to zero to bypass this feature',
offset = 0x04,
bitSize = 16,
mode = 'RW',
disp = '{:d}',
))

self.add(pr.RemoteVariable(
name = 'MaxClkGap',
offset = 0x08,
bitOffset = 0,
bitSize = 32,
mode = 'RW',
base = pr.UInt,
disp = '{:d}'))
name = 'MaxClkGap',
description = 'Sets the number of clock cycles between subframes before terminating the superframe. Set to zero to bypass this feature',
offset = 0x08,
bitSize = 32,
mode = 'RW',
disp = '{:d}',
))

self.add(pr.RemoteVariable(
name = "Idle",
description = "Current state of the batcher if it is IDLE",
offset = 0x0C,
bitSize = 1,
mode = "RO",
base = pr.Bool,
pollInterval = 1,
))

self.add(pr.RemoteVariable(
name = 'Blowoff',
description = 'Blows off the inbound AXIS stream (for debugging)',
offset = 0xF8,
bitSize = 1,
base = pr.Bool,
mode = 'RW',
))

self.add(pr.RemoteCommand(
name = 'SoftRst',
description = 'Used to reset the batcher FSM',
offset = 0xFC,
bitSize = 1,
function = pr.BaseCommand.toggle,
))

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