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Fix Downlink Bandwidth Plan Frequency 915 #48

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Fix Downlink Bandwidth Plan Frequency 915 #48

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3af7f66
Add bw500_4_5
ricaun Aug 24, 2018
cefa262
Fix freq uplink
ricaun Aug 24, 2018
e402a0f
bandwidth 500 only 915
ricaun Aug 24, 2018
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22 changes: 18 additions & 4 deletions ESP-sc-gway/_loraModem.ino
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Original file line number Diff line number Diff line change
Expand Up @@ -178,7 +178,7 @@ void writeBuffer(uint8_t addr, uint8_t *buf, uint8_t len)
// CRC_ON == 0x04
// ----------------------------------------------------------------------------

void setRate(uint8_t sf, uint8_t crc)
void setRate(uint8_t sf, uint8_t crc, bool bw500_4_5 = false)
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Not necessary

{
uint8_t mc1=0, mc2=0, mc3=0;
#if DUSB>=2
Expand All @@ -190,6 +190,7 @@ void setRate(uint8_t sf, uint8_t crc)
return;
}
#endif

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// Set rate based on Spreading Factor etc
if (sx1272) {
mc1= 0x0A; // SX1276_MC1_BW_250 0x80 | SX1276_MC1_CR_4_5 0x02
Expand All @@ -206,9 +207,14 @@ void setRate(uint8_t sf, uint8_t crc)
else {
mc1= 0x72; // SX1276_MC1_BW_125==0x70 | SX1276_MC1_CR_4_5==0x02
}

if (bw500_4_5) {
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#if _LFREQ==915
   mc1 = 0x92;
#else 
   mc1= 0x72;				// SX1276_MC1_BW_125==0x70 | SX1276_MC1_CR_4_5==0x02
#end

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@YogoGit YogoGit Feb 22, 2019 •
edited
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All other changes in this PR can be reverted.

mc1 = 0x92;
}

mc2= ((sf<<4) | crc) & 0xFF; // crc is 0x00 or 0x04==SX1276_MC2_RX_PAYLOAD_CRCON
mc3= 0x04; // 0x04; SX1276_MC3_AGCAUTO
if (sf == SF11 || sf == SF12) { mc3|= 0x08; } // 0x08 | 0x04
if ((sf == SF11 || sf == SF12) && (bw500_4_5 == false) ) { mc3|= 0x08; } // 0x08 | 0x04
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@YogoGit YogoGit Feb 22, 2019 •
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if (sf == SF11 || sf == SF12) {
#if _LFREQ != 915
 mc3|= 0x08; //...
#endif 
}

}

// Implicit Header (IH), for class b beacons (&& SF6)
Expand Down Expand Up @@ -695,7 +701,15 @@ void txLoraModem(uint8_t *payLoad, uint8_t payLength, uint32_t tmst, uint8_t sfT
}
#endif
_state = S_TX;


bool bw500_4_5 = false;
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Not necessary since bw500_4_5 is a compile-time constant.


#if _STRICT_1CH
bw500_4_5 = false;
#elif _LFREQ==915
bw500_4_5 = true;
#endif

// 1. Select LoRa modem from sleep mode
//opmode(OPMODE_LORA); // set register 0x01 to 0x80

Expand All @@ -706,7 +720,7 @@ void txLoraModem(uint8_t *payLoad, uint8_t payLength, uint32_t tmst, uint8_t sfT
opmode(OPMODE_STANDBY); // set 0x01 to 0x01

// 3. Init spreading factor and other Modem setting
setRate(sfTx, crc);
setRate(sfTx, crc, bw500_4_5);
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Un-necessary.


// Frquency hopping
//writeRegister(REG_HOP_PERIOD, (uint8_t) 0x00); // set 0x24 to 0x00 only for receivers
Expand Down
3 changes: 1 addition & 2 deletions ESP-sc-gway/_txRx.ino
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Expand Up @@ -466,8 +466,7 @@ int buildPacket(uint32_t tmst, uint8_t *buff_up, struct LoraUp LoraUp, bool inte
}
#endif
buff_index += j;
ftoa((double)freq/1000000,cfreq,6); // XXX This can be done better
j = snprintf((char *)(buff_up + buff_index), TX_BUFF_SIZE-buff_index, ",\"chan\":%1u,\"rfch\":%1u,\"freq\":%s", 0, 0, cfreq);
j = snprintf((char *)(buff_up + buff_index), TX_BUFF_SIZE-buff_index, ",\"chan\":%1u,\"rfch\":%1u,\"freq\":%.2f", 0, 0, freq / 1000000.0);
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Why the change?

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Looks nicer on the ttn console.

buff_index += j;
memcpy((void *)(buff_up + buff_index), (void *)",\"stat\":1", 9);
buff_index += 9;
Expand Down
3 changes: 3 additions & 0 deletions ESP-sc-gway/_wwwServer.ino
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Expand Up @@ -431,6 +431,9 @@ static void settingsData()
}
else {
response += String() + ifreq;
response += " [ ";
response += String() + freqs[ifreq];
response += " ]";
response +="</td>";
response +="<td class=\"cell\"><a href=\"FREQ=-1\"><button>-</button></a></td>";
response +="<td class=\"cell\"><a href=\"FREQ=1\"><button>+</button></a></td>";
Expand Down
32 changes: 22 additions & 10 deletions ESP-sc-gway/loraModem.h
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Expand Up @@ -148,16 +148,28 @@ unsigned long detTime=0;
// ----------------------------------------------------------------------------
// Definition of the GPIO pins used by the Gateway for Hallard type boards
//
struct pins {
uint8_t dio0=15; // GPIO15 / D8. For the Hallard board shared between DIO0/DIO1/DIO2
uint8_t dio1=15; // GPIO15 / D8. Used for CAD, may or not be shared with DIO0
uint8_t dio2=15; // GPIO15 / D8. Used for frequency hopping, don't care
uint8_t ss=16; // GPIO16 / D0. Select pin connected to GPIO16 / D0
uint8_t rst=0; // GPIO 0 / D3. Reset pin not used
// MISO 12 / D6
// MOSI 13 / D7
// CLK 14 / D5
} pins;

// For MH-ET ESP32 MiniKit
#if defined (ARDUINO_ARCH_ESP32) || defined(ESP32)
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This will break almost every other ESP32 board.

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I was using the Gateway for Hallard type boards on the MH-ET ESP32 MiniKit but did not want to change the _PIN_OUT number.

struct pins {
uint8_t dio0=5; // GPIO5
uint8_t dio1=5; // GPIO5
uint8_t dio2=5; // GPIO5
uint8_t ss=26; // GPIO26
uint8_t rst=0; // Reset pin not used
} pins;
#else
struct pins {
uint8_t dio0=15; // GPIO15 / D8. For the Hallard board shared between DIO0/DIO1/DIO2
uint8_t dio1=15; // GPIO15 / D8. Used for CAD, may or not be shared with DIO0
uint8_t dio2=15; // GPIO15 / D8. Used for frequency hopping, don't care
uint8_t ss=16; // GPIO16 / D0. Select pin connected to GPIO16 / D0
uint8_t rst=0; // GPIO 0 / D3. Reset pin not used
// MISO 12 / D6
// MOSI 13 / D7
// CLK 14 / D5
} pins;
#endif

#elif _PIN_OUT==2
// ----------------------------------------------------------------------------
Expand Down