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(fpga) Debug build and sim target.
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       1. Debug tk1 core with initial changes to fw-app-mode.

       2. Debug testbench with fixes related to name changes for
       address and data RAM randomization.

       3. Debug test6 that checks SPI access.

Signed-off-by: Joachim Strömbergson <[email protected]>
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@secworks @dehanj
secworks authored and dehanj committed Nov 15, 2024
1 parent 3f67e77 commit 23348d3
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Showing 2 changed files with 21 additions and 19 deletions.
2 changes: 1 addition & 1 deletion hw/application_fpga/core/tk1/rtl/tk1.v
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Original file line number Diff line number Diff line change
Expand Up @@ -639,7 +639,7 @@ module tk1(
end

if (address == ADDR_SWITCH_APP) begin
tmp_read_data[0] = app_mode_reg;
tmp_read_data[0] = fw_app_mode_reg;
end

if (address == ADDR_LED) begin
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38 changes: 20 additions & 18 deletions hw/application_fpga/core/tk1/tb/tb_tk1.v
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Original file line number Diff line number Diff line change
Expand Up @@ -84,8 +84,8 @@ module tb_tk1();
reg tb_cpu_valid;
wire tb_force_trap;

wire [14 : 0] tb_ram_aslr;
wire [31 : 0] tb_ram_scramble;
wire [14 : 0] tb_ram_addr_rand;
wire [31 : 0] tb_ram_data_rand;

wire tb_led_r;
wire tb_led_g;
Expand Down Expand Up @@ -130,8 +130,8 @@ module tb_tk1();
.cpu_valid(tb_cpu_valid),
.force_trap(tb_force_trap),

.ram_aslr(tb_ram_aslr),
.ram_scramble(tb_ram_scramble),
.ram_addr_rand(tb_ram_addr_rand),
.ram_data_rand(tb_ram_data_rand),

.led_r(tb_led_r),
.led_g(tb_led_g),
Expand Down Expand Up @@ -199,7 +199,7 @@ module tb_tk1();
$display("tb_cpu_trap: 0x%1x, fw_app_mode: 0x%1x", tb_cpu_trap, tb_fw_app_mode);
$display("cpu_addr: 0x%08x, cpu_instr: 0x%1x, cpu_valid: 0x%1x, force_tap: 0x%1x",
tb_cpu_addr, tb_cpu_instr, tb_cpu_valid, tb_force_trap);
$display("ram_aslr: 0x%08x, ram_scramble: 0x%08x", tb_ram_aslr, tb_ram_scramble);
$display("ram_addr_rand: 0x%08x, ram_data_rande: 0x%08x", tb_ram_addr_rand, tb_ram_data_rand);
$display("led_r: 0x%1x, led_g: 0x%1x, led_b: 0x%1x", tb_led_r, tb_led_g, tb_led_b);
$display("ready: 0x%1x, cs: 0x%1x, we: 0x%1x, address: 0x%02x", tb_ready, tb_cs, tb_we, tb_address);
$display("write_data: 0x%08x, read_data: 0x%08x", tb_write_data, tb_read_data);
Expand Down Expand Up @@ -557,22 +557,24 @@ module tb_tk1();
$display("--- test6: Reset DUT to switch to fw mode.");
reset_dut();

$display("--- test6: Write RAM ASLR and RAM SCRAMBLE.");
$display("--- test6: Write RAM address and data randomization.");
write_word(ADDR_RAM_ADDR_RAND, 32'h13371337);
write_word(ADDR_RAM_DATA_RAND, 32'h47114711);

$display("--- test6: Check value in dut RAM ASLR and SCRAMBLE registers.");
$display("--- test6: ram_aslr_reg: 0x%04x, ram_scramble_reg: 0x%08x", dut.ram_aslr_reg, dut.ram_scramble_reg);
$display("--- test6: Check value in dut RAM addres and data randomization registers.");
$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x",
dut.ram_addr_rand_reg, dut.ram_data_rand_reg);

$display("--- test6: Switch to app mode.");
write_word(ADDR_SWITCH_APP, 32'hf000000);

$display("--- test6: Write RAM ASLR and SCRAMBLE again.");
$display("--- test6: Write RAM address and data randomization registers again.");
write_word(ADDR_RAM_ADDR_RAND, 32'hdeadbeef);
write_word(ADDR_RAM_DATA_RAND, 32'hf00ff00f);

$display("--- test6: Check value in dut RAM ASLR and SCRAMBLE registers.");
$display("--- test6: ram_aslr_reg: 0x%04x, ram_scramble_reg: 0x%08x", dut.ram_aslr_reg, dut.ram_scramble_reg);
$display("--- test6: Check value in dut RAM address and data randomization registers agan.");
$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x",
dut.ram_addr_rand_reg, dut.ram_data_rand_reg);

$display("--- test6: completed.");
$display("");
Expand Down Expand Up @@ -736,14 +738,14 @@ module tb_tk1();
// Start by resetting and check if access is enabled.
$display("--- test11: Check that SPI access is disabled after reset.");
reset_dut();
read_word(ADDR_SPI_XFER, 32'h0);
read_word(ADDR_SPI_XFER);
$display("");

// Set the SPI command adress API to an address in ROM space.
// Read it back to check that it has been set.
$display("--- test11: Set and read SPI command address.");
write_word(ADDR_SPI_CMD, 32'h0000dead);
read_word(ADDR_SPI_CMD, 32'h0000dead);
read_word(ADDR_SPI_CMD);
$display("");

// Simulate CPU instruction read from the SPI command adress.
Expand All @@ -756,7 +758,7 @@ module tb_tk1();
#(CLK_PERIOD);
tb_cpu_instr = 1'h0;
tb_cpu_valid = 1'h0;
read_word(ADDR_SPI_XFER, 32'h1);
read_word(ADDR_SPI_XFER);
$display("");

// Simulate CPU instruction read from a RAM address.
Expand All @@ -769,15 +771,15 @@ module tb_tk1();
#(CLK_PERIOD);
tb_cpu_instr = 1'h0;
tb_cpu_valid = 1'h0;
read_word(ADDR_SPI_XFER, 32'h0);
read_word(ADDR_SPI_XFER);
$display("");


// Move the SPI command adress API to a new address in ROM space.
// Read it back to check that it has been set.
$display("--- test11: Set SPI command address to a new address and read again.");
write_word(ADDR_SPI_CMD, 32'h0000cafe);
read_word(ADDR_SPI_CMD, 32'h0000cafe);
read_word(ADDR_SPI_CMD);
$display("");

// Simulate CPU instruction read from the old SPI command adress.
Expand All @@ -790,7 +792,7 @@ module tb_tk1();
#(CLK_PERIOD);
tb_cpu_instr = 1'h0;
tb_cpu_valid = 1'h0;
read_word(ADDR_SPI_XFER, 32'h0);
read_word(ADDR_SPI_XFER);
$display("");

// Simulate CPU instruction read from the new SPI command adress.
Expand All @@ -803,7 +805,7 @@ module tb_tk1();
#(CLK_PERIOD);
tb_cpu_instr = 1'h0;
tb_cpu_valid = 1'h0;
read_word(ADDR_SPI_XFER, 32'h1);
read_word(ADDR_SPI_XFER);

$display("--- test11: completed.");
$display("");
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