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veripool · Jan 4, 2024 · 21a1000 · 21a1000
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diff --git a/0test.el b/0test.el
@@ -1,6 +1,6 @@
 ;; DESCRIPTION: Run verilog-mode tests, as part of "make test"
 ;;
-;; Copyright 2008-2023 by Michael McNamara and Wilson Snyder.  This package
+;; Copyright 2008-2024 by Michael McNamara and Wilson Snyder.  This package
 ;; is free software; you can redistribute it and/or modify it under the
 ;; terms of either the GNU Lesser General Public License or the Perl
 ;; Artistic License.

diff --git a/FAQ.rst b/FAQ.rst
@@ -5,7 +5,7 @@ Verilog-Mode FAQ
 .. contents::
 
 This is the Frequently Asked Questions (FAQ) for `Verilog Mode
-<https://www.veripool.org/verilog-mode>`__. This FAQ is Copyright 2006-2023
+<https://www.veripool.org/verilog-mode>`__. This FAQ is Copyright 2006-2024
 by Michael McNamara and Wilson Snyder. You may redistribute this document
 in its entirety only.
 

diff --git a/Makefile b/Makefile
@@ -1,6 +1,6 @@
 # DESCRIPTION: Run verilog-mode tests, as part of "make test"
 #
-# Copyright 2008-2023 by Michael McNamara and Wilson Snyder.  This package
+# Copyright 2008-2024 by Michael McNamara and Wilson Snyder.  This package
 # is free software; you can redistribute it and/or modify it under the
 # terms of either the GNU Lesser General Public License or the Perl
 # Artistic License.

diff --git a/README.rst b/README.rst
@@ -124,7 +124,7 @@ individual test inside the ``make test``.
 License
 =======
 
-Verilog-mode itself is part of GNU Emacs, which is Copyright 2001-2023 Free
+Verilog-mode itself is part of GNU Emacs, which is Copyright 2001-2024 Free
 Software Foundation, Inc. This package is free software; you can
 redistribute it and/or modify it under the terms of the GNU General Public
 License Version 3.

diff --git a/batch_prof.el b/batch_prof.el
@@ -1,6 +1,6 @@
 ;; DESCRIPTION: Profile driven test as part of "make test"
 ;;
-;; Copyright 2008-2023 by Michael McNamara and Wilson Snyder.  This package
+;; Copyright 2008-2024 by Michael McNamara and Wilson Snyder.  This package
 ;; is free software; you can redistribute it and/or modify it under the
 ;; terms of either the GNU Lesser General Public License or the Perl
 ;; Artistic License.

diff --git a/batch_test.el b/batch_test.el
@@ -1,6 +1,6 @@
 ;; DESCRIPTION: Common Emacs flags needed for batch_test.pl
 ;;
-;; Copyright 2008-2023 by Michael McNamara and Wilson Snyder.  This package
+;; Copyright 2008-2024 by Michael McNamara and Wilson Snyder.  This package
 ;; is free software; you can redistribute it and/or modify it under the
 ;; terms of either the GNU Lesser General Public License or the Perl
 ;; Artistic License.

diff --git a/batch_test.pl b/batch_test.pl
@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 # DESCRIPTION: Run batch tests, as part of "make test"
 #
-# Copyright 2008-2023 by Michael McNamara and Wilson Snyder.  This package
+# Copyright 2008-2024 by Michael McNamara and Wilson Snyder.  This package
 # is free software; you can redistribute it and/or modify it under the
 # terms of either the GNU Lesser General Public License or the Perl
 # Artistic License.

diff --git a/config_rev.pl b/config_rev.pl
@@ -2,7 +2,7 @@
 # DESCRIPTION: Query's git to get version number
 ######################################################################
 #
-# Copyright 2005-2023 by Wilson Snyder.  This is free software; you
+# Copyright 2005-2024 by Wilson Snyder.  This is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

diff --git a/makechangelog b/makechangelog
@@ -183,7 +183,7 @@ This is part of the L<https://www.veripool.org/> free Verilog EDA software
 tool suite.  The latest version is available from CPAN and from
 L<https://www.veripool.org/>.
 
-Copyright 2008-2023 by Wilson Snyder.  This package is free software; you
+Copyright 2008-2024 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License or the Perl Artistic License.
 

diff --git a/verilog-mode.el b/verilog-mode.el
@@ -1,6 +1,6 @@
 ;;; verilog-mode.el --- major mode for editing verilog source in Emacs  -*- lexical-binding: t; -*-
 
-;; Copyright (C) 1996-2023 Free Software Foundation, Inc.
+;; Copyright (C) 1996-2024 Free Software Foundation, Inc.
 
 ;; Author: Michael McNamara <[email protected]>
 ;;    Wilson Snyder <[email protected]>