Merge pull request #380 from dgarske/tpm_io_stm

Fix for STM32 GPIO SPI CS control to use pin number as bit offset
wolfSSL · Sep 19, 2024 · 48e1401 · 48e1401
2 parents 3598e01 + 4b56cfa
commit 48e1401
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/hal/tpm_io_st.c b/hal/tpm_io_st.c
@@ -169,7 +169,7 @@
 
         __HAL_SPI_ENABLE(hspi);
     #ifndef USE_HW_SPI_CS
-        HAL_GPIO_WritePin(USE_SPI_CS_PORT, USE_SPI_CS_PIN, GPIO_PIN_RESET); /* active low */
+        HAL_GPIO_WritePin(USE_SPI_CS_PORT, (1 << USE_SPI_CS_PIN), GPIO_PIN_RESET); /* active low */
     #endif
 
     #ifdef WOLFTPM_CHECK_WAIT_STATE
@@ -178,7 +178,7 @@
             TPM_TIS_HEADER_SZ, STM32_CUBEMX_SPI_TIMEOUT);
         if (status != HAL_OK) {
         #ifndef USE_HW_SPI_CS
-            HAL_GPIO_WritePin(USE_SPI_CS_PORT, USE_SPI_CS_PIN, GPIO_PIN_SET);
+            HAL_GPIO_WritePin(USE_SPI_CS_PORT, (1 << USE_SPI_CS_PIN), GPIO_PIN_SET);
         #endif
             __HAL_SPI_DISABLE(hspi);
             return TPM_RC_FAILURE;
@@ -198,7 +198,7 @@
         #endif
             if (timeout <= 0) {
             #ifndef USE_HW_SPI_CS
-                HAL_GPIO_WritePin(USE_SPI_CS_PORT, USE_SPI_CS_PIN, GPIO_PIN_SET);
+                HAL_GPIO_WritePin(USE_SPI_CS_PORT, (1 << USE_SPI_CS_PIN), GPIO_PIN_SET);
             #endif
                 __HAL_SPI_DISABLE(hspi);
                 return TPM_RC_FAILURE;
@@ -217,7 +217,7 @@
     #endif /* WOLFTPM_CHECK_WAIT_STATE */
 
     #ifndef USE_HW_SPI_CS
-        HAL_GPIO_WritePin(USE_SPI_CS_PORT, USE_SPI_CS_PIN, GPIO_PIN_SET);
+        HAL_GPIO_WritePin(USE_SPI_CS_PORT, (1 << USE_SPI_CS_PIN), GPIO_PIN_SET);
     #endif
         __HAL_SPI_DISABLE(hspi);