Support for multi-packed DSP58s for VVUs #907
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…sion, no HLS support for this class required).
The following functions have been removed when compared to the original Thresholding_Batch class:
- get_weightstream_width_padded()
needed for cppsim
- get_ap_int_max_w()
needed for cppsim
- get_template_param_values()
needed for cppsim
- get_hls_compatible_threshold_tensor()
needed for cppsim/hlslib
- get_verilog_top_module_intf_names()
already have TOP verilog module interface names I think
- get_op_and_param_counts()
not used anywhere
- ipgen_extra_directives()
needed for cppsim/hlslib
Signed-off-by: Fionn O'Donohoe <[email protected]>
…reshold_binary_search class Signed-off-by: Fionn O'Donohoe <[email protected]>
…inary search class Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
… data types Signed-off-by: Fionn O'Donohoe <[email protected]>
…shapes Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
…gramming Signed-off-by: Fionn O'Donohoe <[email protected]>
…ion type Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
…simulation Signed-off-by: Fionn O'Donohoe <[email protected]>
…ch simulation object Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
Signed-off-by: Fionn O'Donohoe <[email protected]>
…ature/vvu_dsp_packing
…oral mode for rtl sim
…e/vvu_dsp_packing
…nd limitation on max array indices in Verilator
…ation to select DSP48E2 explicitly again.
…ation to select DSP48E2 explicitly again.
…e/vvu_dsp_packing
This was referenced Feb 7, 2024
This was referenced Feb 8, 2024
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Note: this PR depends on
VVAUlayer. For weights and activations that are between 4- and 8-bits wide (with the exception of 9-bits for activations for DSP58), the custom layer packs 2, 3 or 4 elements on the input datapath of the DSP to achieve multiple MACs per cycle per DSP58, which depends on the targeted board and quantization.Functionalities to be added for the VVU
rtllib: RTL implementation for the DSP58-based VVUmvu_vvu_8sx9_dsp58vectorvectoractivation_rtl.pyspecialize_to_rtl_layers.py. Note, this is part of PR Support for packed MV(A)Us #794.Tests
test_fpgadataflow_vvau_rtlOutstanding bugs & features
StreamingDataWidthConverter_Batchlayer. This removes the need for introducing a new layer type. (resolved in PR [RTL SWG] Support SIMD < C in window-parallel mode #922)