fix: TCLKA and TCLKB and EVRU/EVRD clocks. #94
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jerzyjamroz
commented
Oct 11, 2023
jerzyjamroz
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- TCLKA and TCLKB should use UNIV16,17 and CMLs.
- Better handling of the fractional synthesizer configuration - useful for EVRD and EVRU as they do not have all the registers functional.
zioven
reviewed
Oct 12, 2023
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| // mapping to TCLKA and TCLKB as UNIV16, 17 | ||
| // we move down to UNIV0, 1 | ||
| outputs[std::make_pair(OutputFPUniv,0)]=new MRMOutput(SB()<<n<<":FrontUnivOut0", this, OutputFPUniv, 16); | ||
| outputs[std::make_pair(OutputFPUniv,1)]=new MRMOutput(SB()<<n<<":FrontUnivOut1", this, OutputFPUniv, 17); | ||
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If this is removed, where is the configuration of TCLKA and TCLKB done on the MTCA EVR?
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$(P)Out-TCLKA-Pat-Low00_15-SP etc.
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* TCLKA and TCLKB should use UNIV16,17 and CMLs. * Better handling of the fractional synthesizer configuration - useful for EVRD and EVRU as they do not have all the registers functional.
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