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Analog fixes#76

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jpc-lip6 wants to merge 121 commits intomainlip6/coriolis:mainfrom analog-fixeslip6/coriolis:analog-fixesCopy head branch name to clipboard

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Commits on Oct 24, 2023

• Add support for MOSIS & AMS350 (c35b4) in designflow.technos.

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• The karakaze tool (AnalogDesign) was forgotten in the installation.

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Commits on Jan 16, 2024

• Added Verilog driver for netlist export (#80)

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• Split callback in Etesian to allow for derived placer classes

  

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• Introduce flags for placement callbacks in Etesian

  

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• Introduce complete ripup functions for the router

  

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• Simple clang format file

  

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• Update coloquinte version for slightly better results and easier debugging

  

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• Extend .gitignore

  

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• Update Coloquinte version to 0.4.1 (bug fixes + area update infrastructure)

  

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• Filter out redundant plugs that have no connection inside cell while export Verilog netlist. (#84)

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• Fix _PDM link in README

  

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• Fix meson README link

  

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• Failures in PyPi uploads should fail workflows

  

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• Update doxyfiles to latest doxygen

  

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• Remove generated doc files

  

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• Add meson build infrastructure for doxygen based content

  

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• Update requirements and add missing pdm.lock

  

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• Add meson build infrastructure for pelican webpage

  

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• Fix header character usage - crashes with newer docutils

  

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• Add github pages workflow

  

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• Fix some typos in documentation and a number of whitespace issues

  

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• tweak readme

  

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• Rename tabs.css into custom_tabs.css to avoid doxygen overwrite.

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• Install Oroshi doc in the right place.

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• One less level in the left menu (was too wide).

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• New rule "install_docs" to build the documentation.

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• Fix the loading of initHook.py, use Python loading mechanism directly.

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• Don't connect with M2 on M3 RoutingPads.

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• Do not protect with TrackMarkers M2 RoutingPads.

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• Duplicated ".spi" targets in pnrcheck designflow.

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• Get version from git tag

  

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• Fix warning when compiling EtesianEngine

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• Mention hTracksReservedMin in the documentation

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• Show track reserve options for what they are in viewer

  

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• Hide max number of reserved tracks in doc

  

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• Add new purple color to debug Sky130 VexRam

  

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• Fix bloat factor reporting in Etesian (has wrong % symbol)

  

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• Fix unclear printing in Etesian

  

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• Use Coloquinte cell expansion instead of Etesian, so that target density is better handled

  

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• Show placement effort in the logs

  

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• Update etesian parameters in techno files

  

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• Fix format specifier in flute printf

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• Use a maximum expanded width when using Coloquinte expansion

  

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• Fixed Verilog netlist export with presence of unconnected plugs (#96)

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• Fix for cell net names with indexes be in proper Verilog format (#97)

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• GDS: Actually skip discarded text

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• remove python36-devel and liblemon build from docker file

  

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• set pkgconfig path for cibuildwheel python

  

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• Try adding linker script to ignore libpython symbols

  

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• Try adding linker script to ignore libpython symbols

  

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• Just allow undefined symbols

  

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• set 'b_lundef=false' for the project

  

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• wip

  

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• Revert "wip"

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• Revert "Revert "wip""

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• Set write-all permission for ghpages workflow

  

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• anabatic: Fix connectivity for staircases

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• Meson: remove old build system artifacts

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• Intalling the techno files for gf180mcu_c4m from CRL.

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• The designflow sv2v, svase & surelog were forgotten in the merges.

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• One more forgotten to install gf180mcu file.

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• Must setup the Coriolis source directory in regression tests.

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• Create separate rules for meson configure & setup.

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• New Rectilinear::getAsBiggestrectangles() method.

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• In technos.setupCMOS(), find liberty from ALLIANCE_TOP instead of CELLS_TOP.

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• Slightly clrearer display of C++ exception catched through Python.

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• Systematically throw an error in case of faulty contact topology.

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• Reorganization of the size detection of RoutingPad.

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• Implementation of Pin Rectilinear Support

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• Create the first technical log entry.

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• The karakaze tool (AnalogDesign) was forgotten in the installation.

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• Make the left menu *not* overlap the page contents.

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• Add all the .rst page dependencies to meson.buil.

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• In GF180MCU techno, configuration now support HV or VH topologies.

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• In LefParser::_pinStdPostProcess(), improved way to choose H/V.

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• In technos.setupGF180MCU_GF(), provide a flag to select HV or VH.

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• Support for offgrid M1 & VH topologies (WIP 1).

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• New type of LayerRoutingGauge : LocalOnly, for local interconnect.

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• Do not process the blockages layers in FlattenPower (not needed).

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• A DebugSession was left open in Katana::PropagateCagedConstraints().

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• Create a new type of TrakElement : TrackBlockage.

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• More adjustements for the perpandicular track span & positions.

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• Keep track of the position of the BreakpointWidget.

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• Display the "ripup ratio" in Katana::Statistics (NegociateWidow).

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• Support saving & restoring positions and settings of graphic windows.

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• In Rectilinear, support for horizontal slicing.

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• Support Rectilinear in the two setupPowerRails() (Etesian & Katana).

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• Fix TrackBlockage::_getString() when the is not yet a track (transient).

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• protectRoutingPads() call moved from ::digitalInit() to ::runGlobalrouter().

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• Support for offgrid M1 & VH topologies (WIP 2).

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• Support for offgrid M1 & VH topologies (WIP 3).

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• Ignore Emacs backup files.

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• Fix in oroshi.Stack, PMOS must be in nWell (not pWell).

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• Seems that when doc only is acivated, we no longer could compile.

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• Fixes in protectRoutingPads().

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• In selectRpComponent(), do not deflate VIAs in symbolic mode.

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• New Rectilinear::getAsBiggestrectangles() method.

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• Support for offgrid M1 & VH topologies (WIP 1).

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• Removing code duplication due to a bad merge in Rectilinear.

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• Force DoglegDown when slackening and AutoSegment from a Terminal.

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• In NetBuilderHV, check for up density before moving up a global.

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• Added isUsable() and getFirstroutingLayer() proxies to Anabatic::Configuration.

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• Export RoutingLayerGauge::isHorizontal() & isVertical() to Python.

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• Add a failsafe in case the graphic style index no longer exists.

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• Fix wrong import path.

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• Manage layer change for south terminals of a macro.

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• More accurate search for obstacle of the H-Tree sub-branches.

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• Merge branch 'main' into analog-fixes

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• Update doxyfiles to latest doxygen

  

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• Add meson build infrastructure for doxygen based content

  

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• Add meson build infrastructure for pelican webpage

  

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• Fix bloat factor reporting in Etesian (has wrong % symbol)

  

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• Fix unclear printing in Etesian

  

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• Use Coloquinte cell expansion instead of Etesian, so that target density is better handled

  

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• Use a maximum expanded width when using Coloquinte expansion

  

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• remove python36-devel and liblemon build from docker file

  

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• Try adding linker script to ignore libpython symbols

  

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• Try adding linker script to ignore libpython symbols

  

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• Set write-all permission for ghpages workflow

  

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• Do not give the python linker script twice in meson.build

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